Hi,
On Tuesday, May 08, 2012 01:12:51 Marek Olšák wrote:
> AFAIK the "Enabled" flags aren't very useful in determining the final
> number of vertex elements, because if an array is not enabled, the
> corresponding zero-stride "current" attrib is used instead. So the
> quick check would depend sol
https://bugs.freedesktop.org/show_bug.cgi?id=48441
m13...@hotmail.com changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
On Mon, May 7, 2012 at 6:19 PM, Brian Paul wrote:
> Looks good, but it took me a while to understand exactly what's going
> on. Suggestions for more/improved comments below.
>
> On Tue, Apr 24, 2012 at 4:00 PM, Marek Olšák wrote:
>> The vbo module recomputes its states if _NEW_ARRAY is set, so i
On 05/07/2012 08:34 PM, Eric Anholt wrote:
> On Sat, 05 May 2012 14:43:44 +0200, Christoph Bumiller
> wrote:
>> Test case for the "glsl_to_tgsi: use TGSI_OPCODE_CEIL for
>> ir_unop_ceil" patch attached.
>
> This wasn't caught by the generated test for ceil()? That seems
> strange.
It's not, beca
On Mon, May 7, 2012 at 6:34 PM, Brian Paul wrote:
> On 05/07/2012 09:27 AM, Marek Olšák wrote:
>> As far as the gallium side is concerned, I don't think the array
>> object can fully encapsulate vertex buffers and vertex elements. Those
>> two also depend on the vertex shader, because vertex buffe
On 05/02/2012 01:52 PM, Paul Berry wrote:
> This patch splits up the gen6_blorp_exec and gen7_blorp_exec
> functions, which were very long, into simple component functions.
> With a few exceptions, there is one function per state packet.
>
> This will allow blit functionality to be added without s
On 05/02/2012 01:52 PM, Paul Berry wrote:
> This patch groups together the parameters used by the HiZ functions
> into a new data structure, brw_hiz_resolve_params, rather than passing
> each parameter individually between the HiZ functions. This data
> structure is a subclass of brw_blorp_params,
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Hash: SHA1
For patches 1-5,
Reviewed-by: Chad Versace
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Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
iQIcBAEBAgAGBQJPqEbnAAoJEAIvNt057x8i4dIP/i0bNIIPXFk/4lv4dZhvdkL5
XNz/jB7CYuVqr
On 7 May 2012 14:32, Paul Berry wrote:
> From: Eric Anholt
>
Whoops, I cribbed this patch from Eric and forgot to reset the author to
me. Sorry about that, Eric. I'll fix before pushing.
>
> We'll need this for annotating AUB dumps.
> ---
> configure.ac |2 +-
> 1 files changed, 1 inse
Previously, when the environment variable INTEL_DEBUG=aub was set,
mesa would simply instruct DRM to start dumping data to an .aub file,
but we would not provide DRM with any information about the format of
the data in various buffers. As a result, a lot of the data in the
generate .aub file would
From: Eric Anholt
We'll need this for annotating AUB dumps.
---
configure.ac |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/configure.ac b/configure.ac
index 3bc59ca..d0fe397 100644
--- a/configure.ac
+++ b/configure.ac
@@ -37,7 +37,7 @@ USER_CXXFLAGS="$CXXFLAGS"
dnl
When we are generating an AUB dump, we make a final call to
aub_dump_bmp() as the context is being destroyed, to ensure that any
rendering performed before the application exits can be seen during a
simulation run. However, we were doing this before flushing the batch
buffer; as a result simulatio
On 05/02/2012 01:52 PM, Paul Berry wrote:
In C++, if a struct is defined inside another struct, or its name is
first seen inside a struct or function, the struct is nested inside
the namespace of the struct or function it appears in. In C, all
structs are visible from toplevel.
This patch expli
https://bugs.freedesktop.org/show_bug.cgi?id=48441
--- Comment #19 from raphael.roc...@gmail.com
2012-05-07 14:15:01 PDT ---
It is fixed for me in last update.
( ArchLinux 64bits / gnome-control-center 3.4.1-2 )
--
Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email
---
On Mon, May 07, 2012 at 11:53:46PM +0400, Vadim Girlin wrote:
> Set the input registers as live-in for entry basic block.
Looks good. Thanks.
>
> Signed-off-by: Vadim Girlin
> ---
> src/gallium/drivers/radeon/AMDGPUUtil.cpp |1 +
> src/gallium/drivers/radeon/R600LowerShade
On Mon, May 07, 2012 at 09:08:42PM +0400, Vadim Girlin wrote:
> Some fixes, missing instructions, etc for llvm backend. Comparing to
> non-llvm backend, it still fails 9 tests for me on evergreen.
>
> Also you can find these patches in my github mesa repo, r600_llvm branch:
> https://github.
Set the input registers as live-in for entry basic block.
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPUUtil.cpp |1 +
src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp |4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/sr
On 2012-05-07 20:48 +0200, Chad Versace wrote:
> On 05/05/2012 10:17 AM, Sven Joachim wrote:
>> On 2012-05-03 11:34 +0200, Sven Joachim wrote:
>>
>>> When configuring mesa git master with "--enable-xlib-glx", the GL
>>> library does not get installed.
>>
>> Bisection showed that this has been br
On Mon, May 07, 2012 at 09:08:47PM +0400, Vadim Girlin wrote:
> Set the input registers as live-in for entry basic block.
>
> Signed-off-by: Vadim Girlin
> ---
> src/gallium/drivers/radeon/AMDGPULowerShaderInstructions.cpp |3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/src/galli
On Mon, 2012-05-07 at 11:37 -0700, Ian Romanick wrote:
> On 04/29/2012 12:54 AM, Vadim Girlin wrote:
> > On Sat, 2012-04-28 at 13:02 -0700, Kenneth Graunke wrote:
> >> On 04/28/2012 12:24 PM, Vadim Girlin wrote:
> >>> On Sat, 2012-04-28 at 11:42 -0700, Kenneth Graunke wrote:
> On 04/28/2012 11
On 05/05/2012 10:17 AM, Sven Joachim wrote:
> On 2012-05-03 11:34 +0200, Sven Joachim wrote:
>
>> When configuring mesa git master with "--enable-xlib-glx", the GL
>> library does not get installed.
>
> Bisection showed that this has been broken by commit 8ffb098234:
>
> commit 8ffb098234fbc3d2e
On 04/29/2012 12:54 AM, Vadim Girlin wrote:
On Sat, 2012-04-28 at 13:02 -0700, Kenneth Graunke wrote:
On 04/28/2012 12:24 PM, Vadim Girlin wrote:
On Sat, 2012-04-28 at 11:42 -0700, Kenneth Graunke wrote:
On 04/28/2012 11:20 AM, Vadim Girlin wrote:
According to GLSL 1.30 specification, initial
On Sat, 05 May 2012 14:43:44 +0200, Christoph Bumiller
wrote:
> Test case for the "glsl_to_tgsi: use TGSI_OPCODE_CEIL for ir_unop_ceil"
> patch attached.
This wasn't caught by the generated test for ceil()? That seems strange.
pgpRyU9FSoKhk.pgp
Description: PGP signature
_
On Sat, 5 May 2012 09:39:31 +0800, Liu Aleaxander wrote:
> On Sat, May 5, 2012 at 2:56 AM, Eric Anholt wrote:
> > So
> > you can't rely on it being correct here -- you'd need to
> > _mesa_update_state(ctx) first. I think it should go at the very top of
> > the function, due to the _ImageTransfer
On Mon, May 7, 2012 at 6:24 PM, Brian Paul wrote:
> On Tue, Apr 24, 2012 at 4:00 PM, Marek Olšák wrote:
>> In the future we'd like to treat vertex arrays as a state and
>> not as a parameter to the draw function. This is the first step
>> towards that goal.
>
> Part of the goal is to avoid array
On 05/07/2012 11:53 AM, Paul Berry wrote:
Module: Mesa
Branch: master
Commit: b9819a027d08b38abb380526bed9f2908ffeb507
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9819a027d08b38abb380526bed9f2908ffeb507
Author: Paul Berry
Date: Fri Apr 13 21:50:08 2012 -0700
fbo: Only reuse dep
On 2 May 2012 14:20, Chris Forbes wrote:
> +void
> +brw_blorp_params::exec(struct intel_context *intel) const
> +{
> + switch (intel->gen) {
> + case 6:
> + gen6_blorp_exec(intel, this);
> + break;
> + case 7:
> + gen7_blorp_exec(intel, this);
> + break;
> + default:
>
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_llvm.c | 22 -
.../drivers/radeon/radeon_setup_tgsi_llvm.c| 92 +++-
2 files changed, 91 insertions(+), 23 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_llvm.c
b/src/gallium/dri
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPUIntrinsics.td |1 +
src/gallium/drivers/radeon/AMDGPUUtil.cpp | 11 +
src/gallium/drivers/radeon/AMDGPUUtil.h|1 +
src/gallium/drivers/radeon/R600CodeEmitter.cpp | 58
src/galliu
Add support for IABS, NOT, AND, XOR, OR, UADD, UDIV, IDIV, MOD, UMOD, INEG,
I2F, U2F, F2U, F2I, USEQ, USGE, USLT, USNE, ISGE, ISLT, ROUND, MIN, MAX,
IMIN, IMAX, UMIN, UMAX
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl |2 +-
src/gallium/drivers/radeon/AMD
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPUUtil.cpp |1 +
src/gallium/drivers/radeon/R600CodeEmitter.cpp |2 ++
2 files changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeon/AMDGPUUtil.cpp
b/src/gallium/drivers/radeon/AMDGPUUtil.cpp
index 78e1c4b..f
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/R600InstrInfo.cpp | 12
src/gallium/drivers/radeon/R600InstrInfo.h |1 +
src/gallium/drivers/radeon/R600Instructions.td |8 +
.../drivers/radeon/radeon_setup_tgsi_llvm.c| 32 +
Signed-off-by: Vadim Girlin
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.c|2 --
src/gallium/drivers/r600/r600_llvm.c |4
src/gallium/drivers/radeon/AMDGPUIntrinsics.td |4
src/gallium/drivers/radeon/AMDGPUUtil.cpp |4
src/gallium
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_llvm.c | 34
src/gallium/drivers/radeon/radeon_llvm.h |7
.../drivers/radeon/radeon_setup_tgsi_llvm.c|9 ++
3 files changed, 50 insertions(+)
diff --git a/src/gal
Set the input registers as live-in for entry basic block.
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPULowerShaderInstructions.cpp |3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeon/AMDGPULowerShaderInstructions.cpp
b/src/gallium/drivers/rad
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPULowerInstructions.cpp |9 +
src/gallium/drivers/radeon/R600GenRegisterInfo.pl |2 +-
src/gallium/drivers/radeon/R600ISelLowering.cpp|4
src/gallium/drivers/radeon/R600Instructions.td |
Swap source operands for SETGE_INT.
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/R600LowerInstructions.cpp |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/R600LowerInstructions.cpp
b/src/gallium/drivers/radeon/R600LowerInstruct
We're using float as default type, so basically for every instruction that
wants other types for dst/src operands we need to perform the bitcast
to/from default float. Currently bitcast produces no-op MOV instruction,
will be eliminated later.
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/
Replacing "float equal to 1.0f" with "int not equal to 0".
This should help for further optimization of boolean computations.
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/galli
Some fixes, missing instructions, etc for llvm backend. Comparing to
non-llvm backend, it still fails 9 tests for me on evergreen.
Also you can find these patches in my github mesa repo, r600_llvm branch:
https://github.com/VadimGirlin/mesa.git
radeon/llvm: use bitcasts for integers
r
On 05/07/2012 09:27 AM, Marek Olšák wrote:
On Mon, May 7, 2012 at 7:11 AM, Mathias Fröhlich
wrote:
Hi Marek,
On Saturday, May 05, 2012 22:12:51 Marek Olšák wrote:
could somebody please take a look at this series? It changes a couple
of things in gl_context and the vbo module.
The other two
For the series, Reviewed-by: Brian Paul
but I posted some comments for the other two patches.
-Brian
On 05/05/2012 02:12 PM, Marek Olšák wrote:
Hi,
could somebody please take a look at this series? It changes a couple
of things in gl_context and the vbo module.
The other two patches are:
[
On Tue, Apr 24, 2012 at 4:00 PM, Marek Olšák wrote:
> In the future we'd like to treat vertex arrays as a state and
> not as a parameter to the draw function. This is the first step
> towards that goal.
Part of the goal is to avoid array re-validation for every draw call,
right? Maybe say so in
Looks good, but it took me a while to understand exactly what's going
on. Suggestions for more/improved comments below.
On Tue, Apr 24, 2012 at 4:00 PM, Marek Olšák wrote:
> The vbo module recomputes its states if _NEW_ARRAY is set, so it shouldn't use
> the same flag to notify the driver. Since
v2: Enabled CEIL on Cayman too.
Signed-off-by: Kai Wasserbäch
Reviewed-by: Tom Stellard
---
Thanks for the review, Tom!
If this patch is accepted, please apply it to master for me, I don't have
commit access on FDO.
src/gallium/drivers/r600/r600_shader.c |6 +++---
1 file changed, 3 in
On Mon, May 7, 2012 at 7:11 AM, Mathias Fröhlich
wrote:
>
> Hi Marek,
>
> On Saturday, May 05, 2012 22:12:51 Marek Olšák wrote:
>> could somebody please take a look at this series? It changes a couple
>> of things in gl_context and the vbo module.
>>
>> The other two patches are:
>> [PATCH 2/3] me
On Sat, May 05, 2012 at 09:01:42PM +0200, Kai Wasserbäch wrote:
>
> Signed-off-by: Kai Wasserbäch
> ---
> This patch should enable CEIL on r600g for r600 to Evergreen. Not sure if
> Cayman's registers are already covered by the EG definitions.
The opcode for CEIL is the same on Evergreen and C
On Sat, May 05, 2012 at 10:19:28AM -0500, Aaron Watry wrote:
> Based on the code from llvmpipe.
> ---
> .../drivers/radeon/radeon_setup_tgsi_llvm.c| 30
>
> 1 files changed, 30 insertions(+), 0 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/radeon_setup_t
On 05/05/2012 06:41 AM, Christoph Bumiller wrote:
---
src/gallium/drivers/i915/i915_fpc_translate.c | 16
src/gallium/drivers/nv30/nvfx_fragprog.c |4
src/gallium/drivers/nv30/nvfx_vertprog.c |4
3 files changed, 24 insertions(+), 0 deletions(-)
On 05/05/2012 06:43 AM, Christoph Bumiller wrote:
Test case for the "glsl_to_tgsi: use TGSI_OPCODE_CEIL for ir_unop_ceil"
patch attached.
It seems to me that also testing a fractional value would be a good idea.
-Brian
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On Sun, May 6, 2012 at 8:47 AM, Dave Witbrodt wrote:
> I was updating my Mesa build setup, having not looked carefully at it for
> about a year, and I became confused about the version of the upstream git
> HEAD. Running 'grep -C 1 VERSION Makefile' gives me:
>
> PACKAGE_VERSION=8.1-devel
> PACKA
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