Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.149 -> 1.150
X86ISelLowering.cpp updated: 1.413 -> 1.414
X86ISelLowering.h updated: 1.100 -> 1.101
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so t
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.148 -> 1.149
---
Log message:
Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
---
Diffs of the changes: (+8 -6)
X86ISelDAGToDAG.cpp | 14 --
1 files changed, 8 insertions(+), 6 deletions(-)
Index: llv
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.147 -> 1.148
---
Log message:
Oops :)
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/T
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.146 -> 1.147
---
Log message:
Don't allow MatchAddress recurse too much. This trims exponential
behaviour in some cases.
---
Diffs of the changes: (+14 -6)
X86ISelDAGToDAG.cpp | 20 ++--
1 files cha
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.145 -> 1.146
X86InstrInfo.cpp updated: 1.78 -> 1.79
---
Log message:
Two changes:
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.144 -> 1.145
---
Log message:
Fix a miscompilation in the addr mode code trying to implement X | C and
X + C to promote LEA formation. We would incorrectly apply it in some cases
(test) and miss it in others.
This fixes
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.143 -> 1.144
X86ISelLowering.cpp updated: 1.314 -> 1.315
X86Subtarget.cpp updated: 1.49 -> 1.50
---
Log message:
Linux GOT indirect reference is only necessary in PIC mode.
---
Diffs of the changes: (+5 -3)
X86ISelDAGT
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.142 -> 1.143
X86TargetAsmInfo.cpp updated: 1.19 -> 1.20
---
Log message:
Adjust #includes to compensate for lost of DerivedTypes.h in
TargetLowering.h
---
Diffs of the changes: (+2 -0)
X86ISelDAGToDAG.cpp |1 +
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.138 -> 1.139
---
Log message:
Fix for PR1062: http://llvm.org/PR1062 by Dan Gohman.
---
Diffs of the changes: (+2 -4)
X86ISelDAGToDAG.cpp |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
Index: llvm/l
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.135 -> 1.136
---
Log message:
Revert an unintended change.
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.132 -> 1.133
X86ISelLowering.cpp updated: 1.298 -> 1.299
X86ISelLowering.h updated: 1.80 -> 1.81
X86InstrInfo.td updated: 1.295 -> 1.296
X86InstrX86-64.td updated: 1.8 -> 1.9
---
Log message:
- Use a different wrapper node
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.131 -> 1.132
---
Log message:
Clean up.
---
Diffs of the changes: (+8 -8)
X86ISelDAGToDAG.cpp | 16
1 files changed, 8 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
d
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.128 -> 1.129
---
Log message:
For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH regist
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.124 -> 1.125
---
Log message:
Add all implicit defs to FP_REG_KILL mi.
---
Diffs of the changes: (+6 -1)
X86ISelDAGToDAG.cpp |7 ++-
1 files changed, 6 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.123 -> 1.124
---
Log message:
Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check t
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.122 -> 1.123
---
Log message:
Match tblegen changes.
---
Diffs of the changes: (+16 -15)
X86ISelDAGToDAG.cpp | 31 ---
1 files changed, 16 insertions(+), 15 deletions(-)
Index: llvm/lib/
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.121 -> 1.122
X86RegisterInfo.h updated: 1.41 -> 1.42
---
Log message:
Unbreak VC++ build.
---
Diffs of the changes: (+4 -2)
X86ISelDAGToDAG.cpp |2 +-
X86RegisterInfo.h |4 +++-
2 files changed, 4 insertions(
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.120 -> 1.121
---
Log message:
silence warning
---
Diffs of the changes: (+0 -6)
X86ISelDAGToDAG.cpp |6 --
1 files changed, 6 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Targ
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.119 -> 1.120
---
Log message:
SelectScalarSSELoad should call CanBeFoldedBy as well.
---
Diffs of the changes: (+7 -3)
X86ISelDAGToDAG.cpp | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
Index: ll
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.118 -> 1.119
---
Log message:
Corrected load folding check. We need to start from the root of the sub-dag
being matched and ensure there isn't a non-direct path to the load (i.e. a
path that goes out of the sub-dag.)
---
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.117 -> 1.118
X86ISelLowering.cpp updated: 1.274 -> 1.275
X86InstrFPStack.td updated: 1.7 -> 1.8
X86InstrInfo.td updated: 1.291 -> 1.292
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
--
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.116 -> 1.117
---
Log message:
Doh. This wasn't causing problems by luck.
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86I
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.115 -> 1.116
---
Log message:
fix compilation failure of smg2000
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGT
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.114 -> 1.115
---
Log message:
Fold "zero extending vector loads" now that evan added the chain manip stuff.
This compiles both tests in X86/vec_ss_load_fold.ll into:
_test1:
movss 4(%esp), %xmm0
subss LCPI
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.113 -> 1.114
---
Log message:
ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands.
---
Diffs of the changes: (+10 -7)
X86ISelDAGToDAG.cpp | 17 ++---
1 files changed, 10 insertio
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.112 -> 1.113
---
Log message:
More isel time load folding checking for nodes that produce flag values.
See comment in CanBeFoldedBy() for detailed explanation.
---
Diffs of the changes: (+57 -6)
X86ISelDAGToDAG.cpp |
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.111 -> 1.112
X86ISelLowering.cpp updated: 1.271 -> 1.272
X86InstrFPStack.td updated: 1.6 -> 1.7
X86InstrInfo.td updated: 1.287 -> 1.288
X86InstrSSE.td updated: 1.162 -> 1.163
X86InstrX86-64.td updated: 1.3 -> 1.4
---
Log me
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.110 -> 1.111
X86InstrSSE.td updated: 1.161 -> 1.162
---
Log message:
completely disable folding of loads into scalar sse instructions and provide
a framework for doing it right. This fixes
CodeGen/X86/2006-10-07-ScalarSS
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.109 -> 1.110
---
Log message:
Not needed.
---
Diffs of the changes: (+0 -1)
X86ISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86I
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.107 -> 1.108
---
Log message:
Remove a unnecessary check.
---
Diffs of the changes: (+0 -1)
X86ISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.106 -> 1.107
---
Log message:
Fix a regression in the 32-bit port from the 64-bit port landing.
We now compile CodeGen/X86/lea-2.ll into:
_test:
movl 4(%esp), %eax
movl 8(%esp), %ecx
leal -5(%ecx,%
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.105 -> 1.106
X86ISelLowering.cpp updated: 1.254 -> 1.255
---
Log message:
Reflects MachineConstantPoolEntry changes.
---
Diffs of the changes: (+5 -4)
X86ISelDAGToDAG.cpp |4 ++--
X86ISelLowering.cpp |5 +++--
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.103 -> 1.104
---
Log message:
Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen.
Suppose the TokenFactor can reach the Op:
[Load chain]
^
|
[Load]
^
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.102 -> 1.103
---
Log message:
Remove dead code.
---
Diffs of the changes: (+0 -4)
X86ISelDAGToDAG.cpp |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Targe
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.101 -> 1.102
---
Log message:
Don't performance load/op/store transformation if op produces a floating point
or vector result. X86 does not have load/mod/store variants of those
instructions.
---
Diffs of the changes: (
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.99 -> 1.100
---
Log message:
Avoid making unneeded load/mod/store transformation which can hurt performance.
---
Diffs of the changes: (+10 -5)
X86ISelDAGToDAG.cpp | 15 ++-
1 files changed, 10 insertions
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.98 -> 1.99
---
Log message:
Add an optional pass to preprocess the DAG before x86 isel to allow selecting
more load/mod/store instructions.
---
Diffs of the changes: (+130 -0)
X86ISelDAGToDAG.cpp | 130 ++
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.96 -> 1.97
---
Log message:
Do not use getTargetNode() and SelectNodeTo() which takes more than 3
SDOperand arguments. Use the variants which take an array and number instead.
---
Diffs of the changes: (+4 -4)
X86ISel
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.95 -> 1.96
---
Log message:
SelectNodeTo now returns a SDNode*.
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToD
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.94 -> 1.95
---
Log message:
Select() no longer require Result operand by reference.
---
Diffs of the changes: (+17 -16)
X86ISelDAGToDAG.cpp | 33 +
1 files changed, 17 insertions(+), 1
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.93 -> 1.94
---
Log message:
Match tblgen changes; clean up.
---
Diffs of the changes: (+34 -79)
X86ISelDAGToDAG.cpp | 113 +++-
1 files changed, 34 insertions(+), 79 del
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.92 -> 1.93
---
Log message:
Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match
tablegen.
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 dele
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.91 -> 1.92
---
Log message:
SelectNodeTo() may return a SDOperand that is different from the input.
---
Diffs of the changes: (+1 -2)
X86ISelDAGToDAG.cpp |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
In
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.90 -> 1.91
X86ISelLowering.cpp updated: 1.243 -> 1.244
---
Log message:
Match tablegen changes.
---
Diffs of the changes: (+38 -20)
X86ISelDAGToDAG.cpp | 26 ++
X86ISelLowering.cpp | 32
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.89 -> 1.90
---
Log message:
Eliminate reachability matrix. It has to be calculated before any instruction
selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a sea
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.88 -> 1.89
---
Log message:
Match tablegen isel changes.
---
Diffs of the changes: (+54 -101)
X86ISelDAGToDAG.cpp | 155 ++--
1 files changed, 54 insertions(+), 101 dele
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.87 -> 1.88
---
Log message:
Reflect change to AssignTopologicalOrder().
---
Diffs of the changes: (+8 -5)
X86ISelDAGToDAG.cpp | 13 -
1 files changed, 8 insertions(+), 5 deletions(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.86 -> 1.87
---
Log message:
Use of vector causes some horrendous compile time regression (2x)!
Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.
---
Diffs of the
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.85 -> 1.86
---
Log message:
Factor topological order code to SelectionDAG. Clean up.
---
Diffs of the changes: (+23 -87)
X86ISelDAGToDAG.cpp | 110 ++--
1 files changed,
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.84 -> 1.85
---
Log message:
Can't spell.
---
Diffs of the changes: (+15 -15)
X86ISelDAGToDAG.cpp | 30 +++---
1 files changed, 15 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/X86/X8
On Fri, 2006-07-28 at 01:05 -0500, Evan Cheng wrote:
> +void DetermineReachibility(SDNode *f, SDNode *t);
Hate to be pedantic about this, but its "Reachability" (a between h and
b)
Reid.
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http:/
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.83 -> 1.84
---
Log message:
Some clean up.
---
Diffs of the changes: (+8 -6)
X86ISelDAGToDAG.cpp | 14 --
1 files changed, 8 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.82 -> 1.83
---
Log message:
Rename IsFoldableBy to CanBeFoldedleBy
---
Diffs of the changes: (+3 -3)
X86ISelDAGToDAG.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86I
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.81 -> 1.82
---
Log message:
Node selected into address mode cannot be folded.
---
Diffs of the changes: (+39 -0)
X86ISelDAGToDAG.cpp | 39 +++
1 files changed, 39 insertions(+)
I
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.80 -> 1.81
---
Log message:
Another duh. Determine topological order before any target node is added.
---
Diffs of the changes: (+13 -13)
X86ISelDAGToDAG.cpp | 26 +-
1 files changed, 13 inser
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.79 -> 1.80
---
Log message:
Brain cramp..
---
Diffs of the changes: (+1 -3)
X86ISelDAGToDAG.cpp |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.78 -> 1.79
---
Log message:
Allocating too large an array for ReachibilityMatrix.
---
Diffs of the changes: (+5 -2)
X86ISelDAGToDAG.cpp |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/lib
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.77 -> 1.78
---
Log message:
Calculate the portion of reachbility matrix on demand.
---
Diffs of the changes: (+42 -11)
X86ISelDAGToDAG.cpp | 53 +---
1 files changed, 4
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.76 -> 1.77
---
Log message:
isNonImmUse is replaced by IsFoldableBy
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDA
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.75 -> 1.76
---
Log message:
Use reachbility information to determine whether a node can be folded into
another during isel.
---
Diffs of the changes: (+118 -3)
X86ISelDAGToDAG.cpp | 121 ++
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.73 -> 1.74
---
Log message:
Add support for "m" inline asm constraints.
---
Diffs of the changes: (+29 -1)
X86ISelDAGToDAG.cpp | 30 +-
1 files changed, 29 insertions(+), 1 deletion(-)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.72 -> 1.73
X86RegisterInfo.cpp updated: 1.155 -> 1.156
---
Log message:
Cygwin support. Patch by Anton Korobeynikov!
---
Diffs of the changes: (+28 -4)
X86ISelDAGToDAG.cpp |9 +++--
X86RegisterInfo.cpp | 23
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.71 -> 1.72
---
Log message:
Use xor to clear a register.
---
Diffs of the changes: (+4 -6)
X86ISelDAGToDAG.cpp | 10 --
1 files changed, 4 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAG
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.70 -> 1.71
---
Log message:
Remove bogus comment.
---
Diffs of the changes: (+0 -1)
X86ISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.69 -> 1.70
X86InstrInfo.td updated: 1.271 -> 1.272
---
Log message:
A addressing mode folding enhancement:
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
return (x << 3) + 7;
}
This can be codegen'd as
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.68 -> 1.69
---
Log message:
Assert if InflightSet is not cleared after instruction selecting a BB.
---
Diffs of the changes: (+1 -0)
X86ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Targ
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.67 -> 1.68
---
Log message:
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.
---
Diffs of the changes: (+2 -0)
X86ISelDAGToDAG.cpp |2 ++
1 files changed, 2 i
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.66 -> 1.67
X86ISelLowering.h updated: 1.64 -> 1.65
X86InstrBuilder.h updated: 1.20 -> 1.21
X86InstrInfo.h updated: 1.51 -> 1.52
X86JITInfo.cpp updated: 1.18 -> 1.19
X86Relocations.h updated: 1.2 -> 1.3
---
Log message:
Pat
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.65 -> 1.66
---
Log message:
Back out indirect branch load folding hack. It broke some tests.
---
Diffs of the changes: (+0 -63)
X86ISelDAGToDAG.cpp | 63
1 files c
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.64 -> 1.65
---
Log message:
- Use of load's chain result should be redirected to load's chain operand.
If it reads the chain result of the call, then the use, callseq_start,
and call would form a cycle!
- Don't forget
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.63 -> 1.64
---
Log message:
Missing break statements.
---
Diffs of the changes: (+3 -0)
X86ISelDAGToDAG.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.62 -> 1.63
X86InstrInfo.td updated: 1.270 -> 1.271
---
Log message:
Remove unused patterns.
---
Diffs of the changes: (+4 -7)
X86ISelDAGToDAG.cpp |3 ++-
X86InstrInfo.td |8 ++--
2 files changed, 4 ins
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.61 -> 1.62
---
Log message:
Handle indirect call which folds a load manually. This never matches by
the TableGen generated code since the load's chain result is read by
the callseq_start node.
---
Diffs of the changes:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.59 -> 1.60
---
Log message:
Remove dead code
---
Diffs of the changes: (+1 -4)
X86ISelDAGToDAG.cpp |5 +
1 files changed, 1 insertion(+), 4 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.56 -> 1.57
---
Log message:
#include Intrinsics.h into all dag isels
---
Diffs of the changes: (+1 -0)
X86ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
dif
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.54 -> 1.55
---
Log message:
Don't match x << 1 to LEAL. It's better to emit x + x.
---
Diffs of the changes: (+4 -1)
X86ISelDAGToDAG.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.53 -> 1.54
---
Log message:
* Cleaned up addressing mode matching code.
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
they
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.52 -> 1.53
X86ISelLowering.cpp updated: 1.95 -> 1.96
X86ISelLowering.h updated: 1.31 -> 1.32
X86InstrInfo.td updated: 1.248 -> 1.249
---
Log message:
- Clean up the lowering and selection code of ConstantPool, GlobalAddres
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.50 -> 1.51
---
Log message:
X86 codegen tweak to use lea in another case:
Suppose base == %eax and it has multiple uses, then instead of
movl %eax, %ecx
addl $8, %ecx
use
leal 8(%eax), %ecx.
---
Diffs of the chan
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.48 -> 1.49
---
Log message:
Prevent certain nodes that have already been selected from being folded into
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that i
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.47 -> 1.48
---
Log message:
Nicer code. :-)
---
Diffs of the changes: (+18 -17)
X86ISelDAGToDAG.cpp | 35 ++-
1 files changed, 18 insertions(+), 17 deletions(-)
Index: llvm/lib/Targ
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.46 -> 1.47
---
Log message:
Added X86 isel debugging stuff.
---
Diffs of the changes: (+63 -0)
X86ISelDAGToDAG.cpp | 63
1 files changed, 63 insertions(+)
Index
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.45 -> 1.46
---
Log message:
Match tblgen change.
---
Diffs of the changes: (+2 -2)
X86ISelDAGToDAG.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
dif
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.44 -> 1.45
---
Log message:
Match getTargetNode() changes (now return SDNode* instead of SDOperand).
---
Diffs of the changes: (+22 -14)
X86ISelDAGToDAG.cpp | 36 ++--
1 files changed
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.43 -> 1.44
---
Log message:
Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);
---
Diffs of the changes: (+53 -38)
X86ISelDAGToDAG.cpp | 91 +
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.42 -> 1.43
---
Log message:
- Update load folding checks to match those auto-generated by tblgen.
- Manually select SDOperand's returned by TryFoldLoad which make up the
load address.
---
Diffs of the changes: (+26 -1
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.41 -> 1.42
---
Log message:
Use SelectRoot() as entry of any tblgen based isel.
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Targe
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.40 -> 1.41
---
Log message:
Re-commit the last bit of change that was backed out.
---
Diffs of the changes: (+2 -13)
X86ISelDAGToDAG.cpp | 15 ++-
1 files changed, 2 insertions(+), 13 deletions(-)
Inde
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.39 -> 1.40
---
Log message:
Temporarily revert this patch, which probably breaks with the
tblgen patch reverted.
---
Diffs of the changes: (+13 -7)
X86ISelDAGToDAG.cpp | 20 +---
1 files changed, 13
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.38 -> 1.39
---
Log message:
Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.
---
Diffs of the changes: (+7 -13)
X86ISelDAGToDAG.cpp | 20 +++--
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.34 -> 1.35
---
Log message:
Didn't mean to check that in.
---
Diffs of the changes: (+0 -2)
X86ISelDAGToDAG.cpp |2 --
1 files changed, 2 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.33 -> 1.34
X86ISelLowering.cpp updated: 1.49 -> 1.50
---
Log message:
A obvious typo
---
Diffs of the changes: (+3 -1)
X86ISelDAGToDAG.cpp |2 ++
X86ISelLowering.cpp |2 +-
2 files changed, 3 insertions(+), 1
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.32 -> 1.33
X86ISelLowering.cpp updated: 1.42 -> 1.43
X86InstrInfo.td updated: 1.206 -> 1.207
---
Log message:
Fix FP_TO_INT**_IN_MEM lowering.
---
Diffs of the changes: (+132 -103)
X86ISelDAGToDAG.cpp | 58 -
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.31 -> 1.32
X86ISelLowering.cpp updated: 1.41 -> 1.42
X86ISelPattern.cpp updated: 1.197 -> 1.198
---
Log message:
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
---
Diffs of the changes: (+4 -
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.30 -> 1.31
---
Log message:
silence a warning
---
Diffs of the changes: (+1 -0)
X86ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X8
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.29 -> 1.30
---
Log message:
Select DYNAMIC_STACKALLOC
---
Diffs of the changes: (+44 -1)
X86ISelDAGToDAG.cpp | 45 -
1 files changed, 44 insertions(+), 1 deletion(-)
Ind
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.28 -> 1.29
X86ISelLowering.cpp updated: 1.27 -> 1.28
X86ISelPattern.cpp updated: 1.192 -> 1.193
X86InstrInfo.td updated: 1.195 -> 1.196
---
Log message:
* Add special entry code main() (to set x87 to 64-bit precision).
* A
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.27 -> 1.28
X86ISelPattern.cpp updated: 1.191 -> 1.192
---
Log message:
implement FP_REG_KILL insertion for the dag-dag instruction selector
---
Diffs of the changes: (+59 -1)
X86ISelDAGToDAG.cpp | 59 +++
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.26 -> 1.27
---
Log message:
Fit into 80 cols
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u l
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.25 -> 1.26
X86ISelLowering.cpp updated: 1.25 -> 1.26
X86InstrInfo.td updated: 1.192 -> 1.193
---
Log message:
FP_TO_INT*_IN_MEM and x87 FP Select support.
---
Diffs of the changes: (+131 -21)
X86ISelDAGToDAG.cpp | 5
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