[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.80 -> 1.81
---
Log message:

Another duh. Determine topological order before any target node is added.

---
Diffs of the changes:  (+13 -13)

 X86ISelDAGToDAG.cpp |   26 +++++++++++++-------------
 1 files changed, 13 insertions(+), 13 deletions(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.80 
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.81
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.80        Thu Jul 27 18:35:40 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp     Thu Jul 27 19:10:59 2006
@@ -99,7 +99,8 @@
       : SelectionDAGISel(X86Lowering),
         X86Lowering(*TM.getTargetLowering()),
         Subtarget(&TM.getSubtarget<X86Subtarget>()),
-        DAGSize(0), ReachibilityMatrix(NULL) {}
+        DAGSize(0), TopOrder(NULL), IdToOrder(NULL),
+        RMRange(NULL), ReachibilityMatrix(NULL) {}
 
     virtual bool runOnFunction(Function &Fn) {
       // Make sure we re-emit a set of the global base reg if necessary
@@ -242,7 +243,6 @@
 /// DetermineTopologicalOrdering - Determine topological ordering of the nodes
 /// in the DAG.
 void X86DAGToDAGISel::DetermineTopologicalOrdering() {
-  DAGSize = CurDAG->AssignNodeIds();
   TopOrder = new SDNode*[DAGSize];
   IdToOrder = new unsigned[DAGSize];
   memset(IdToOrder, 0, DAGSize * sizeof(unsigned));
@@ -280,7 +280,6 @@
 
 void X86DAGToDAGISel::DeterminReachibility(SDNode *f, SDNode *t) {
   if (!ReachibilityMatrix) {
-    DetermineTopologicalOrdering();
     unsigned RMSize = (DAGSize * DAGSize + 7) / 8;
     ReachibilityMatrix = new unsigned char[RMSize];
     memset(ReachibilityMatrix, 0, RMSize);
@@ -323,25 +322,26 @@
   DEBUG(BB->dump());
   MachineFunction::iterator FirstMBB = BB;
 
+  DAGSize = DAG.AssignNodeIds();
+  DetermineTopologicalOrdering();
+
   // Codegen the basic block.
 #ifndef NDEBUG
   DEBUG(std::cerr << "===== Instruction selection begins:\n");
   Indent = 0;
 #endif
   DAG.setRoot(SelectRoot(DAG.getRoot()));
-  assert(InFlightSet.empty() && "ISel InFlightSet has not been emptied!");
 #ifndef NDEBUG
   DEBUG(std::cerr << "===== Instruction selection ends:\n");
 #endif
-  if (ReachibilityMatrix) {
-    delete[] ReachibilityMatrix;
-    delete[] TopOrder;
-    delete[] IdToOrder;
-    delete[] RMRange;
-    ReachibilityMatrix = NULL;
-    TopOrder = NULL;
-    IdToOrder = RMRange = NULL;
-  }
+
+  delete[] ReachibilityMatrix;
+  delete[] TopOrder;
+  delete[] IdToOrder;
+  delete[] RMRange;
+  ReachibilityMatrix = NULL;
+  TopOrder = NULL;
+  IdToOrder = RMRange = NULL;
   CodeGenMap.clear();
   HandleMap.clear();
   ReplaceMap.clear();



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