Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.117 -> 1.118
X86ISelLowering.cpp updated: 1.274 -> 1.275
X86InstrFPStack.td updated: 1.7 -> 1.8
X86InstrInfo.td updated: 1.291 -> 1.292
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
---
Diffs of the changes: (+35 -43)
X86ISelDAGToDAG.cpp | 2 -
X86ISelLowering.cpp | 70 +++++++++++++++++++++++-----------------------------
X86InstrFPStack.td | 2 -
X86InstrInfo.td | 4 +-
4 files changed, 35 insertions(+), 43 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.117
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.118
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.117 Thu Oct 12 14:13:59 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Fri Oct 13 16:14:26 2006
@@ -372,7 +372,7 @@
void X86DAGToDAGISel::InstructionSelectPreprocess(SelectionDAG &DAG) {
for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
E = DAG.allnodes_end(); I != E; ++I) {
- if (I->getOpcode() != ISD::STORE)
+ if (!ISD::isNON_TRUNCStore(I))
continue;
SDOperand Chain = I->getOperand(0);
if (Chain.Val->getOpcode() != ISD::TokenFactor)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.274
llvm/lib/Target/X86/X86ISelLowering.cpp:1.275
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.274 Thu Oct 12 14:12:56 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Oct 13 16:14:26 2006
@@ -598,8 +598,7 @@
case MVT::f32: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 4;
break;
}
@@ -607,8 +606,7 @@
case MVT::f64: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 8;
break;
}
@@ -626,8 +624,7 @@
ArgOffset = ((ArgOffset + 15) / 16) * 16;
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 16;
}
}
@@ -988,8 +985,7 @@
unsigned VReg = AddLiveIn(MF, GPR64ArgRegs[NumIntRegs],
X86::GR64RegisterClass);
SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64);
- SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
- DAG.getSrcValue(NULL));
+ SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
MemOps.push_back(Store);
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(8, getPointerTy()));
@@ -1002,8 +998,7 @@
unsigned VReg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs],
X86::VR128RegisterClass);
SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32);
- SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
- DAG.getSrcValue(NULL));
+ SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
MemOps.push_back(Store);
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(16, getPointerTy()));
@@ -1126,8 +1121,7 @@
} else {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 8;
}
break;
@@ -1149,8 +1143,7 @@
}
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
if (ArgVT == MVT::f32 || ArgVT == MVT::f64)
ArgOffset += 8;
else
@@ -1631,16 +1624,14 @@
case MVT::f32: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 4;
break;
}
case MVT::f64: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 8;
break;
}
@@ -1661,8 +1652,7 @@
ArgOffset = ((ArgOffset + 15) / 16) * 16;
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 16;
}
}
@@ -1961,8 +1951,7 @@
case MVT::f32: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 4;
break;
}
@@ -1970,8 +1959,7 @@
case MVT::f64: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
- DAG.getSrcValue(NULL)));
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0));
ArgOffset += 8;
break;
}
@@ -3989,7 +3977,7 @@
int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0),
- StackSlot, DAG.getSrcValue(NULL));
+ StackSlot, NULL, 0);
// Build the FILD
std::vector<MVT::ValueType> Tys;
@@ -4050,7 +4038,7 @@
SDOperand Value = Op.getOperand(0);
if (X86ScalarSSE) {
assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!");
- Chain = DAG.getStore(Chain, Value, StackSlot, DAG.getSrcValue(0));
+ Chain = DAG.getStore(Chain, Value, StackSlot, NULL, 0);
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
Tys.push_back(MVT::Other);
@@ -4366,8 +4354,7 @@
MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
MemLoc = DAG.getFrameIndex(SSFI, getPointerTy());
- Chain = DAG.getStore(Op.getOperand(0), Value, MemLoc,
- DAG.getSrcValue(0));
+ Chain = DAG.getStore(Op.getOperand(0), Value, MemLoc, NULL, 0);
}
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
@@ -4570,7 +4557,7 @@
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
- DAG.getSrcValue(NULL));
+ NULL, 0);
BytesLeft -= 4;
Offset += 4;
}
@@ -4579,7 +4566,7 @@
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
- DAG.getSrcValue(NULL));
+ NULL, 0);
BytesLeft -= 2;
Offset += 2;
}
@@ -4588,7 +4575,7 @@
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
- DAG.getSrcValue(NULL));
+ NULL, 0);
}
}
@@ -4705,7 +4692,7 @@
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
- DAG.getSrcValue(NULL));
+ NULL, 0);
BytesLeft -= 4;
Offset += 4;
}
@@ -4718,7 +4705,7 @@
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
- DAG.getSrcValue(NULL));
+ NULL, 0);
BytesLeft -= 2;
Offset += 2;
}
@@ -4732,7 +4719,7 @@
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
- DAG.getSrcValue(NULL));
+ NULL, 0);
}
}
@@ -4758,11 +4745,14 @@
}
SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) {
+ SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
+
if (!Subtarget->is64Bit()) {
// vastart just stores the address of the VarArgsFrameIndex slot into the
// memory location argument.
SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
- return DAG.getStore(Op.getOperand(0),
FR,Op.getOperand(1),Op.getOperand(2));
+ return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV->getValue(),
+ SV->getOffset());
}
// __va_list_tag:
@@ -4775,7 +4765,7 @@
// Store gp_offset
SDOperand Store = DAG.getStore(Op.getOperand(0),
DAG.getConstant(VarArgsGPOffset, MVT::i32),
- FIN, Op.getOperand(2));
+ FIN, SV->getValue(), SV->getOffset());
MemOps.push_back(Store);
// Store fp_offset
@@ -4783,21 +4773,23 @@
DAG.getConstant(4, getPointerTy()));
Store = DAG.getStore(Op.getOperand(0),
DAG.getConstant(VarArgsFPOffset, MVT::i32),
- FIN, Op.getOperand(2));
+ FIN, SV->getValue(), SV->getOffset());
MemOps.push_back(Store);
// Store ptr to overflow_arg_area
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(4, getPointerTy()));
SDOperand OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
- Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, Op.getOperand(2));
+ Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV->getValue(),
+ SV->getOffset());
MemOps.push_back(Store);
// Store ptr to reg_save_area.
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(8, getPointerTy()));
SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy());
- Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, Op.getOperand(2));
+ Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV->getValue(),
+ SV->getOffset());
MemOps.push_back(Store);
return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size());
}
Index: llvm/lib/Target/X86/X86InstrFPStack.td
diff -u llvm/lib/Target/X86/X86InstrFPStack.td:1.7
llvm/lib/Target/X86/X86InstrFPStack.td:1.8
--- llvm/lib/Target/X86/X86InstrFPStack.td:1.7 Mon Oct 9 15:57:25 2006
+++ llvm/lib/Target/X86/X86InstrFPStack.td Fri Oct 13 16:14:26 2006
@@ -366,7 +366,7 @@
[(set RFP:$dst, (X86fild addr:$src, i64))]>;
def FpST32m : FpI<(ops f32mem:$op, RFP:$src), OneArgFP,
- [(truncstore RFP:$src, addr:$op, f32)]>;
+ [(truncstoref32 RFP:$src, addr:$op)]>;
def FpST64m : FpI<(ops f64mem:$op, RFP:$src), OneArgFP,
[(store RFP:$src, addr:$op)]>;
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.291
llvm/lib/Target/X86/X86InstrInfo.td:1.292
--- llvm/lib/Target/X86/X86InstrInfo.td:1.291 Thu Oct 12 12:49:27 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td Fri Oct 13 16:14:26 2006
@@ -2512,9 +2512,9 @@
def : Pat<(subc GR32:$src1, i32immSExt8:$src2),
(SUB32ri8 GR32:$src1, i32immSExt8:$src2)>;
-def : Pat<(truncstore (i8 imm:$src), addr:$dst, i1),
+def : Pat<(truncstorei1 (i8 imm:$src), addr:$dst),
(MOV8mi addr:$dst, imm:$src)>;
-def : Pat<(truncstore GR8:$src, addr:$dst, i1),
+def : Pat<(truncstorei1 GR8:$src, addr:$dst),
(MOV8mr addr:$dst, GR8:$src)>;
// Comparisons.
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