[llvm-branch-commits] [BOLT] Invoke terminator (PR #148333)

https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/148333 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT] Invoke terminator (PR #148333)

https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/148333 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] f1cc3ea - Revert "[clang] [ubsan] add __has_feature for UBSan checks (#148310)"

Author: Florian Mayer Date: 2025-07-11T18:01:09-07:00 New Revision: f1cc3eaf2707726d86efbb651478d7310b8a3840 URL: https://github.com/llvm/llvm-project/commit/f1cc3eaf2707726d86efbb651478d7310b8a3840 DIFF: https://github.com/llvm/llvm-project/commit/f1cc3eaf2707726d86efbb651478d7310b8a3840.diff

[llvm-branch-commits] ELF: Introduce R_AARCH64_PATCHINST relocation type. (PR #133534)

https://github.com/pcc edited https://github.com/llvm/llvm-project/pull/133534 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

https://github.com/inbelic edited https://github.com/llvm/llvm-project/pull/147832 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

@@ -27,51 +36,68 @@ RootSignatureParser::RootSignatureParser( bool RootSignatureParser::parse() { // Iterate as many RootSignatureElements as possible, until we hit the // end of the stream + bool HadError = false; inbelic wrote: The pattern that I have s

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

https://github.com/inbelic edited https://github.com/llvm/llvm-project/pull/147832 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

@@ -27,51 +36,68 @@ RootSignatureParser::RootSignatureParser( bool RootSignatureParser::parse() { // Iterate as many RootSignatureElements as possible, until we hit the // end of the stream + bool HadError = false; while (!peekExpectedToken(TokenKind::end_of_stream)) {

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

@@ -27,51 +36,68 @@ RootSignatureParser::RootSignatureParser( bool RootSignatureParser::parse() { // Iterate as many RootSignatureElements as possible, until we hit the // end of the stream + bool HadError = false; while (!peekExpectedToken(TokenKind::end_of_stream)) {

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

@@ -27,51 +36,68 @@ RootSignatureParser::RootSignatureParser( bool RootSignatureParser::parse() { // Iterate as many RootSignatureElements as possible, until we hit the // end of the stream + bool HadError = false; while (!peekExpectedToken(TokenKind::end_of_stream)) {

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

https://github.com/inbelic updated https://github.com/llvm/llvm-project/pull/147832 >From 7ec7e32d2ac4945a489d5463b9fb700b0cceff9d Mon Sep 17 00:00:00 2001 From: Finn Plummer Date: Wed, 9 Jul 2025 21:21:53 + Subject: [PATCH 1/3] [HLSL][RootSignature] Implement multiple diagnostics in `Root

[llvm-branch-commits] [llvm] [IR2Vec] Add embeddings mode to llvm-ir2vec tool (PR #147844)

https://github.com/svkeerthy updated https://github.com/llvm/llvm-project/pull/147844 >From 6fd2dcac888426bc68570a6352e3f9c7b5fb358c Mon Sep 17 00:00:00 2001 From: svkeerthy Date: Wed, 9 Jul 2025 22:44:03 + Subject: [PATCH] IR2Vec Tool Enhancements --- llvm/test/lit.cfg.py

[llvm-branch-commits] [clang] [HLSL][RootSignature] Audit `RootSignatureParser` diagnostic production (PR #147800)

https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/147800 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [HLSL][RootSignature] Audit `RootSignatureParser` diagnostic production (PR #147800)

https://github.com/Icohedron approved this pull request. Seems fine to me. Could use a second approval to make sure https://github.com/llvm/llvm-project/pull/147800 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.l

[llvm-branch-commits] [clang] [HLSL][RootSignature] Audit `RootSignatureParser` diagnostic production (PR #147800)

https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/147800 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [HLSL][RootSignature] Audit `RootSignatureParser` diagnostic production (PR #147800)

@@ -17,24 +17,89 @@ void bad_root_signature_2() {} [RootSignature(""), RootSignature("")] // expected-warning {{attribute 'RootSignature' is already applied}} void bad_root_signature_3() {} -[RootSignature("DescriptorTable(), invalid")] // expected-error {{expected end of st

[llvm-branch-commits] [clang] [HLSL][RootSignature] Allow for multiple parsing errors in `RootSignatureParser` (PR #147832)

https://github.com/joaosaffran approved this pull request. https://github.com/llvm/llvm-project/pull/147832 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] 9c48cb1 - Revert "[mlir][vector] Refactor WarpOpScfForOp to support unused or swapped f…"

Author: Charitha Saumya Date: 2025-07-11T13:19:18-07:00 New Revision: 9c48cb1fcd99423956f2dd376ddf6c44b80c343d URL: https://github.com/llvm/llvm-project/commit/9c48cb1fcd99423956f2dd376ddf6c44b80c343d DIFF: https://github.com/llvm/llvm-project/commit/9c48cb1fcd99423956f2dd376ddf6c44b80c343d.dif

[llvm-branch-commits] [clang] [HLSL][RootSignature] Audit `RootSignatureParser` diagnostic production (PR #147800)

https://github.com/joaosaffran approved this pull request. https://github.com/llvm/llvm-project/pull/147800 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [IR2Vec] Add embeddings mode to llvm-ir2vec tool (PR #147844)

https://github.com/svkeerthy updated https://github.com/llvm/llvm-project/pull/147844 >From bf757c03868bf5e85966440408e41f5343727384 Mon Sep 17 00:00:00 2001 From: svkeerthy Date: Wed, 9 Jul 2025 22:44:03 + Subject: [PATCH] IR2Vec Tool Enhancements --- llvm/test/tools/llvm-ir2vec/embeddin

[llvm-branch-commits] [llvm] [IR2Vec] Add embeddings mode to llvm-ir2vec tool (PR #147844)

https://github.com/svkeerthy updated https://github.com/llvm/llvm-project/pull/147844 >From bf757c03868bf5e85966440408e41f5343727384 Mon Sep 17 00:00:00 2001 From: svkeerthy Date: Wed, 9 Jul 2025 22:44:03 + Subject: [PATCH] IR2Vec Tool Enhancements --- llvm/test/tools/llvm-ir2vec/embeddin

[llvm-branch-commits] [llvm] [IR2Vec] Add llvm-ir2vec tool for generating triplet embeddings (PR #147842)

https://github.com/svkeerthy updated https://github.com/llvm/llvm-project/pull/147842 >From 5f1f3fe9f7e07bb44802d3026fdf8ac3abf89ba2 Mon Sep 17 00:00:00 2001 From: svkeerthy Date: Wed, 9 Jul 2025 22:39:39 + Subject: [PATCH] IR2Vec Tool --- llvm/test/CMakeLists.txt| 1 +

[llvm-branch-commits] [llvm] [DirectX] Improve error accumulation in root signature parsing (PR #144465)

llvm-beanz wrote: Looking at this PR and https://github.com/llvm/llvm-project/pull/144577 led me to look a bit more at the code around this. I think the way you're handling errors in this code is a bit sub-optimal. Instead of having a bunch of report functions and chains of functions returning

[llvm-branch-commits] [llvm] [DirectX] Improve error handling and validation in root signature parsing (PR #144577)

https://github.com/Icohedron dismissed https://github.com/llvm/llvm-project/pull/144577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DirectX] Improve error handling and validation in root signature parsing (PR #144577)

@@ -48,6 +48,71 @@ static bool reportValueError(LLVMContext *Ctx, Twine ParamName, return true; } +// Template function to get formatted type string based on C++ type +template std::string getTypeFormatted() { + if constexpr (std::is_same_v) { +return "string"; + } e

[llvm-branch-commits] [llvm] [DirectX] Improve error handling and validation in root signature parsing (PR #144577)

@@ -48,6 +48,71 @@ static bool reportValueError(LLVMContext *Ctx, Twine ParamName, return true; } +// Template function to get formatted type string based on C++ type +template std::string getTypeFormatted() { + if constexpr (std::is_same_v) { +return "string"; + } e

[llvm-branch-commits] [llvm] [DirectX] Improve error handling and validation in root signature parsing (PR #144577)

@@ -48,6 +48,71 @@ static bool reportValueError(LLVMContext *Ctx, Twine ParamName, return true; } +// Template function to get formatted type string based on C++ type +template std::string getTypeFormatted() { llvm-beanz wrote: Looks like this could be a

[llvm-branch-commits] [llvm] [DirectX] Improve error accumulation in root signature parsing (PR #144465)

@@ -699,19 +736,20 @@ static bool verifyBorderColor(uint32_t BorderColor) { static bool verifyLOD(float LOD) { return !std::isnan(LOD); } static bool validate(LLVMContext *Ctx, const mcdxbc::RootSignatureDesc &RSD) { - + bool HasError = false; if (!verifyVersion(RSD.Versio

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj ready_for_review https://github.com/llvm/llvm-project/pull/148241 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

@@ -113,7 +113,7 @@ define void @banerjee1(ptr %A, ptr %B, i64 %m, i64 %n) nounwind uwtable ssp { ; CHECK-NEXT: Src: %2 = load i64, ptr %arrayidx6, align 8 --> Dst: store i64 %2, ptr %B.addr.12, align 8 ; CHECK-NEXT:da analyze - confused! ; CHECK-NEXT: Src: store i64 %2

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/148241 >From d914ea5f3c44387570cab65ce9a507ebf429f827 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 11 Jul 2025 13:10:44 + Subject: [PATCH 1/3] [DA] Add check for base pointer invariance --- llvm/lib

[llvm-branch-commits] [llvm] [SimplifyLibCalls] Add initial support for non-8-bit bytes (PR #106542)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106542 >From a7b7545c2e895b46a5aaa7525ad030ea0c48c163 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 16:09:44 +0300 Subject: [PATCH] [SimplifyLibCalls] Add initial support for non-8-bit by

[llvm-branch-commits] [clang] [llvm] [ValueTracking] Add CharWidth argument to getConstantStringInfo (NFC) (PR #106541)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106541 >From 1591f0bc03f6e8437fad91870fddae87cf270ffd Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 23:51:13 +0300 Subject: [PATCH] [ValueTracking] Add CharWidth argument to getConstantS

[llvm-branch-commits] [llvm] [IRBuilder] Add getByteTy and use it in CreatePtrAdd (PR #106539)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106539 >From caa10b7614c372aea15ad17a23ec6e0a6b29f6a7 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 22 Aug 2024 15:10:58 +0300 Subject: [PATCH] [IRBuilder] Add getByteTy and use it in CreatePtrAdd T

[llvm-branch-commits] [llvm] [IR] Account for byte width in m_PtrAdd (PR #106540)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106540 >From 4d50f231545a49befa155dd68cb1e55cf8d7af33 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 29 Aug 2024 00:54:20 +0300 Subject: [PATCH] [IR] Account for byte width in m_PtrAdd The method has

[llvm-branch-commits] [llvm] [ValueTracking] Make isBytewiseValue byte width agnostic (PR #106538)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106538 >From 4650b11d6d467e0ca66fed3cea61ed3d77f98fd4 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Fri, 2 Aug 2024 13:14:49 +0300 Subject: [PATCH] [ValueTracking] Make isBytewiseValue byte width agnostic

[llvm-branch-commits] [llvm] [SimplifyLibCalls] Add initial support for non-8-bit bytes (PR #106542)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106542 >From c46fbb92b0573dc5dd79b6da7b6955df8b7db7c8 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 16:09:44 +0300 Subject: [PATCH] [SimplifyLibCalls] Add initial support for non-8-bit by

[llvm-branch-commits] [llvm] [mlir] [IR] Make @llvm.memset prototype byte width dependent (PR #106537)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106537 >From 2080c3eacf59f6a63aa8b400af9e1177f6f52cbd Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 1 Aug 2024 23:47:25 +0300 Subject: [PATCH] [IR] Make @llvm.memset prototype byte width dependent T

[llvm-branch-commits] [llvm] [SimplifyLibCalls] Add initial support for non-8-bit bytes (PR #106542)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106542 >From 4bf7017413eafc29a432941a56cb7356074828f7 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 16:09:44 +0300 Subject: [PATCH] [SimplifyLibCalls] Add initial support for non-8-bit by

[llvm-branch-commits] [clang] [llvm] [ValueTracking] Add CharWidth argument to getConstantStringInfo (NFC) (PR #106541)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106541 >From b878d8834e17681c4d53f2b65c6ed7b24d89f3c4 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 23:51:13 +0300 Subject: [PATCH] [ValueTracking] Add CharWidth argument to getConstantS

[llvm-branch-commits] [llvm] [IR] Account for byte width in m_PtrAdd (PR #106540)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106540 >From 68b0d700521ba040347ad0a04cf2e090fdd81d93 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 29 Aug 2024 00:54:20 +0300 Subject: [PATCH] [IR] Account for byte width in m_PtrAdd The method has

[llvm-branch-commits] [llvm] [IRBuilder] Add getByteTy and use it in CreatePtrAdd (PR #106539)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106539 >From 1655f416864eb0c5849d96aa10c1eb9214aecf5c Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 22 Aug 2024 15:10:58 +0300 Subject: [PATCH] [IRBuilder] Add getByteTy and use it in CreatePtrAdd T

[llvm-branch-commits] [llvm] [ValueTracking] Make isBytewiseValue byte width agnostic (PR #106538)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106538 >From 1f681888e8eb5629894a094755bc0c596cf62e6a Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Fri, 2 Aug 2024 13:14:49 +0300 Subject: [PATCH] [ValueTracking] Make isBytewiseValue byte width agnostic

[llvm-branch-commits] [llvm] [mlir] [IR] Make @llvm.memset prototype byte width dependent (PR #106537)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106537 >From 28662b70cdb4dbd2aafe3feddd2a09e14ea018aa Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 1 Aug 2024 23:47:25 +0300 Subject: [PATCH] [IR] Make @llvm.memset prototype byte width dependent T

[llvm-branch-commits] [llvm] [SimplifyLibCalls] Add initial support for non-8-bit bytes (PR #106542)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106542 >From d2b8f2e23d50c638c31c787003c0e67feac98f18 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 16:09:44 +0300 Subject: [PATCH] [SimplifyLibCalls] Add initial support for non-8-bit by

[llvm-branch-commits] [clang] [llvm] [ValueTracking] Add CharWidth argument to getConstantStringInfo (NFC) (PR #106541)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106541 >From 0a21746432336f2460bb916ede9cdb1a1ea61dd6 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Wed, 28 Aug 2024 23:51:13 +0300 Subject: [PATCH] [ValueTracking] Add CharWidth argument to getConstantS

[llvm-branch-commits] [llvm] [IR] Account for byte width in m_PtrAdd (PR #106540)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106540 >From 161e6baa5bd1b8349d79e4cf1f4d3ce32348502f Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 29 Aug 2024 00:54:20 +0300 Subject: [PATCH] [IR] Account for byte width in m_PtrAdd The method has

[llvm-branch-commits] [llvm] [IRBuilder] Add getByteTy and use it in CreatePtrAdd (PR #106539)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106539 >From 517a87c03b68e0a9392841276fd69dd3c483eb12 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 22 Aug 2024 15:10:58 +0300 Subject: [PATCH] [IRBuilder] Add getByteTy and use it in CreatePtrAdd T

[llvm-branch-commits] [llvm] [ValueTracking] Make isBytewiseValue byte width agnostic (PR #106538)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106538 >From 81781bc2aa7360f50688e24b361ef768d4d6f961 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Fri, 2 Aug 2024 13:14:49 +0300 Subject: [PATCH] [ValueTracking] Make isBytewiseValue byte width agnostic

[llvm-branch-commits] [llvm] [mlir] [IR] Make @llvm.memset prototype byte width dependent (PR #106537)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/106537 >From 83efc1aa133fb2e52e81ae4319c978859da61911 Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 1 Aug 2024 23:47:25 +0300 Subject: [PATCH] [IR] Make @llvm.memset prototype byte width dependent T

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj converted_to_draft https://github.com/llvm/llvm-project/pull/148241 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

@@ -4308,26 +4398,33 @@ static int64_t determineSVEStackObjectOffsets(MachineFrameInfo &MFI, "reference."); #endif - auto Assign = [&MFI](int FI, int64_t Offset) { + auto StackForObject = [&](int FI, uint64_t &ZPRStackTop, +uint64_t &P

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/148110 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

https://github.com/optimisan approved this pull request. https://github.com/llvm/llvm-project/pull/148110 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

https://github.com/MacDue updated https://github.com/llvm/llvm-project/pull/142391 >From 8664a890ef0567b92b82fd8eee8b69914fac678b Mon Sep 17 00:00:00 2001 From: Benjamin Maxwell Date: Thu, 8 May 2025 17:38:27 + Subject: [PATCH 1/8] [AArch64] Prepare for split ZPR and PPR area allocation (N

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)

https://github.com/optimisan approved this pull request. https://github.com/llvm/llvm-project/pull/148109 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/148109 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)

https://github.com/optimisan approved this pull request. https://github.com/llvm/llvm-project/pull/148108 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/148108 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/148107 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)

https://github.com/optimisan approved this pull request. https://github.com/llvm/llvm-project/pull/148107 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lld] ELF: Introduce R_AARCH64_FUNCINIT64 relocation type. (PR #133531)

@@ -0,0 +1,19 @@ +# REQUIRES: aarch64 + +# RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o +# RUN: ld.lld %t.o -o %t +# RUN: llvm-readelf -s -r %t | FileCheck %s +# RUN: ld.lld %t.o -o %t -pie +# RUN: llvm-readelf -s -r %t | FileCheck %s +# RUN: not ld.lld %t.o -o %t -shared

[llvm-branch-commits] [lld] ELF: Introduce R_AARCH64_FUNCINIT64 relocation type. (PR #133531)

https://github.com/smithp35 commented: I don't have any more significant comments and no objections to the patch. Going back to my previous comments I was most concerned when the target was an ifunc symbol and that is now not supported. https://github.com/llvm/llvm-project/pull/133531

[llvm-branch-commits] [lld] ELF: Introduce R_AARCH64_FUNCINIT64 relocation type. (PR #133531)

https://github.com/smithp35 edited https://github.com/llvm/llvm-project/pull/133531 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] ELF: Introduce R_AARCH64_PATCHINST relocation type. (PR #133534)

@@ -0,0 +1,41 @@ +# RUN: rm -rf %t && split-file %s %t +# RUN: llvm-mc -filetype=obj -triple=aarch64 %t/use.s -o %t/use-le.o +# RUN: llvm-mc -filetype=obj -triple=aarch64 %t/def.s -o %t/def-le.o + +## Deactivation symbol used without being defined: instruction emitted as usual. +

[llvm-branch-commits] ELF: Introduce R_AARCH64_PATCHINST relocation type. (PR #133534)

@@ -137,6 +137,7 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s, switch (type) { case R_AARCH64_ABS16: case R_AARCH64_ABS32: + case R_AARCH64_PATCHINST: smithp35 wrote: If the relocation is used as described in the RFC, with the target sym

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

@@ -4308,26 +4398,33 @@ static int64_t determineSVEStackObjectOffsets(MachineFrameInfo &MFI, "reference."); #endif - auto Assign = [&MFI](int FI, int64_t Offset) { + auto StackForObject = [&](int FI, uint64_t &ZPRStackTop, +uint64_t &P

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

https://github.com/MacDue edited https://github.com/llvm/llvm-project/pull/142391 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

@@ -4308,26 +4398,33 @@ static int64_t determineSVEStackObjectOffsets(MachineFrameInfo &MFI, "reference."); #endif - auto Assign = [&MFI](int FI, int64_t Offset) { + auto StackForObject = [&](int FI, uint64_t &ZPRStackTop, +uint64_t &P

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

@@ -4042,8 +4124,11 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF, }); // If any callee-saved registers are used, the frame cannot be eliminated. + auto [ZPRLocalStackSize, PPRLocalStackSize] = + determineSVEStackSizes(MF, AssignObjectOffset

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

https://github.com/sdesmalen-arm edited https://github.com/llvm/llvm-project/pull/142391 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)

https://github.com/sdesmalen-arm approved this pull request. LGTM with nits addressed. https://github.com/llvm/llvm-project/pull/142391 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listi

[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)

@@ -1775,6 +1775,44 @@ OpFoldResult cir::ComplexCreateOp::fold(FoldAdaptor adaptor) { return cir::ConstComplexAttr::get(realAttr, imagAttr); } +//===--===// xlauko wrote: These are copy/pa

[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)

@@ -2385,4 +2385,62 @@ def ComplexCreateOp : CIR_Op<"complex.create", [Pure, SameTypeOperands]> { let hasFolder = 1; } +//===--===// +// ComplexRealPtrOp +//===--

[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)

@@ -1775,6 +1775,44 @@ OpFoldResult cir::ComplexCreateOp::fold(FoldAdaptor adaptor) { return cir::ConstComplexAttr::get(realAttr, imagAttr); } +//===--===// +// ComplexRealPtrOp +//===--

[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)

@@ -1775,6 +1775,44 @@ OpFoldResult cir::ComplexCreateOp::fold(FoldAdaptor adaptor) { return cir::ConstComplexAttr::get(realAttr, imagAttr); } +//===--===// +// ComplexRealPtrOp +//===--

[llvm-branch-commits] [llvm] [Offload] Add global variable address/size queries (PR #147972)

https://github.com/RossBrunton updated https://github.com/llvm/llvm-project/pull/147972 >From 77a4183117cd259584c1bb4136aa27dd2b9548b0 Mon Sep 17 00:00:00 2001 From: Ross Brunton Date: Thu, 10 Jul 2025 15:34:17 +0100 Subject: [PATCH] [Offload] Add global variable address/size queries Add two n

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

@@ -0,0 +1,28 @@ +//===- llvm/CodeGen/ProcessImplicitDefs.h ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/148241 >From d914ea5f3c44387570cab65ce9a507ebf429f827 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 11 Jul 2025 13:10:44 + Subject: [PATCH 1/2] [DA] Add check for base pointer invariance --- llvm/lib

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/148241 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/148241 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [Offload] Add `olGetSymbolInfo[Size]` (PR #147962)

https://github.com/jhuber6 approved this pull request. https://github.com/llvm/llvm-project/pull/147962 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [Offload] Add `olGetSymbolInfo[Size]` (PR #147962)

jhuber6 wrote: > @jhuber6 Given that this interface matches the interface of other handles, > any change to how it fundamentally works should probably involve updating all > other getInfo queries. If we do decide to replace the Size variants, I think > that should be done as a separate task th

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/148241 >From d914ea5f3c44387570cab65ce9a507ebf429f827 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 11 Jul 2025 13:10:44 + Subject: [PATCH] [DA] Add check for base pointer invariance --- llvm/lib/Ana

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: Ryotaro Kasuga (kasuga-fj) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/148241.diff 2 Files Affected: - (modified) llvm/lib/Analysis/DependenceAnalysis.cpp (+16) - (modified) llvm/test/Analysis/DependenceAn

[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)

https://github.com/kasuga-fj created https://github.com/llvm/llvm-project/pull/148241 None >From 3596b1726514dda5942d99d4779852e01367c764 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 11 Jul 2025 13:10:44 + Subject: [PATCH] [DA] Add check for base pointer invariance --- llvm/l

[llvm-branch-commits] [clang] [LifetimeSafety] Add expired loans analysis (PR #148222)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff HEAD~1 HEAD --extensions cpp -- clang/lib/Analysis/LifetimeSafety.cpp ``

[llvm-branch-commits] [clang] [LifetimeSafety] Add expired loans analysis (PR #148222)

usx95 wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/148222?utm_source=stack-comment-downstack-mergeability-warning"; >

[llvm-branch-commits] [clang] [LifetimeSafety] Add expired loans analysis (PR #148222)

https://github.com/usx95 created https://github.com/llvm/llvm-project/pull/148222 None >From 14a9c8b50df11ce48ce15d0fbe29568b3e23b5a6 Mon Sep 17 00:00:00 2001 From: Utkarsh Saxena Date: Fri, 11 Jul 2025 11:11:47 + Subject: [PATCH] [LifetimeSafety] Add expired loans analysis --- clang/lib

[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)

https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/148008 >From 1bcd318939236190a30cfb3259bcb9ca972f1fd3 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Thu, 10 Jul 2025 10:18:32 -0500 Subject: [PATCH] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH

[llvm-branch-commits] [llvm] 43535be - Revert "[RISCV] AddEdge between mask producer and user of V0 (#146855)"

Author: Pengcheng Wang Date: 2025-07-11T18:59:23+08:00 New Revision: 43535be8ab3f6ffadd161358823d90c713c9d7be URL: https://github.com/llvm/llvm-project/commit/43535be8ab3f6ffadd161358823d90c713c9d7be DIFF: https://github.com/llvm/llvm-project/commit/43535be8ab3f6ffadd161358823d90c713c9d7be.diff

[llvm-branch-commits] [clang] [LifetimeSafety] Add script for performance benchmarking (PR #147315)

https://github.com/usx95 updated https://github.com/llvm/llvm-project/pull/147315 >From 7d9009c2f22bf3f0980f7fd811be3185192490cf Mon Sep 17 00:00:00 2001 From: Utkarsh Saxena Date: Mon, 7 Jul 2025 15:13:00 + Subject: [PATCH] [LifetimeSafety] Add script performance benchmarking --- .../Ana

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/145329 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)

https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/148110 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)

https://github.com/cdevadas approved this pull request. https://github.com/llvm/llvm-project/pull/148115 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)

https://github.com/cdevadas approved this pull request. https://github.com/llvm/llvm-project/pull/148114 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)

https://github.com/cdevadas approved this pull request. https://github.com/llvm/llvm-project/pull/148113 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)

https://github.com/cdevadas approved this pull request. https://github.com/llvm/llvm-project/pull/148112 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)

https://github.com/cdevadas approved this pull request. https://github.com/llvm/llvm-project/pull/148111 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)

@@ -579,8 +579,10 @@ template class CodeGenPassBuilder { void insertPass(InsertedPassT &&Pass) const { AfterCallbacks.emplace_back( [&](StringRef Name, MachineFunctionPassManager &MFPM) mutable { - if (Name == TargetPassT::name()) -MFPM.addP

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