On Mon, Mar 06, 2017 at 01:03:19PM +0100, Gabriel Paubert wrote:
> > > > The PowerPC divw etc. instructions do not trap by themselves, but recent
> > > > GCC inserts trap instructions on code paths that are always undefined
> > > > behaviour (like, dividing by zero).
> > >
> > > Is it systematic o
From: Peter Zijlstra
> Sent: 06 March 2017 11:22
> To: Madhavan Srinivasan
> Cc: Wang Nan; Alexander Shishkin; linux-ker...@vger.kernel.org; Arnaldo
> Carvalho de Melo; Alexei
> Starovoitov; Ingo Molnar; Stephane Eranian; Sukadev Bhattiprolu;
> linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH
On 2017/03/04 09:49AM, Masami Hiramatsu wrote:
> On Thu, 2 Mar 2017 23:25:06 +0530
> "Naveen N. Rao" wrote:
>
> > We indicate support for accepting sym+offset with kretprobes through a
> > line in ftrace README. Parse the same to identify support and choose the
> > appropriate format for kprobe_
On Fri, Mar 3, 2017 at 8:23 PM, Carlos O'Donell wrote:
> On Thu, Mar 2, 2017 at 10:48 AM, Dmitry V. Levin wrote:
>> On Thu, Mar 02, 2017 at 10:22:18AM -0500, Carlos O'Donell wrote:
>>> On Wed, Mar 1, 2017 at 11:20 AM, Arnd Bergmann wrote:
>>> > On Sun, Feb 26, 2017 at 2:01 AM, Dmitry V. Levin
From: Segher Boessenkool
> Sent: 06 March 2017 14:18
> On Mon, Mar 06, 2017 at 01:03:19PM +0100, Gabriel Paubert wrote:
> > > > > The PowerPC divw etc. instructions do not trap by themselves, but
> > > > > recent
> > > > > GCC inserts trap instructions on code paths that are always undefined
> > >
On Mon, 06 Mar 2017 09:07:48 +0530
"Aneesh Kumar K.V" wrote:
> "Aneesh Kumar K.V" writes:
>
> > Michal Suchánek writes:
> >
> >> Hello,
> >>
> >> On Sun, 19 Feb 2017 15:37:15 +0530
> >> "Aneesh Kumar K.V" wrote:
> >>
> >>> We update the hash linux page table layout such that we can
> >>>
On Mon, Mar 06, 2017 at 02:59:07PM +, David Laight wrote:
> From: Peter Zijlstra
> > Sent: 06 March 2017 11:22
> > To: Madhavan Srinivasan
> > Cc: Wang Nan; Alexander Shishkin; linux-ker...@vger.kernel.org; Arnaldo
> > Carvalho de Melo; Alexei
> > Starovoitov; Ingo Molnar; Stephane Eranian; Su
On 2017/03/04 01:34PM, Masami Hiramatsu wrote:
> On Sat, 4 Mar 2017 11:35:51 +0900
> Masami Hiramatsu wrote:
>
> > On Sat, 4 Mar 2017 09:49:11 +0900
> > Masami Hiramatsu wrote:
> >
> > > On Thu, 2 Mar 2017 23:25:06 +0530
> > > "Naveen N. Rao" wrote:
> > >
> > > > We indicate support for acce
Currently we do not allow patch module to unload since there is no
method to determine if a task is still running in the patched code.
The consistency model gives us the way because when the unpatching
finishes we know that all tasks were marked as safe to call an original
function. Thus every ne
Masami,
Your patch works, thanks! However, I felt we could refactor and reuse
some of the code across kprobes.c for this purpose. Can you please see
if the below patch is fine?
Thanks,
Naveen
--
trace/kprobes: fix check for kretprobe offset within function entry
perf specifies an offset from _te
On 2017/02/08 01:24AM, Naveen N Rao wrote:
> ... as the weak variant will do.
>
> Signed-off-by: Naveen N. Rao
> ---
> arch/arm/probes/kprobes/core.c | 10 --
> arch/arm64/kernel/probes/kprobes.c | 6 --
> 2 files changed, 16 deletions(-)
With the generic changes in this series
On Mon, Mar 06, 2017 at 11:37:20PM +0530, Naveen N. Rao wrote:
> On 2017/02/08 01:24AM, Naveen N Rao wrote:
> > ... as the weak variant will do.
> >
> > Signed-off-by: Naveen N. Rao
> > ---
> > arch/arm/probes/kprobes/core.c | 10 --
> > arch/arm64/kernel/probes/kprobes.c | 6 --
Hi,
Today’s next resulted in kernel Oops while running memory-off-on test from
kernel selftest.
Kernel Version : 4.11.0-rc1-next-20170306
Machine type : Power6 PowerVM LPAR
[stdout] make[1]: Entering directory
`/var/tmp/avocado_kkNtjt/1-kernel_kselftest.py_kselftest.test/src/linux-4.8.6/tools
From: "Naveen N. Rao"
kretprobes can be registered by specifying an absolute address or by
specifying offset to a symbol. However, we need to ensure this falls at
function entry so as to be able to determine the return address.
Validate the same during kretprobe registration. By default, there
s
From: "Naveen N. Rao"
Since the kernel includes many non-global functions with same names, we
will need to use offsets from other symbols (typically _text/_stext) or
absolute addresses to place return probes on specific functions. Also,
the core register_kretprobe() API never forbid use of offset
From: "Steven Rostedt (VMware)"
Let's not remove the warning about offsets and return probes when the
offset is invalid.
Signed-off-by: Steven Rostedt
Acked-by: Masami Hiramatsu
Acked-by: Naveen N. Rao
Cc: Ananth N Mavinakayanahalli
Cc: Michael Ellerman
Cc: linuxppc-dev@lists.ozlabs.org
Lin
From: "Naveen N. Rao"
Generalize probe event file open routine into a generic function for opening
trace files.
Signed-off-by: Naveen N. Rao
Acked-by: Masami Hiramatsu
Cc: Ananth N Mavinakayanahalli
Cc: Michael Ellerman
Cc: Steven Rostedt
Cc: linuxppc-dev@lists.ozlabs.org
Link:
http://lkml
-02
08:05:45 +0100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-core-for-mingo-4.11-20170306
for you to fetch changes up to 001916b94a04809a94abb07daba6f9ace01906ba:
perf bench numa: Add more comment for -c option (2017-03-0
On Monday 06 March 2017 03:03 PM, Michael Ellerman wrote:
Vipin K Parashar writes:
OPAL returns OPAL_WRONG_STATE upon failing to provide
sensor data due to core sleeping/offline. Added check
for OPAL_WRONG_STATE rerurn code with sensor read failure.
Also added a log message indicating sensor
Hi Michael,
On Mon, 6 Mar 2017 23:05:17 +1100 Michael Ellerman wrote:
>
> We have a big list of selects under CONFIG_PPC, and currently they're
> completely unsorted. This means people tend to add new selects at the
> bottom of the list, and so two commits which both add a new select will
> ofte
On Mon, 6 Mar 2017 23:19:09 +0530
"Naveen N. Rao" wrote:
> Masami,
> Your patch works, thanks! However, I felt we could refactor and reuse
> some of the code across kprobes.c for this purpose. Can you please see
> if the below patch is fine?
OK, looks good to me:)
Acked-by: Masami Hiramatsu
On Mon, 6 Mar 2017 20:34:10 +0530
"Naveen N. Rao" wrote:
> On 2017/03/04 09:49AM, Masami Hiramatsu wrote:
> > On Thu, 2 Mar 2017 23:25:06 +0530
> > "Naveen N. Rao" wrote:
> >
> > > We indicate support for accepting sym+offset with kretprobes through a
> > > line in ftrace README. Parse the sam
On Mon, 2017-03-06 at 20:41 +1100, Michael Ellerman wrote:
> > diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> > index 4940917..c4b4c55 100644
> > --- a/arch/powerpc/Kconfig
> > +++ b/arch/powerpc/Kconfig
> > @@ -580,7 +580,7 @@ config ARCH_SPARSEMEM_ENABLE
> >
> > config ARCH_SPARS
request_buffer can hold 254 requests, so if it already has that number of
entries we can't add a new one.
Also, define constant to show where the number comes from.
Fixes: e3ee15dc5d19 ("powerpc/perf/hv-24x7: Define add_event_to_24x7_request()")
Signed-off-by: Thiago Jung Bauermann
---
arch/pow
Uncommon errors are better to get reported to dmesg so developers can
more easily figure out why pstore is unhappy with a backend attempting
to register.
Signed-off-by: Kees Cook
---
fs/pstore/platform.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/fs/pstore/platform.
For a long time I've been bothered by the complexity of argument passing
in the pstore internals, which makes understanding things and changing
things extremely fragile.
With the proposal of a new backend (EPI capsules), and my attempts to
reorganize things for the proposed multiple-pmsg frontend,
The per-prz spinlock should be using the dynamic initializer so that
lockdep can correctly track it. Without this, under lockdep, we get a
warning at boot that the lock is in non-static memory.
Fixes: 109704492ef6 ("pstore: Make spinlock per zone instead of global")
Fixes: 76d5692a5803 ("pstore: C
When built as a module and running with update_ms >= 0, pstore will Oops
during module unload since the work timer is still running. This makes sure
the worker is stopped before unloading.
Signed-off-by: Kees Cook
Cc: sta...@vger.kernel.org
---
fs/pstore/platform.c | 10 +-
1 file change
Technically, it might be possible for struct pstore_info to go out of
scope after the module_put(), so report the backend name first.
Signed-off-by: Kees Cook
---
fs/pstore/platform.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/fs/pstore/platform.c b/fs/pstore/platfor
The read/mkfile pair pass the same arguments and should be cleared
between calls. Move to a structure and wipe it after every loop.
Signed-off-by: Kees Cook
---
fs/pstore/platform.c | 55 +++---
include/linux/pstore.h | 28 -
This moves the record decompression logic out to a separate function
to avoid the deep indentation.
Signed-off-by: Kees Cook
---
fs/pstore/platform.c | 67 +---
1 file changed, 37 insertions(+), 30 deletions(-)
diff --git a/fs/pstore/platform.c b/
Instead of the long list of arguments, just pass the new record struct.
Signed-off-by: Kees Cook
---
fs/pstore/inode.c| 57 +---
fs/pstore/internal.h | 5 +
fs/pstore/platform.c | 6 +-
3 files changed, 34 insertions(+), 34 deletions(
Similar to the pstore_info read() callback, there were too many arguments.
This switches to the new struct pstore_record pointer instead. This adds
"reason" and "part" to the record structure as well.
Signed-off-by: Kees Cook
---
arch/powerpc/kernel/nvram_64.c| 27 +
drivers/
This adds documentation for struct pstore_info, which also includes
the basic API the backends need to implement.
Signed-off-by: Kees Cook
---
include/linux/pstore.h | 133 +++--
1 file changed, 128 insertions(+), 5 deletions(-)
diff --git a/include/l
Currently, pstore_mkfile() performs a memcpy() of the record contents,
so it can live anywhere. However, this is needlessly wasteful. In
preparation of pstore_mkfile() keeping the record contents, always
allocate a buffer for the contents.
Signed-off-by: Kees Cook
---
fs/pstore/platform.c | 38 +
pstore_mkfile() shouldn't have to memcpy the record contents. It can use
the existing copy instead. This adjusts the allocation lifetime management
and renames the contents variable from "data" to "buf" to assist moving to
struct pstore_record in the future.
Signed-off-by: Kees Cook
---
fs/pstor
The argument list for the pstore_read() interface is unwieldy. This changes
passes the new struct pstore_record instead. The erst backend was already
doing something similar internally.
Signed-off-by: Kees Cook
---
arch/powerpc/kernel/nvram_64.c| 61 +++---
drivers/acpi/apei
In preparation for handling records off to pstore_mkfile(), allocate the
record instead of reusing stack. This still always frees the record,
though, since pstore_mkfile() isn't yet keeping it.
Signed-off-by: Kees Cook
---
fs/pstore/platform.c | 30 ++
1 file changed,
This switches the inode-private data from carrying duplicate metadata to
keeping the record passed in during pstore_mkfile().
Signed-off-by: Kees Cook
---
fs/pstore/inode.c| 57 ++--
fs/pstore/platform.c | 6 ++
2 files changed, 30 inserti
As with the other API updates, this removes the long argument list in favor
of passing a single pstore recaord.
Signed-off-by: Kees Cook
---
fs/pstore/ftrace.c | 9 +++--
fs/pstore/platform.c | 30 +-
fs/pstore/ram.c| 44 ++--
This removes the argument list for the erase() callback and replaces it
with a pointer to the backend record details to be removed.
Signed-off-by: Kees Cook
---
drivers/acpi/apei/erst.c | 8 +++-
drivers/firmware/efi/efi-pstore.c | 26 +++---
fs/pstore/inode.c
Now that write() and write_buf() are functionally identical, this removes
write_buf(), and renames write_buf_user() to write_user(). Additionally
adds sanity-checks for pstore_info's declared functions and flags at
registration time.
Signed-off-by: Kees Cook
---
fs/pstore/ftrace.c | 4 ++--
Removes argument list in favor of pstore record, though the user buffer
remains passed separately since it must carry the __user annotation.
Signed-off-by: Kees Cook
---
fs/pstore/platform.c | 35 ---
fs/pstore/pmsg.c | 9 ++---
fs/pstore/ram.c
On POWER8 (ISA 2.07) lxvx and stxvx are defined to be extended mnemonics
of lxvd2x and stxvd2x. For POWER9 (ISA 3.0) the HW architects in their
infinite wisdom made lxvx and stxvx instructions in their own right.
POWER9 aware GCC will use the POWER9 instruction for lxvx and stxvx
causing these sel
Stephen Rothwell writes:
> On Mon, 6 Mar 2017 23:05:17 +1100 Michael Ellerman
> wrote:
>>
>> We have a big list of selects under CONFIG_PPC, and currently they're
>> completely unsorted. This means people tend to add new selects at the
>> bottom of the list, and so two commits which both add a
On Mon, 2017-02-13 at 19:42 -0600, Josh Poimboeuf wrote:
> Add the TIF_PATCH_PENDING thread flag to enable the new livepatch
> per-task consistency model for powerpc. The bit getting set indicates
> the thread has a pending patch which needs to be applied when the thread
> exits the kernel.
>
> T
On Mon, 2017-02-13 at 19:42 -0600, Josh Poimboeuf wrote:
> For live patching and possibly other use cases, a stack trace is only
> useful if it can be assured that it's completely reliable. Add a new
> save_stack_trace_tsk_reliable() function to achieve that.
>
> Note that if the target task isn'
81ca5dc94ffe:
>
> Merge branch 'linus' into perf/urgent, to resolve conflict (2017-03-02
> 08:05:45 +0100)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
> tags/pe
On Mon, Mar 06, 2017 at 04:46:46PM +1100, Michael Ellerman wrote:
> Hmm, which p9 mambo is this? I get:
>
> test: cache_shape
> tags: git_version:v4.10-10927-g0a55d1671c33
> L1I cache size: 0x8000 32768B 32K
> L1I line size:0x80 128-way associative
> L1D cache siz
Spares emits two symbol not declared warnings. The two functions in
question are declared already in a kernel header.
Add include directive to include kernel header.
Signed-off-by: Tobin C. Harding
---
github issue: #37 Fix sparse errors
arch/powerpc/kernel/swsusp.c | 1 +
1 file changed, 1 i
Sparse emits warning: symbol 'prepare_ftrace_return' was not
declared. Should it be static? prepare_ftrace_return() is called
from assembler and should not be static. Adding a header file
declaring the function will fix the sparse warning while adding
documentation to the call.
Add header file ftr
"Robert E. Cochran" writes:
> On 12/01/2016 04:00 AM, Michael Ellerman wrote:
>> In the recent commit 1515ab932156 ("powerpc/mm: Dump hash table") we
>> added code to dump the hage page table. Currently this can be selected
>> to build on any platform. However it breaks the build if we're buildin
Vipin K Parashar writes:
> OPAL returns OPAL_WRONG_STATE upon failing to provide
> sensor data due to core sleeping/offline. Added check
> for OPAL_WRONG_STATE rerurn code with sensor read failure.
> Also added a log message indicating sensor data being
> queried for sleeping/offline core.
>
> Si
Benjamin Herrenschmidt writes:
> On Sat, 2017-03-04 at 23:03 +1100, Michael Ellerman wrote:
>> +
>> + /* Allow "sufficient" time to drop any inflight IRQ's */
>> + mdelay(1);
>> +
>
> According to the HW guys, that should be 5ms in case the powerbus is
> really really busy.
Is that a
Benjamin Herrenschmidt writes:
> This is especially true of POWER9 where memory between chips is
> discontiguous.
>
> Signed-off-by: Benjamin Herrenschmidt
> ---
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 4940917..c4b4c55 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch
struct hcall_stats is only used in hvCall_inst.c.
Move struct hcall_stats to hvCall_inst.c
Resolves: #54
Signed-off-by: Tobin C. Harding
---
Is this correct, adding 'Resolves: #XX' when fixing
github.com/linuxppc/linux issues?
arch/powerpc/include/asm/hvcall.h| 10 --
arch
Power8/Power9 Perforence Monitoring Unit (PMU) supports
different sampling modes (SM) such as Random Instruction
Sampling (RIS), Random Load/Store Facility Sampling (RLS)
and Random Branch Sampling (RBS). Sample mode RLS updates
Sampled Instruction Event Register [SIER] bits with memory
hierarchy i
From: Sukadev Bhattiprolu
perf_mem_data_src is an union that is initialized via the ->val field
and accessed via the bitmap fields. For this to work on big endian
platforms, we also need a big-endian represenation of perf_mem_data_src.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de
The LDST field and DATA_SRC in SIER identifies the memory hierarchy level
(eg: L1, L2 etc), from which a data-cache miss for a marked instruction
was satisfied. Use the 'perf_mem_data_src' object to export this
hierarchy level to user space.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Thom
Threshold feature when used with MMCRA [Threshold Event Counter Event],
MMCRA[Threshold Start event] and MMCRA[Threshold End event] will update
MMCRA[Threashold Event Counter Exponent] and MMCRA[Threshold Event
Counter Multiplier] with the corresponding threshold event count values.
Patch to export
Patch to export SIER bits to userspace via
perf_mem_data_src and perf_sample_data struct.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Daniel Axtens
Cc: Andrew Donnellan
Signed-off-by: Sukadev Bhattiprolu
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/power8-pmu.c | 2 ++
1 f
Patch add "mem_access" event to sysfs. This as-is not a raw event
supported by Power8 pmu. Instead, it is formed based on
raw event encoding specificed in isa207-common.h.
Primary PMU event used here is PM_MRK_INST_CMPL.
This event tracks only the completed marked instructions.
Random sampling mo
Patch to export SIER bits to userspace via
perf_mem_data_src and perf_sample_data struct.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Sukadev Bhattiprolu
Cc: Daniel Axtens
Cc: Andrew Donnellan
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/power9-pmu.c | 2 ++
1 file changed
On Mon, 2017-03-06 at 20:36 +1100, Michael Ellerman wrote:
> > According to the HW guys, that should be 5ms in case the powerbus
> > is
> > really really busy.
>
> Is that a metric or imperial "really really" ? :D
No idea ;-) Could be the amount of time after which their own timeouts
kick in.
>
It seems we didn't pay quite enough attention when testing the new cache
shape vectors, which means we didn't notice the bug where the vector for
the L1D was using the L1I values. Fix it, resulting in eg:
L1I cache size: 0x8000 32768B 32K
L1I line size:0x80 8-w
On Mon, Mar 06, 2017 at 04:13:08PM +0530, Madhavan Srinivasan wrote:
> From: Sukadev Bhattiprolu
>
> perf_mem_data_src is an union that is initialized via the ->val field
> and accessed via the bitmap fields. For this to work on big endian
> platforms, we also need a big-endian represenation of p
On Sun, Mar 05, 2017 at 11:24:56AM -0600, Segher Boessenkool wrote:
> On Sun, Mar 05, 2017 at 05:58:37PM +0100, Gabriel Paubert wrote:
> > > > Erk sorry. One of the static checkers spotted it, but I hadn't got
> > > > around to fixing it because it seemed to not actually blow up, guess
> > > > not.
We have a big list of selects under CONFIG_PPC, and currently they're
completely unsorted. This means people tend to add new selects at the
bottom of the list, and so two commits which both add a new select will
often conflict.
Instead sort it alphabetically. This is nicer in and of itself, but al
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