Export fc_bsg_jobdone so drivers can use it directly instead of doing
the round-trip via struct fc_bsg_job::job_done() and use it in the LLDDs.
That way we can also unify the interfaces of fc_bsg_jobdone and bsg_job_done.
As we've converted all LLDDs over to use fc_bsg_jobdone() directly,
we can r
Provide fc_bsg_to_shost() helper that will become handy when we're moving from
struct fc_bsg_job to a plain struct bsg_job. Also use this little helper in
the LLDDs.
Signed-off-by: Johannes Thumshirn
Reviewed-by: Hannes Reinecke
Acked-by: Tyrel Datwyler
---
drivers/s390/scsi/zfcp_fc.c |
Provide fc_bsg_to_rport() helper that will become handy when we're moving
from struct fc_bsg_job to a plain struct bsg_job. Also move all LLDDs to use
the new helper.
Signed-off-by: Johannes Thumshirn
Reviewed-by: Hannes Reinecke
Acked-by: Tyrel Datwyler
---
drivers/s390/scsi/zfcp_fc.c |
Change FC drivers to use 'struct bsg_job' from bsg-lib.h instead of 'struct
fc_bsg_job' from scsi_transport_fc.h and remove 'struct fc_bsg_job'.
Signed-off-by: Johannes Thumshirn
Reviewed-by: Hannes Reinecke
Acked-by: Tyrel Datwyler
---
drivers/s390/scsi/zfcp_ext.h | 4 +--
drivers/s390/s
Don't use fc_bsg_job::request and fc_bsg_job::reply directly, but use
helper variables bsg_request and bsg_reply. This will be helpfull when
transitioning to bsg-lib.
Signed-off-by: Johannes Thumshirn
Reviewed-by: Hannes Reinecke
---
drivers/s390/scsi/zfcp_fc.c | 9 +-
drivers/scsi/bfa/
fc_bsg_jobdone() and bsg_job_done() are 1:1 copies now so use the bsg-lib one
instead of the FC private implementation.
Signed-off-by: Johannes Thumshirn
Reviewed-by: Hannes Reinecke
Acked-by: Tyrel Datwyler
---
drivers/s390/scsi/zfcp_fc.c | 2 +-
drivers/scsi/bfa/bfad_bsg.c | 4 ++
Currently, in xmon, there is no obvious way to get an address for a
percpu symbol for a particular cpu. Having such an ability would be good
for debugging the system when percpu variables got involved.
Therefore, this patch introduces a new xmon command "lp" to lookup the
address for percpu symbol
We need to update on secondaries for the selected MMU mode.
Fixes: ad410674f5606a ("powerpc/mm: Update the HID bit when switching from
radix to hash")
Reported-by: Michael Neuling
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hash_utils_64.c | 4
arch/powerpc/mm/pgtable-radix.c | 4
v2:
- Ordered DT nodes by address
- Added an entry for the chip to the trivial-devices list
Florian Larysch (2):
powerpc/dts: add device tree entry for W83793 on T4240RDB
DT: i2c: W83793 is a trivial device
Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 +
arch/powerpc/boot/
The T4240RDB contains a W83793 hardware monitoring chip. Add a device
tree entry to make the driver attach to it, as the i2c-mpc bus driver
dropped support for class-based instantiation of devices a long time
ago.
Signed-off-by: Florian Larysch
---
arch/powerpc/boot/dts/fsl/t4240rdb.dts | 4
Signed-off-by: Florian Larysch
---
Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
index fbbad64..c65aff0 100644
---
Christophe Leroy writes:
> diff --git a/arch/powerpc/include/asm/stackprotector.h
> b/arch/powerpc/include/asm/stackprotector.h
> new file mode 100644
> index 000..de00332
> --- /dev/null
> +++ b/arch/powerpc/include/asm/stackprotector.h
> @@ -0,0 +1,38 @@
> +/*
> + * GCC stack protector sup
Denis Kirjanov writes:
> On Friday, September 30, 2016, Christophe Leroy
> wrote:
>
>> Add HAVE_CC_STACKPROTECTOR to powerpc. This is copied from ARM.
>>
>> Not tested on PPC64, compile ok with ppc64_
>
>
> Hi Christophe,
>
> are you going to test it on ppc64? If not, I can take it
Did you get
On 16/11/16 16:39, Sudeep Holla wrote:
The Kconfig currently controlling compilation of this code is:
drivers/soc/fsl/Kconfig:config FSL_GUTS
drivers/soc/fsl/Kconfig: bool
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentiall
Currently platforms/drivers needing to get the machine model name are
replicating the same snippet of code. In some case, the OF reference
counting is either missing or incorrect.
This patch adds support to read the machine model name either using
the "model" or the "compatible" property in the de
On Fri, 2016-30-09 at 02:32:50 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds SPR number for TAR, PPR, DSCR special
> purpose registers. It also adds TM, VSX, VMX related
> instructions which will then be used by patches later
> in the series.
>
> Now that the new DSCR regis
On Fri, 2016-30-09 at 02:32:52 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for EBB/PMU specific
> registers. This also adds some generic ptrace interface
> based helper functions to be used by other patches later
> on in the series.
>
> Signed-off-by
On Fri, 2016-30-09 at 02:32:54 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for GPR/FPR registers
> inside TM context. This adds ptrace interface based helper
> functions related to checkpointed GPR/FPR access.
>
> Signed-off-by: Anshuman Khandual
>
On Fri, 2016-30-09 at 02:32:55 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for GPR/FPR registers
> inside suspended TM context.
>
> Signed-off-by: Anshuman Khandual
> Signed-off-by: Simon Guo
Applied to powerpc next, thanks.
https://git.kernel.or
On Fri, 2016-30-09 at 02:32:56 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for TAR, PPR, DSCR
> registers. This also adds ptrace interface based helper
> functions related to TAR, PPR, DSCR register access.
>
> Signed-off-by: Anshuman Khandual
> Sig
On Fri, 2016-30-09 at 02:32:57 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for TAR, PPR, DSCR
> registers inside TM context. This also adds ptrace
> interface based helper functions related to checkpointed
> TAR, PPR, DSCR register access.
>
> Signed
On Fri, 2016-30-09 at 02:32:58 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for TAR, PPR, DSCR
> registers inside suspended TM context.
>
> Signed-off-by: Anshuman Khandual
> Signed-off-by: Simon Guo
Applied to powerpc next, thanks.
https://git.ke
On Fri, 2016-27-05 at 05:48:59 UTC, Rashmica Gupta wrote:
> Useful to be able to dump the kernels page tables to check permissions
> and memory types - derived from arm64's implementation.
>
> Add a debugfs file to check the page tables. To use this the PPC_PTDUMP
> config option must be selected.
On Fri, 2016-30-09 at 02:32:59 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for VSX, VMX registers.
> This also adds ptrace interface based helper functions related
> to VSX, VMX registers access. This also adds some assembly
> helper functions related
On Fri, 2016-30-09 at 02:33:00 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for VSX, VMX registers
> inside TM context. This also adds ptrace interface based helper
> functions related to chckpointed VSX, VMX registers access.
>
> Signed-off-by: Anshu
On Fri, 2016-30-09 at 02:33:01 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for VSX, VMX registers
> inside suspended TM context.
>
> Signed-off-by: Anshuman Khandual
> Signed-off-by: Simon Guo
Applied to powerpc next, thanks.
https://git.kernel.o
On Fri, 2016-30-09 at 02:33:02 UTC, Simon Guo wrote:
> From: Anshuman Khandual
>
> This patch adds ptrace interface test for TM SPR registers. This
> also adds ptrace interface based helper functions related to TM
> SPR registers access.
>
> Signed-off-by: Anshuman Khandual
> Signed-off-by: Sim
On Fri, 2016-27-05 at 05:49:00 UTC, Rashmica Gupta wrote:
> Useful to be able to dump the kernel hash page table to check
> which pages are hashed along with their sizes and other details.
>
> Add a debugfs file to check the hash page table. If radix is enabled
> (and so there is no hash page tabl
On Wed, 2016-09-11 at 05:36:33 UTC, Suraj Jitindar Singh wrote:
> Version 3.00 of the ISA states that the PATS (partition table size) field
> of the PTCR (partition table control register) and the PRTS (process table
> size) field of the partition table entry must both be less than or equal
> to 24
On Sat, 2016-05-11 at 04:24:22 UTC, Balbir Singh wrote:
> Rename sift to shift
>
> Signed-off-by: Balbir Singh
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/ac8d3818aab7e08332a79e42521182
cheers
On Mon, 2016-14-11 at 06:46:45 UTC, Michael Ellerman wrote:
> Currently there's some CMO (Cooperative Memory Overcommit) code, in
> plpar_wrappers.h. Some of it is #ifdef CONFIG_PSERIES and some of it
> isn't. The end result being if a file includes plpar_wrappers.h it won't
> build with CONFIG_PSE
On Wed, 2016-03-02 at 15:50:23 UTC, Bartlomiej Zolnierkiewicz wrote:
> This patch disables deprecated IDE subsystem in pasemi_defconfig
> (no IDE host drivers are selected in this config so there is no valid
> reason to enable IDE subsystem itself).
>
> Cc: Olof Johansson
> Signed-off-by: Bartlom
On Wed, 2016-03-02 at 15:50:18 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:19 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:20 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:21 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:22 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:24 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:25 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:26 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:27 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:29 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Wed, 2016-03-02 at 15:50:30 UTC, Bartlomiej Zolnierkiewicz wrote:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non
On Thu, Nov 17, 2016 at 11:51:56AM +1100, Michael Ellerman wrote:
>
> But maybe Herbert can fix it up for you when he applies this.
Sure I can fix it up.
Cheers,
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
> Currently platforms/drivers needing to get the machine model name are
> replicating the same snippet of code. In some case, the OF reference
> counting is either missing or incorrect.
>
> This patch adds support to read the machi
On 17/11/16 13:50, Arnd Bergmann wrote:
On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
Currently platforms/drivers needing to get the machine model name are
replicating the same snippet of code. In some case, the OF reference
counting is either missing or incorrect.
This p
On 17/11/16 14:13, Arnd Bergmann wrote:
On Thursday, November 17, 2016 2:08:30 PM CET Sudeep Holla wrote:
On 17/11/16 13:50, Arnd Bergmann wrote:
On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
Currently platforms/drivers needing to get the machine model name are
replicati
On Thursday, November 17, 2016 2:08:30 PM CET Sudeep Holla wrote:
> On 17/11/16 13:50, Arnd Bergmann wrote:
> > On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
> >> Currently platforms/drivers needing to get the machine model name are
> >> replicating the same snippet of code. In
On 2016/11/17 09:03PM, Herbert Xu wrote:
> On Thu, Nov 17, 2016 at 11:51:56AM +1100, Michael Ellerman wrote:
> >
> > Crypto patches usually have a subject like:
> >
> > crypto: vmx - Various build fixes
Ok.
> >
> > But maybe Herbert can fix it up for you when he applies this.
>
> Sure I can fi
This is the beginning of work to come up with a more relevant kprobe
blacklist on powerpc. In this series, we primarily blacklist exception
vectors and kernel entry code.
Naveen N. Rao (4):
powerpc: asm: introduce new macros for assembly globals
powerpc: kprobe: add arch specific blacklist
p
- Introduce _GLOBAL_SYM() for global symbols in assembly. This helps
reduce verbosity of assembly files.
- Introduce NOKPROBE variants of _GLOBAL() and _GLOBAL_SYM(). These are
used subsequently to blacklist certain assembly functions and symbols
from kprobe.
- Fix a small typo in kprobe comment an
Add symbol to mark end of entry_*.S and use the same to blacklist all
addresses from kernel start (_stext) to entry code from kprobes. Much of
this code is early exception handling where we can't really take a trap.
Reported-by: Anton Blanchard
Signed-off-by: Naveen N. Rao
---
arch/powerpc/kern
Also convert slb_finish_load[_1T] to a local symbol as this doesn't need
to be globally visible.
Signed-off-by: Naveen N. Rao
---
arch/powerpc/mm/slb_low.S | 28
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/
We can't really take a trap at this point. So, blacklist these symbols.
Reported-by: Anton Blanchard
Signed-off-by: Naveen N. Rao
---
arch/powerpc/mm/slb_low.S | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
in
On Wed, Nov 16, 2016 at 08:41:46PM +0530, Naveen N. Rao wrote:
> First up, clean up the generated .S files properly on a 'make clean'.
> Secondly, force re-generation of these files when building for different
> endian-ness than what was built previously. Finally, generate the new
> files in the bu
Remove the unused but set variable srr1 in save_mce_event() to
fix the following GCC warning when building with 'W=1':
arch/powerpc/kernel/mce.c:75:11: warning: variable 'srr1' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Tobias Klauser
---
arch/powerpc/kernel/mce.c | 3 ---
1
Fix two [-Wold-style-declaration] GCC warnings by moving the inline
keyword before the return type.
Signed-off-by: Tobias Klauser
---
arch/powerpc/kernel/prom_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom
The pasrsing of data written to the dlpar file in sysfs does not correctly
account for the possibility of reading past the end of the buffer. The code
assumes that all pieces of the command witten to the sysfs file are present
in the form " ".
Correct this by updating the buffer parsing code to
Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.
The previous convention of keeping the files around until the CPU is dead
has not been preserved as there is no point to keep them available when the
cpu is going down. This makes the hotp
> On Nov 15, 2016, at 5:13 PM, Uma Krishnan wrote:
>
> The following Oops is encountered when blk_mq is enabled with the
> cxlflash driver:
>
> [ 2960.817172] Oops: Kernel access of bad area, sig: 11 [#5]
> [ 2960.817309] NIP __blk_mq_run_hw_queue+0x278/0x4c0
> [ 2960.817313] LR __blk_mq_run_hw
> On Nov 15, 2016, at 5:14 PM, Uma Krishnan wrote:
>
> During test, the following crash was observed:
>
> [34538.981505] Faulting instruction address: 0xd7c9c870
> cpu 0x9: Vector: 300 (Data Access) at [c007f1e8f590]
>pc: d7c9c870: cxlflash_restore_luntable+0x70/0x1d0 [cx
> On Nov 15, 2016, at 5:14 PM, Uma Krishnan wrote:
>
> Currently, the context reset routine waits for command room to
> be available before sending the reset request. Per review of the
> SISLite specification and clarifications from the CXL Flash AFU
> designers, this wait is unnecessary. The res
Hi Uma,
I do see a potential hang issue with this patch. See my comments below.
-matt
> On Nov 15, 2016, at 5:14 PM, Uma Krishnan wrote:
>
> During test, a command room violation interrupt is occasionally seen
> for the master context when the CXL flash devices are stressed.
>
> After study
On Thu, 17 Nov 2016 18:39:41 +1100
Alexey Kardashevskiy wrote:
> On 11/11/16 23:32, Alexey Kardashevskiy wrote:
> > In some situations the userspace memory context may live longer than
> > the userspace process itself so if we need to do proper memory context
> > cleanup, we better have tce_conta
Thanks for catching this Matt. Looking into this. Will send out a V2.
On 11/17/2016 1:36 PM, Matthew R. Ochs wrote:
Hi Uma,
I do see a potential hang issue with this patch. See my comments below.
-matt
On Nov 15, 2016, at 5:14 PM, Uma Krishnan wrote:
During test, a command room violation
On Tue, 2016-11-15 at 15:28 +1100, Benjamin Herrenschmidt wrote:
> Commit d3cbff1b5 "powerpc: Put exception configuration in a common place"
> broke the setting of the AIL bit (which enables taking exceptions with
> the MMU still on) on all processors, moving it incorrectly to a function
> called o
From: "Aneesh Kumar K.V"
We need to update the HID on secondaries for the selected MMU mode.
Fixes: ad410674f5606a ("powerpc/mm: Update the HID bit when switching from
radix to hash")
Reported-by: Michael Neuling
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Michael Neuling
---
arch/power
This patch adds support for dumping bytes in the reverse order of
what they are read in, effectively doing an endian swap on double words.
This makes it easy to debug on a little endian system
The output of "d" on a little endian system is
0:mon> d c0e8bd10
c0e8bd10 70bde800
On Thu, Nov 17, 2016 at 04:07:47PM +1100, Russell Currey wrote:
>eeh_pe_reset and eeh_reset_pe are two different functions in the same
>file which do mostly the same thing. Not only is this confusing, but
>potentially causes disrepancies in functionality, notably eeh_reset_pe
>as it does not check
Under some configs we need to explicitly include cpu_has_feature.h,
otherwise we fail with:
arch/powerpc/lib/sstep.c:1992:7: error: implicit declaration of function
'cpu_has_feature'
Signed-off-by: Michael Ellerman
---
arch/powerpc/lib/sstep.c | 1 +
1 file changed, 1 insertion(+)
diff --gi
Hi Balbir,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.9-rc5 next-20161117]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Balbir-Singh/powerpc-xmon-Add-support-for
On Fri, 2016-11-18 at 10:59 +1100, Gavin Shan wrote:
> On Thu, Nov 17, 2016 at 04:07:47PM +1100, Russell Currey wrote:
> > eeh_pe_reset and eeh_reset_pe are two different functions in the same
> > file which do mostly the same thing. Not only is this confusing, but
> > potentially causes disrepanc
On POWER9 DD1, when we do a local TLB invalidate we also need to explicitly
invalidate the ERAT.
Signed-off-by: Michael Neuling
---
v3:
- Now with added bike shedding
v2:
- Remove unnecessary isyncs
---
arch/powerpc/include/asm/ppc-opcode.h | 1 +
arch/powerpc/mm/tlb-radix.c | 4 ++
"Naveen N. Rao" writes:
> Add symbol to mark end of entry_*.S and use the same to blacklist all
> addresses from kernel start (_stext) to entry code from kprobes. Much of
> this code is early exception handling where we can't really take a trap.
I'm not sure about this. entry_*.S is actually a b
Rashmica Gupta writes:
> Useful to be able to dump the kernel hash page table to check
> which pages are hashed along with their sizes and other details.
>
> Add a debugfs file to check the hash page table. If radix is enabled
> (and so there is no hash page table) then this file doesn't exist. T
I have an ibm-p8-garrison machine. But I can not find a node
"ibm,configure-kernel-dump" under /proc/device-tree. Does garrison
machine support fadump? And normally, which component in open-power
presents the "ibm,configure-kernel-dump" ? I had though it was in
skiboot gitree or garrison-xml git
On Fri, 18 Nov 2016 16:48:01 +1100
Michael Ellerman wrote:
> "Naveen N. Rao" writes:
>
> > Add symbol to mark end of entry_*.S and use the same to blacklist all
> > addresses from kernel start (_stext) to entry code from kprobes. Much of
> > this code is early exception handling where we can't
This series of patches adds support to HV KVM for running KVM guests
on POWER9 systems. This allows us to run KVM guests that use HPT
(hashed page table) address translation and know about the POWER9
processor. With this, Suraj Jitindar Singh's recent patch series
"powerpc: add support for ISA v2
These definitions will be needed by KVM.
Signed-off-by: Paul Mackerras
---
arch/powerpc/include/asm/reg.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 9cd4e8c..df81411 100644
--- a/arch/powerpc/include/asm/reg.h
++
POWER9 requires the host to set up a partition table, which is a
table in memory indexed by logical partition ID (LPID) which
contains the pointers to page tables and process tables for the
host and each guest.
This factors out the initialization of the partition table into
a single function. Thi
This defines real-mode versions of opal_int_get_xirr(), opal_int_eoi()
and opal_int_set_mfrr(), for use by KVM real-mode code.
It also exports opal_int_set_mfrr() so that the modular part of KVM
can use it to send IPIs.
Signed-off-by: Paul Mackerras
---
arch/powerpc/include/asm/opal.h
The hashed page table MMU in POWER processors can update the R
(reference) and C (change) bits in a HPTE at any time until the
HPTE has been invalidated and the TLB invalidation sequence has
completed. In kvmppc_h_protect, which implements the H_PROTECT
hypercall, we read the HPTE, modify the seco
This adapts the KVM-HV hashed page table (HPT) code to read and write
HPT entries in the new format defined in Power ISA v3.00 on POWER9
machines. The new format moves the B (segment size) field from the
first doubleword to the second, and trims some bits from the AVA
(abbreviated virtual address)
On POWER9, the SDR1 register (hashed page table base address) is no
longer used, and instead the hardware reads the HPT base address
and size from the partition table. The partition table entry also
contains the bits that specify the page size for the VRMA mapping,
which were previously in the LPC
Some special-purpose registers that were present and accessible
by guests on POWER8 no longer exist on POWER9, so this adds
feature sections to ensure that we don't try to context-switch
them when going into or out of a guest on POWER9. These are
all relatively obscure, rarely-used registers, but
This adds code to handle two new guest-accessible special-purpose
registers on POWER9: TIDR (thread ID register) and PSSCR (processor
stop status and control register). They are context-switched
between host and guest, and the guest values can be read and set
via the one_reg interface.
The PSSCR
POWER9 adds new capabilities to the tlbie (TLB invalidate entry)
and tlbiel (local tlbie) instructions. Both instructions get a
set of new parameters (RIC, PRS and R) which appear as bits in the
instruction word. The tlbiel instruction now has a second register
operand, which contains a PID and/o
On POWER9, the msgsnd instruction is able to send interrupts to
other cores, as well as other threads on the local core. Since
msgsnd is generally simpler and faster than sending an IPI via the
XICS, we use msgsnd for all IPIs sent by KVM on POWER9.
Signed-off-by: Paul Mackerras
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arch/powerp
POWER9 includes a new interrupt controller, called XIVE, which is
quite different from the XICS interrupt controller on POWER7 and
POWER8 machines. KVM-HV accesses the XICS directly in several places
in order to send and clear IPIs and handle interrupts from PCI
devices being passed through to the
POWER9 replaces the various power-saving mode instructions on POWER8
(doze, nap, sleep and rvwinkle) with a single "stop" instruction, plus
a register, PSSCR, which controls the depth of the power-saving mode.
This replaces the use of the nap instruction when threads are idle
during guest execution
With POWER9, each CPU thread has its own MMU context and can be
in the host or a guest independently of the other threads; there is
still however a restriction that all threads must use the same type
of address translation, either radix tree or hashed page table (HPT).
Since we only support HPT gu
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