We need to update on secondaries for the selected MMU mode.

Fixes: ad410674f5606a ("powerpc/mm: Update the HID bit when switching from 
radix to hash")

Reported-by: Michael Neuling <mi...@neuling.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com>
---
 arch/powerpc/mm/hash_utils_64.c | 4 ++++
 arch/powerpc/mm/pgtable-radix.c | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 44d3c3a38e3e..5503078090cd 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -1029,6 +1029,10 @@ void hash__early_init_mmu_secondary(void)
 {
        /* Initialize hash table for that CPU */
        if (!firmware_has_feature(FW_FEATURE_LPAR)) {
+
+               if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+                       update_hid_for_hash();
+
                if (!cpu_has_feature(CPU_FTR_ARCH_300))
                        mtspr(SPRN_SDR1, _SDR1);
                else
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index 735be6821e90..2fc7336619b3 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -404,6 +404,10 @@ void radix__early_init_mmu_secondary(void)
         * update partition table control register and UPRT
         */
        if (!firmware_has_feature(FW_FEATURE_LPAR)) {
+
+               if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+                       update_hid_for_radix();
+
                lpcr = mfspr(SPRN_LPCR);
                mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
 
-- 
2.10.2

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