On Tue, 2016-11-15 at 15:28 +1100, Benjamin Herrenschmidt wrote:
> Commit d3cbff1b5 "powerpc: Put exception configuration in a common place"
> broke the setting of the AIL bit (which enables taking exceptions with
> the MMU still on) on all processors, moving it incorrectly to a function
> called only on the boot CPU. This was correct for the guest case but
> not when running in hypervisor mode.
> 
> This fixes it by partially reverting that commit, putting the setting
> back in cpu_ready_for_interrupts()
> 
> Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
> Fixes: d3cbff1b5 ("powerpc: Put exception configuration in a common place")
> CC: sta...@vger.kernel.org # v4.8+

Acked-By: Michael Neuling <mi...@neuling.org>

> ---
>  arch/powerpc/kernel/setup_64.c | 20 ++++++++++++++------
>  1 file changed, 14 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
> index 7ac8e6e..ac75224 100644
> --- a/arch/powerpc/kernel/setup_64.c
> +++ b/arch/powerpc/kernel/setup_64.c
> @@ -226,17 +226,25 @@ static void __init configure_exceptions(void)
>               if (firmware_has_feature(FW_FEATURE_OPAL))
>                       opal_configure_cores();
>  
> -             /* Enable AIL if supported, and we are in hypervisor mode */
> -             if (early_cpu_has_feature(CPU_FTR_HVMODE) &&
> -                 early_cpu_has_feature(CPU_FTR_ARCH_207S)) {
> -                     unsigned long lpcr = mfspr(SPRN_LPCR);
> -                     mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
> -             }
> +             /* AIL on native is done in cpu_ready_for_interrupts */
>       }
>  }
>  
>  static void cpu_ready_for_interrupts(void)
>  {
> +     /*
> +      * Enable AIL if supported, and we are in hypervisor mode. This
> +      * is called once for every processor.
> +      *
> +      * If we are not in hypervisor mode the job is done once for
> +      * the whole partition in configure_exceptions().
> +      */
> +     if (early_cpu_has_feature(CPU_FTR_HVMODE) &&
> +         early_cpu_has_feature(CPU_FTR_ARCH_207S)) {
> +             unsigned long lpcr = mfspr(SPRN_LPCR);
> +             mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
> +     }
> +
>       /* Set IR and DR in PACA MSR */
>       get_paca()->kernel_msr = MSR_KERNEL;
>  }
> 

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