On Wed, Feb 05, 2014 at 06:07:57PM -0800, Nishanth Aravamudan wrote:
> On 24.01.2014 [16:25:58 -0800], David Rientjes wrote:
> > On Fri, 24 Jan 2014, Nishanth Aravamudan wrote:
> >
> > > Thank you for clarifying and providing a test patch. I ran with this on
> > > the system showing the original
Signed-off-by: Joonsoo Kim
diff --git a/mm/slub.c b/mm/slub.c
index cc1f995..c851f82 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -1700,6 +1700,14 @@ static void *get_partial(struct kmem_cache *s, gfp_t
flags, int node,
void *object;
int searchnode = (node == NUMA_NO_NODE) ? numa_me
Signed-off-by: Joonsoo Kim
diff --git a/include/linux/topology.h b/include/linux/topology.h
index 12ae6ce..a6d5438 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -233,11 +233,20 @@ static inline int numa_node_id(void)
* Use the accessor functions set_numa_mem(), numa_me
Currently, if allocation constraint to node is NUMA_NO_NODE, we search
a partial slab on numa_node_id() node. This doesn't work properly on the
system having memoryless node, since it can have no memory on that node and
there must be no partial slab on that node.
On that node, page allocation alwa
On Thu, Feb 06, 2014 at 12:09:00PM +1000, Stephen N Chivers wrote:
> I have a MPC8548e based board and an application that makes
> extensive use of floating point including numerous calls to cos.
> In the same program there is the use of an sqlite database.
>
> The kernel is derived from 2.6.31 an
2014-02-06 David Rientjes :
> On Thu, 6 Feb 2014, Joonsoo Kim wrote:
>
>> Signed-off-by: Joonsoo Kim
>>
>
> I may be misunderstanding this patch and there's no help because there's
> no changelog.
Sorry about that.
I made this patch just for testing. :)
Thanks for looking this.
>> diff --git a/i
x86 has them, MIPS has them, ARM has them, even ia64 has them:
ticket locks. They reduce memory bus and cache pressure especially
for contended spinlocks, increasing performance.
This patch is a port of the x86 spin locks, mostly written in C,
to the powerpc, introducing inline asm where needed. T
On Thursday, February 06, 2014 11:20:37 AM Preeti U Murthy wrote:
> Some archs set the CPUIDLE_FLAG_TIMER_STOP flag for idle states in which the
> local timers stop. The cpuidle_idle_call() currently handles such idle states
> by calling into the broadcast framework so as to wakeup CPUs at their ne
On Thu, 30 Jan 2014, Peter Zijlstra wrote:
> On Thu, Jan 30, 2014 at 11:03:31AM -0500, Nicolas Pitre wrote:
> > > This is not a valid patch for PATCH(1). Please try again.
> >
> > Don't you use git? ;-)
>
> Nah, git and me don't get along well.
>
> > Here's a plain patch:
>
> Thanks!
Hi Pete
The core idle loop now takes care of it.
Signed-off-by: Nicolas Pitre
---
arch/arm64/kernel/process.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 1c0a9be2ff..9cce0098f4 100644
--- a/arch/arm64/kernel/p
The core idle loop now takes care of it.
Signed-off-by: Nicolas Pitre
---
arch/powerpc/platforms/powernv/setup.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/setup.c
b/arch/powerpc/platforms/powernv/setup.c
index 21166f65c9..a9
An Thu, 6 Feb 2014, Nicolas Pitre wrote:
> The core idle loop now takes care of it.
>
> Signed-off-by: Nicolas Pitre
Acked-by: Thomas Gleixner
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On Thu, 6 Feb 2014, Nicolas Pitre wrote:
> The core idle loop now takes care of it.
>
> Signed-off-by: Nicolas Pitre
Acked-by: Thomas Gleixner
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On 28.01.2014, at 07:46, Aneesh Kumar K.V
wrote:
> This patch make sure we inherit the LE bit correctly in different case
> so that we can run Little Endian distro in PR mode
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> Changes from V2:
> * Move H_SET_MODE to qemu
>
>
> arch/powerpc/include/
On 28.01.2014, at 07:39, Aneesh Kumar K.V
wrote:
> Although it's optional IBM POWER cpus always had DAR value set on
> alignment interrupt. So don't try to compute these values.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> Changes from V2:
> * Depend on cpu feature flag to decide whether to us
On Thu, 2014-02-06 at 11:37 +0100, Torsten Duwe wrote:
> x86 has them, MIPS has them, ARM has them, even ia64 has them:
> ticket locks. They reduce memory bus and cache pressure especially
> for contended spinlocks, increasing performance.
>
> This patch is a port of the x86 spin locks, mostly wri
Hi Nicolas,
powernv in the subject of the patch?
Regards
Preeti U Murthy
On 02/06/2014 07:46 PM, Nicolas Pitre wrote:
> The core idle loop now takes care of it.
>
> Signed-off-by: Nicolas Pitre
> ---
> arch/arm64/kernel/process.c | 7 ++-
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
On Thu, 6 Feb 2014, Preeti U Murthy wrote:
Compiler warnings are not so important, right?
kernel/time/tick-broadcast.c: In function ‘tick_broadcast_oneshot_control’:
kernel/time/tick-broadcast.c:700:3: warning: ‘return’ with no value, in
function returning non-void [-Wreturn-type]
kernel/time/ti
On 02/06/2014 07:46 PM, Nicolas Pitre wrote:
> The core idle loop now takes care of it.
>
> Signed-off-by: Nicolas Pitre
> ---
> arch/powerpc/platforms/powernv/setup.c | 13 +
> 1 file changed, 1 insertion(+), 12 deletions(-)
>
> diff --git a/arch/powerpc/platforms/powernv/setup.c
On Thu, 6 Feb 2014, Preeti U Murthy wrote:
> Hi Nicolas,
>
> powernv in the subject of the patch?
Crap. You're right.
That's what you get when posting patches while attending a meeting.
>
> Regards
> Preeti U Murthy
> On 02/06/2014 07:46 PM, Nicolas Pitre wrote:
> > The core idle loop now
On Thu, Feb 06, 2014 at 11:37:37AM +0100, Torsten Duwe wrote:
> x86 has them, MIPS has them, ARM has them, even ia64 has them:
> ticket locks. They reduce memory bus and cache pressure especially
> for contended spinlocks, increasing performance.
>
> This patch is a port of the x86 spin locks, mos
On Thu, Feb 06, 2014 at 02:09:59PM +, Nicolas Pitre wrote:
> Hi Peter,
>
> Did you merge those patches in your tree?
tree, tree, what's in a word. Its in my patch stack yes. I should get
some of that into tip I suppose, been side-tracked a bit this week.
Sorry for the delay.
> If so, is it
Hi Daniel,
On 02/06/2014 09:55 PM, Daniel Lezcano wrote:
> Hi Nico,
>
>
> On 6 February 2014 14:16, Nicolas Pitre wrote:
>
>> The core idle loop now takes care of it.
>>
>> Signed-off-by: Nicolas Pitre
>> ---
>> arch/powerpc/platforms/powernv/setup.c | 13 +
>> 1 file changed, 1
On Thu, 6 Feb 2014, Joonsoo Kim wrote:
> Currently, if allocation constraint to node is NUMA_NO_NODE, we search
> a partial slab on numa_node_id() node. This doesn't work properly on the
> system having memoryless node, since it can have no memory on that node and
> there must be no partial slab o
On Wed, 5 Feb 2014, Nishanth Aravamudan wrote:
> > Right so if we are ignoring the node then the simplest thing to do is to
> > not deactivate the current cpu slab but to take an object from it.
>
> Ok, that's what Anton's patch does, I believe. Are you ok with that
> patch as it is?
No. Again hi
On Thu, 6 Feb 2014, David Rientjes wrote:
> I think you'll need to send these to Andrew since he appears to be picking
> up slub patches these days.
I can start managing merges again if Pekka no longer has the time.
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On Thu, 6 Feb 2014, Joonsoo Kim wrote:
> diff --git a/mm/slub.c b/mm/slub.c
> index cc1f995..c851f82 100644
> --- a/mm/slub.c
> +++ b/mm/slub.c
> @@ -1700,6 +1700,14 @@ static void *get_partial(struct kmem_cache *s, gfp_t
> flags, int node,
> void *object;
> int searchnode = (node ==
On Thu, Feb 06, 2014 at 05:38:37PM +0100, Peter Zijlstra wrote:
> On Thu, Feb 06, 2014 at 11:37:37AM +0100, Torsten Duwe wrote:
> > x86 has them, MIPS has them, ARM has them, even ia64 has them:
> > ticket locks. They reduce memory bus and cache pressure especially
> > for contended spinlocks, incr
Hi Thomas,
On 02/06/2014 09:33 PM, Thomas Gleixner wrote:
> On Thu, 6 Feb 2014, Preeti U Murthy wrote:
>
> Compiler warnings are not so important, right?
>
> kernel/time/tick-broadcast.c: In function ‘tick_broadcast_oneshot_control’:
> kernel/time/tick-broadcast.c:700:3: warning: ‘return’ with n
On Thu, Feb 06, 2014 at 06:37:27PM +0100, Torsten Duwe wrote:
> On Thu, Feb 06, 2014 at 05:38:37PM +0100, Peter Zijlstra wrote:
> > On Thu, Feb 06, 2014 at 11:37:37AM +0100, Torsten Duwe wrote:
> > > x86 has them, MIPS has them, ARM has them, even ia64 has them:
> > > ticket locks. They reduce memo
On 06.02.2014 [19:29:16 +0900], Joonsoo Kim wrote:
> 2014-02-06 David Rientjes :
> > On Thu, 6 Feb 2014, Joonsoo Kim wrote:
> >
> >> Signed-off-by: Joonsoo Kim
> >>
> >
> > I may be misunderstanding this patch and there's no help because there's
> > no changelog.
>
> Sorry about that.
> I made th
On 06.02.2014 [10:59:55 -0800], Nishanth Aravamudan wrote:
> On 06.02.2014 [17:04:18 +0900], Joonsoo Kim wrote:
> > On Wed, Feb 05, 2014 at 06:07:57PM -0800, Nishanth Aravamudan wrote:
> > > On 24.01.2014 [16:25:58 -0800], David Rientjes wrote:
> > > > On Fri, 24 Jan 2014, Nishanth Aravamudan wrote
On 2/6/2014 12:08 PM, Peter Zijlstra wrote:
>>> Can you pair lwarx with sthcx ? I couldn't immediately find the answer
>>> > > in the PowerISA doc. If so I think you can do better by being able to
>>> > > atomically load both tickets but only storing the head without affecting
>>> > > the tail.
>>
On 6 February 2014 14:16, Nicolas Pitre wrote:
> The core idle loop now takes care of it.
>
> Signed-off-by: Nicolas Pitre
>
Acked-by: Daniel Lezcano
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Hi Nico,
On 6 February 2014 14:16, Nicolas Pitre wrote:
> The core idle loop now takes care of it.
>
> Signed-off-by: Nicolas Pitre
> ---
> arch/powerpc/platforms/powernv/setup.c | 13 +
> 1 file changed, 1 insertion(+), 12 deletions(-)
>
> diff --git a/arch/powerpc/platforms/powe
On Thu, 2014-02-06 at 18:37 +0100, Torsten Duwe wrote:
> On Thu, Feb 06, 2014 at 05:38:37PM +0100, Peter Zijlstra wrote:
> > On Thu, Feb 06, 2014 at 11:37:37AM +0100, Torsten Duwe wrote:
> > > x86 has them, MIPS has them, ARM has them, even ia64 has them:
> > > ticket locks. They reduce memory bus
On Thu, 6 Feb 2014, Preeti U Murthy wrote:
> On 02/06/2014 09:33 PM, Thomas Gleixner wrote:
> > On Thu, 6 Feb 2014, Preeti U Murthy wrote:
> >
> > Compiler warnings are not so important, right?
> >
> > kernel/time/tick-broadcast.c: In function ‘tick_broadcast_oneshot_control’:
> > kernel/time/tic
Hi Linus,
On Tue, 4 Feb 2014 15:51:58 -0500 Paul Gortmaker
wrote:
>
> We've had this in linux-next for 2+ weeks (thanks Stephen!) as a
> linux-stable like queue of patches, and as can be seen here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/paulg/init.git
>
> most of the changes in
On Thu, 6 Feb 2014, Preeti U Murthy wrote:
> Hi Daniel,
>
> On 02/06/2014 09:55 PM, Daniel Lezcano wrote:
> > Hi Nico,
> >
> >
> > On 6 February 2014 14:16, Nicolas Pitre wrote:
> >
> >> The core idle loop now takes care of it.
> >>
> >> Signed-off-by: Nicolas Pitre
> >> ---
> >> arch/power
Gabriel Paubert wrote on 02/06/2014 07:26:37 PM:
> From: Gabriel Paubert
> To: Stephen N Chivers
> Cc: linuxppc-dev@lists.ozlabs.org, Chris Proctor
> Date: 02/06/2014 07:26 PM
> Subject: Re: arch/powerpc/math-emu/mtfsf.c - incorrect mask?
>
> On Thu, Feb 06, 2014 at 12:09:00PM +1000, Stephen
On Sat, 1 Feb 2014, Michael Ellerman wrote:
> This patch adds some documentation on the different cpu families
> supported by arch/powerpc.
>
> Signed-off-by: Michael Ellerman
> ---
> v2: Reworked formatting to avoid wrapping.
> Fixed up Freescale details.
>
>
> Documentation/powerpc/cpu_
Hi Nicolas,
On 02/07/2014 06:47 AM, Nicolas Pitre wrote:
> On Thu, 6 Feb 2014, Preeti U Murthy wrote:
>
>> Hi Daniel,
>>
>> On 02/06/2014 09:55 PM, Daniel Lezcano wrote:
>>> Hi Nico,
>>>
>>>
>>> On 6 February 2014 14:16, Nicolas Pitre wrote:
>>>
The core idle loop now takes care of it.
On Thu, Feb 06, 2014 at 11:11:31AM -0800, Nishanth Aravamudan wrote:
> > diff --git a/include/linux/topology.h b/include/linux/topology.h
> > index 12ae6ce..66b19b8 100644
> > --- a/include/linux/topology.h
> > +++ b/include/linux/topology.h
> > @@ -233,11 +233,20 @@ static inline int numa_node_id(
On Thu, Feb 06, 2014 at 11:30:20AM -0600, Christoph Lameter wrote:
> On Thu, 6 Feb 2014, Joonsoo Kim wrote:
>
> > diff --git a/mm/slub.c b/mm/slub.c
> > index cc1f995..c851f82 100644
> > --- a/mm/slub.c
> > +++ b/mm/slub.c
> > @@ -1700,6 +1700,14 @@ static void *get_partial(struct kmem_cache *s, g
On Thu, Feb 06, 2014 at 12:52:11PM -0800, David Rientjes wrote:
> On Thu, 6 Feb 2014, Joonsoo Kim wrote:
>
> > From bf691e7eb07f966e3aed251eaeb18f229ee32d1f Mon Sep 17 00:00:00 2001
> > From: Joonsoo Kim
> > Date: Thu, 6 Feb 2014 17:07:05 +0900
> > Subject: [RFC PATCH 2/3 v2] topology: support no
Hi Nicolas,
Find below the patch that will need to be squashed with this one.
This patch is based on the mainline.Adding Deepthi, the author of
the patch which introduced the powernv cpuidle driver. Deepthi,
do you think the below patch looks right? We do not need to do an
explicit local_irq_enabl
On Wed, 2014-02-05 at 14:21 +0530, Anshuman Khandual wrote:
> On 01/02/2014 10:32 AM, Anshuman Khandual wrote:
> > This patchset adds some missing event list for POWER7 PMU raw
> > events which are exported through sysfs interface. Also updates
> > the ABI documentation to add all the sysfs exporte
On Wed, 2013-10-16 at 11:23 +0530, Anshuman Khandual wrote:
> This patch exports a set of POWER8 PMU raw event codes through
> sysfs interface. Right now the raw event set matches the entire
> set of POWER8 events found in libpfm4 library.
As for the POWER7 events, these all need to be in the ABI
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