Re: [PATCH v4 11/31] net: can: mscan: improve clock API use

2013-08-07 Thread Marc Kleine-Budde
On 08/06/2013 10:43 PM, Gerhard Sittig wrote: > the .get_clock() callback is run from probe() and might allocate > resources, introduce a .put_clock() callback that is run from remove() > to undo any allocation activities > > prepare and enable the clocks in open(), disable and unprepare the > clo

Re: [PATCH v4 11/31] net: can: mscan: improve clock API use

2013-08-07 Thread Marc Kleine-Budde
On 08/06/2013 10:43 PM, Gerhard Sittig wrote: > the .get_clock() callback is run from probe() and might allocate > resources, introduce a .put_clock() callback that is run from remove() > to undo any allocation activities AFAICS With this patch put_clock() is still a no-op, is there a patch which

Re: [PATCH v4 11/31] net: can: mscan: improve clock API use

2013-08-07 Thread Marc Kleine-Budde
On 08/07/2013 09:30 AM, Marc Kleine-Budde wrote: > On 08/06/2013 10:43 PM, Gerhard Sittig wrote: >> the .get_clock() callback is run from probe() and might allocate >> resources, introduce a .put_clock() callback that is run from remove() >> to undo any allocation activities > > AFAICS With this p

Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x

2013-08-07 Thread Gerhard Sittig
[ no change in content, but order shuffling for better application ] On Tue, Aug 06, 2013 at 23:31 +0200, Gerhard Sittig wrote: > > [ this is an overview on how to split the series if necessary ] > > On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote: > > > > this series > > - fixes seve

Re: [PATCH 2/4] powerpc: Add new save_tar() register function.

2013-08-07 Thread Paul Mackerras
On Wed, Aug 07, 2013 at 04:11:56PM +1000, Michael Neuling wrote: > Add save_tar() function to save the Target Address Register (TAR). This will > be used in a future patch to save the TAR earlier than it currently is. > > Signed-off-by: Michael Neuling > Cc: > --- > arch/powerpc/include/asm/sw

[RFC PATCH 0/9] Machine check handling in linux host.

2013-08-07 Thread Mahesh J Salgaonkar
Hi, Please find the patch set that performs the machine check handling inside linux host. The design is to be able to handle re-entrancy so that we do not clobber the machine check information during nested machine check interrupt. The patch 2 implements the logic to save the raw MCE info onto th

[RFC PATCH 3/9] powerpc: Introduce a early machine check hook in cpu_spec.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar This patch adds the early machine check function pointer in cputable for CPU specific early machine check handling. The early machine handle routine will be called in real mode to handle SLB and TLB errors. This patch just sets up a mechanism invoke CPU specific handler. T

[RFC PATCH 5/9] powerpc: Flush SLB/TLBs if we get SLB/TLB machine check errors on power7.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar If we get a machine check exception due to SLB or TLB errors, then flush SLBs/TLBs and reload SLBs to recover. We do this in real mode before turning on MMU. Otherwise we would run into nested machine checks. If we get a machine check when we are in guest, then just flush

[RFC PATCH 1/9] powerpc: Split the common exception prolog logic into two section.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar This patch splits the common exception prolog logic into two parts to facilitate reuse of existing code in the next patch. The second part will be reused in the machine check exception routine in the next patch. Please note that this patch does not introduce or change exi

[RFC PATCH 2/9] powerpc: handle machine check in Linux host.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar Move machine check entry point into Linux. So far we were dependent on firmware to decode MCE error details and handover the high level info to OS. This patch introduces early machine check routine that saves the MCE information (srr1, srr0, dar and dsisr) to the emergenc

[PATCHv7 02/13] PCI: remove ARCH_SUPPORTS_MSI kconfig option

2013-08-07 Thread Thomas Petazzoni
Now that we have weak versions for each of the PCI MSI architecture functions, we can actually build the MSI support for all platforms, regardless of whether they provide or not architecture-specific versions of those functions. For this reason, the ARCH_SUPPORTS_MSI hidden kconfig boolean becomes

[PATCHv7 01/13] PCI: use weak functions for MSI arch-specific functions

2013-08-07 Thread Thomas Petazzoni
Until now, the MSI architecture-specific functions could be overloaded using a fairly complex set of #define and compile-time conditionals. In order to prepare for the introduction of the msi_chip infrastructure, it is desirable to switch all those functions to use the 'weak' mechanism. This commit

[RFC PATCH 4/9] powerpc: Add flush_tlb operation in cpu_spec.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar This patch introduces flush_tlb operation in cpu_spec structure. This will help us to invoke appropriate CPU-side flush tlb routine. This patch adds the foundation to invoke CPU specific flush routine for respective architectures. Currently this patch introduce flush_tlb f

[RFC PATCH 6/9] powerpc: Flush SLB/TLBs if we get SLB/TLB machine check errors on power8.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar This patch handles the memory errors on power8. If we get a machine check exception due to SLB or TLB errors, then flush SLBs/TLBs and reload SLBs to recover. I do not have access to power8 box, hence this patch haven't been tested yet. Signed-off-by: Mahesh Salgaonkar

[RFC PATCH 9/9] powerpc/powernv: Machine check exception handling.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar Add basic error handling in machine check exception handler. - If MSR_RI isn't set, we can not recover. - Check if disposition set to OpalMCE_DISPOSITION_RECOVERED. - Check if address at fault is inside kernel address space, if not then send SIGBUS to process if we hit

[RFC PATCH 7/9] powerpc: Decode and save machine check event.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar Now that we handle machine check in linux, the MCE decoding should also take place in linux host. This info is crucial to log before we go down in case we can not handle the machine check errors. This patch decodes and populates a machine check event which contain high lev

[RFC PATCH 8/9] powerpc/powernv: Remove machine check handling in OPAL.

2013-08-07 Thread Mahesh J Salgaonkar
From: Mahesh Salgaonkar Now that we are ready to handle machine check directly in linux, do not register with firmware to handle machine check exception. Signed-off-by: Mahesh Salgaonkar --- arch/powerpc/platforms/powernv/opal.c |8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-)

RE: [PATCH 2/2] powerpc/hibernate: add restore mmu context after resume

2013-08-07 Thread Wang Dongsheng-B40534
> -Original Message- > From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org] > Sent: Saturday, July 13, 2013 7:07 AM > To: Wood Scott-B07421 > Cc: Wang Dongsheng-B40534; Wood Scott-B07421; johan...@sipsolutions.net; > an...@enomsg.org; ga...@kernel.crashing.org; linuxppc- > d...@

Re: [PATCH 2/4] powerpc: Add new save_tar() register function.

2013-08-07 Thread Michael Neuling
> > +#ifdef CONFIG_PPC_BOOK3S_64 > > +_GLOBAL(_save_tar) > > + /* > > +* Back up the TAR across context switches. Note that the TAR is not > > +* available for use in the kernel. (To provide this, the TAR should > > +* be backed up/restored on exception entry/exit instead, and be in

[PATCH V2] powerpc: Convert out of line __arch_hweight to inline

2013-08-07 Thread Madhavan Srinivasan
Patch attempts to improve the performace of __arch_hweight functions by making them inline instead of current out of line implementation. Testcase is to disable/enable SMT on a large (192 thread) POWER7 lpar. Program used for SMT disable/enable is "ppc64_cpu" with "--smt=[off/on]" option. Here are

Re: [PATCH RFC v3 1/5] dma: mpc512x: reorder mpc8308 specific instructions

2013-08-07 Thread Alexander Popov
2013/8/3 Gerhard Sittig : > On Wed, Jul 31, 2013 at 11:20 +0400, Alexander Popov wrote: >> > Please make sure to either cite > properly or to properly mark changes as such. Don't spread false > information, please. You are free to change what I submitted, > but you should not pretend that I wrote

Re: [PATCH RFC v3 2/5] dma: mpc512x: add support for peripheral transfers

2013-08-07 Thread Alexander Popov
2013/8/3 Gerhard Sittig : > On Wed, Jul 31, 2013 at 11:21 +0400, Alexander Popov wrote: >> > You don't provide a lot of information to those you want to > receive feedback from. You should keep a history and list the > changes between versions. And you may want to somehow link this > v3 to its pr

Re: [PATCH] net/fsl_pq_mdio: fix handling of TBIPA register

2013-08-07 Thread Lutz Jaenicke
On Tue, Aug 06, 2013 at 06:55:00PM -0500, Scott Wood wrote: > On Tue, 2013-08-06 at 18:10 -0500, Scott Wood wrote: > > On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote: > > > The TBIPA register is part of gianfar's full register set. When starting > > > from the MII registers, the start addre

[PATCH] tile: various console improvements

2013-08-07 Thread Chris Metcalf
This change improves and cleans up the tile console. - We enable HVC_IRQ support on tilegx, with the addition of a new Tilera hypervisor API for tilegx to allow a console IPI. If IPI support is not available we fall back to the previous polling mode. - We simplify the earlyprintk code to use

Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x

2013-08-07 Thread Kumar Gala
On Aug 6, 2013, at 3:43 PM, Gerhard Sittig wrote: > this series > - fixes several drivers that are used in the MPC512x platform (UART, > SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they > handle clocks (appropriately acquire and setup them, hold references > during use, releas

Re: [PATCH 00/11] Add compression support to pstore

2013-08-07 Thread Tony Luck
Oh - one more thing - and my apologies for not spotting this before: dst = allocate_buf_for_compression(big_buf_sz); No - you may not call kmalloc() in oops/panic context. Please pre-allocate everything you need in some initialization code to make sure that we don't fail in the p

Re: [RFC PATCH 7/9] powerpc: Decode and save machine check event.

2013-08-07 Thread Scott Wood
On Wed, 2013-08-07 at 15:09 +0530, Mahesh J Salgaonkar wrote: > diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile > index a1aba53..0b5b04a 100644 > --- a/arch/powerpc/kernel/Makefile > +++ b/arch/powerpc/kernel/Makefile > @@ -35,7 +35,7 @@ obj-y

Re: [PATCH] net/fsl_pq_mdio: fix handling of TBIPA register

2013-08-07 Thread Scott Wood
On Wed, 2013-08-07 at 16:22 +0200, Lutz Jaenicke wrote: > On Tue, Aug 06, 2013 at 06:55:00PM -0500, Scott Wood wrote: > > On Tue, 2013-08-06 at 18:10 -0500, Scott Wood wrote: > > > On Thu, 2013-08-01 at 19:49 +0200, Lutz Jaenicke wrote: > > > > The TBIPA register is part of gianfar's full register

Re: [PATCH 00/11] Add compression support to pstore

2013-08-07 Thread Tony Luck
On Tue, Aug 6, 2013 at 10:35 PM, Tony Luck wrote: > ERST is at the whim of the BIOS writer (the ACPI standard doesn't provide any > suggestions on record sizes). My systems support ~6K record size. Off by a little - 7896 bytes on my current machine. > efivars has, IIRC, a 1k limit coded in the

[PATCH v2] drivers/crypto/nx: saves chaining value from co-processor

2013-08-07 Thread Fionnuala Gunter
This patch fixes a bug that is triggered when cts(cbc(aes)) is used with nx-crypto driver on input larger than 32 bytes. The chaining value from co-processor was not being saved. This value is needed because it is used as the IV by cts(cbc(aes)). Signed-off-by: Fionnuala Gunter Reviewed-by: Marc

Re: [PATCH v3 2/3] powerpc/85xx: Add silicon device tree for C293

2013-08-07 Thread Scott Wood
On Wed, 2013-07-31 at 21:32 -0500, Liu Po-B43644 wrote: > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Wednesday, July 31, 2013 11:47 PM > > To: Liu Po-B43644 > > Cc: Wood Scott-B07421; linuxppc-...@ozlabs.org; ga...@kernel.crashing.org; > > Fleming Andy-AFLEMING; Hu Min

Re: Enable CONFIG_DEVTMPFS_MOUNT to ensure /dev can be mounted correctly

2013-08-07 Thread Scott Wood
On Thu, Apr 11, 2013 at 09:56:30PM +0800, Zhenhua Luo wrote: > When using recent udev, the /dev node mount requires CONFIG_DEVTMPFS_MOUNT > is enabled in Kernel. The patch enables the option in defconfig of Freescale > QorIQ targets. > > Changed defconfig list: >arch/powerpc/configs/85xx/p1023

Re: [1/3,v2] powerpc/dts: update MSI bindings doc for MPIC v4.3

2013-08-07 Thread Scott Wood
On Fri, Jun 21, 2013 at 06:59:12PM +0800, Minghuan Lian wrote: > Add compatible "fsl,mpic-msi-v4.3" for MPIC v4.3. MPIC v4.3 contains > MSIIR and MSIIR1. MSIIR supports 8 MSI registers and MSIIR1 supports > 16 MSI registers, but uses different IBS and SRS shift. When using > MSIR1, the interrupt nu

Re: [3/3,v2] powerpc/fsl_msi: add MSIIR1 support for MPIC v4.3

2013-08-07 Thread Scott Wood
On Fri, Jun 21, 2013 at 06:59:14PM +0800, Minghuan Lian wrote: > The original MPIC MSI bank contains 8 registers, MPIC v4.3 MSI bank > contains 16 registers, and this patch adds NR_MSI_REG_MAX and > NR_MSI_IRQS_MAX to describe the maximum capability of MSI bank. > MPIC v4.3 provides MSIIR1 to index

Re: powerpc/mpc85xx: fix non-bootcpu cannot up after hibernation resume

2013-08-07 Thread Scott Wood
On Tue, May 14, 2013 at 04:05:56PM +0800, Dongsheng Wang wrote: > This problem belongs to the core synchronization issues. > The cpu1 already updated spin_table values, but bootcore cannot get > this value in time. > > After bootcpu hibiernation restore the pages. we are now running > with the ker

[PATCH v2 1/4] powerpc/tm: Add checkpointed versions of some SPRs to thread_struct

2013-08-07 Thread Michael Neuling
Transactional memory will restore the TAR, PPR and DSCR on transaction failure. Add these to the thread_struct for use in the future Signed-off-by: Michael Neuling Cc: --- arch/powerpc/include/asm/processor.h | 4 arch/powerpc/kernel/asm-offsets.c| 3 +++ 2 files changed, 7 insertions

[PATCH v2 2/4] powerpc: Add new save_tar() register function.

2013-08-07 Thread Michael Neuling
Add save_tar() function to save the Target Address Register (TAR). This will be used in a future patch to save the TAR earlier than it currently is. Signed-off-by: Michael Neuling Cc: --- arch/powerpc/include/asm/switch_to.h | 9 + arch/powerpc/kernel/entry_64.S | 1 - 2 files ch

[PATCH v2 3/4] powerpc: Save the TAR register earlier

2013-08-07 Thread Michael Neuling
This moves us to use the save_tar() function to save the Target Address Register (TAR) a lot earlier in __switch_to. We need to save the TAR earlier as we may overwrite it in the transactional memory reclaim/recheckpoint path. Signed-off-by: Michael Neuling Cc: --- arch/powerpc/kernel/entry_64

[PATCH v2 4/4] powerpc/tm: Save and restore checkpointed TAR, PPR and DSCR

2013-08-07 Thread Michael Neuling
Currently we don't save and restore the checkpointed TAR, PPR and DSCR. This adds the required save and restore to the treclaim and trechkpt code. Signed-off-by: Michael Neuling Cc: --- arch/powerpc/kernel/tm.S | 20 1 file changed, 20 insertions(+) diff --git a/arch/powe

[PATCH v3 1/2] powerpc: add Book E support to 64-bit hibernation

2013-08-07 Thread Dongsheng Wang
From: Wang Dongsheng Update the 64-bit hibernation code to support Book E CPUs. Some registers and instructions are not defined for Book3e (SDR reg, tlbia instruction). SDR: Storage Description Register. Book3S and Book3E have different address translation mode, we do not need HTABORG & HTABSIZE

Re: [RFC PATCH 7/9] powerpc: Decode and save machine check event.

2013-08-07 Thread Mahesh Jagannath Salgaonkar
On 08/08/2013 12:11 AM, Scott Wood wrote: > On Wed, 2013-08-07 at 15:09 +0530, Mahesh J Salgaonkar wrote: >> diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile >> index a1aba53..0b5b04a 100644 >> --- a/arch/powerpc/kernel/Makefile >> +++ b/arch/powerpc/kernel/Makefile >> @@ -3

Re: [PATCH 00/11] Add compression support to pstore

2013-08-07 Thread Aruna Balakrishnaiah
Hi Tony, On Thursday 08 August 2013 03:52 AM, Tony Luck wrote: On Tue, Aug 6, 2013 at 10:35 PM, Tony Luck wrote: ERST is at the whim of the BIOS writer (the ACPI standard doesn't provide any suggestions on record sizes). My systems support ~6K record size. Off by a little - 7896 bytes on my

Re: [RFC PATCH 1/9] powerpc: Split the common exception prolog logic into two section.

2013-08-07 Thread Anshuman Khandual
On 08/07/2013 03:08 PM, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > This patch splits the common exception prolog logic into two parts to > facilitate reuse of existing code in the next patch. The second part will > be reused in the machine check exception routine in the next patch.

Re: [RFC PATCH 1/9] powerpc: Split the common exception prolog logic into two section.

2013-08-07 Thread Benjamin Herrenschmidt
On Thu, 2013-08-08 at 09:40 +0530, Anshuman Khandual wrote: > On 08/07/2013 03:08 PM, Mahesh J Salgaonkar wrote: > > From: Mahesh Salgaonkar > > > > This patch splits the common exception prolog logic into two parts to > > facilitate reuse of existing code in the next patch. The second part will

Re: [PATCH 00/11] Add compression support to pstore

2013-08-07 Thread Aruna Balakrishnaiah
On Wednesday 07 August 2013 11:00 PM, Tony Luck wrote: Oh - one more thing - and my apologies for not spotting this before: dst = allocate_buf_for_compression(big_buf_sz); No - you may not call kmalloc() in oops/panic context. Please pre-allocate everything you need in some in

Re: [RFC PATCH 2/9] powerpc: handle machine check in Linux host.

2013-08-07 Thread Anshuman Khandual
On 08/07/2013 03:08 PM, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > Move machine check entry point into Linux. So far we were dependent on > firmware to decode MCE error details and handover the high level info to OS. > > This patch introduces early machine check routine that saves

Re: [PATCH 00/11] Add compression support to pstore

2013-08-07 Thread Tony Luck
On Wed, Aug 7, 2013 at 9:29 PM, Aruna Balakrishnaiah wrote: > When we preallocate, we can use the same big_buf for compression as well as > decompression. > Also workspace will be one for both. By allocating max of inflate workspace > size and deflate > workspace size. We can save memory here. We

Re: [RFC PATCH 7/9] powerpc: Decode and save machine check event.

2013-08-07 Thread Paul Mackerras
On Wed, Aug 07, 2013 at 03:09:13PM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > Now that we handle machine check in linux, the MCE decoding should also > take place in linux host. This info is crucial to log before we go down > in case we can not handle the machine check errors

Re: [RFC PATCH 2/9] powerpc: handle machine check in Linux host.

2013-08-07 Thread Paul Mackerras
On Wed, Aug 07, 2013 at 03:08:15PM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > Move machine check entry point into Linux. So far we were dependent on > firmware to decode MCE error details and handover the high level info to OS. > > This patch introduces early machine check r

Re: [RFC PATCH 5/9] powerpc: Flush SLB/TLBs if we get SLB/TLB machine check errors on power7.

2013-08-07 Thread Paul Mackerras
On Wed, Aug 07, 2013 at 03:08:55PM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > If we get a machine check exception due to SLB or TLB errors, then flush > SLBs/TLBs and reload SLBs to recover. We do this in real mode before turning > on MMU. Otherwise we would run into nested m

[PATCH v3] Enhanced support for MPC8xx/8xxx watchdog

2013-08-07 Thread Christophe Leroy
This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx, at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must be pinged twice a second. This is not in line with the Linux watchdog concept which is based on a default watchdog timeout around 60s. This p

Re: [v2] Enhanced support for MPC8xx/8xxx watchdog

2013-08-07 Thread leroy christophe
Le 26/06/2013 01:04, Scott Wood a écrit : On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote: This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx, at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must be pinged twice a second. This