> A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
> goes down. when the link goes down, Non-posted transactions issued
> via the ATMU requiring completion result in an instruction stall.
> At the same time a machine-check exception is generated to the core
> to allow further pr
Hi,
With current way of device reporting in RapidIO subsystem you will need
to have at least one SRIO device (switch or EP) attached to your mport
to be able to find a reference to that mport device object. Like in the code
fragment below:
static int rioport_init_module(void)
{
int ret,
Qiang Liu wrote:
> Use spin_lock_bh to instead of spin_lock_irqsave for improving performance.
You forgot to include the evidence that performance has improved, as well
as an explanation why it's okay to use spin_lock_bh, and why it's faster.
I told you to respin the patch with that informatio
On 07/15/2012 09:07 PM, Lu.Jiang wrote:
> 于 2012年07月13日 19:50, Kumar Gala 写道:
>> On Jul 12, 2012, at 9:44 PM, Jiang Lu wrote:
>>
>>> On PPC44x core, the WRC(Watchdog-timer Reset Control) field of TCR
>>> of timer can not reset by software after set to a non-zero value.
>>> Which means software can
On Sun, Jul 15, 2012 at 9:50 PM, Gavin Shan wrote:
> On Fri, Jul 13, 2012 at 02:12:50PM -0600, Bjorn Helgaas wrote:
>>On Fri, Jun 29, 2012 at 02:47:48PM +0800, Gavin Shan wrote:
>>> On some powerpc platforms, device BARs need to be assigned to separate
>>> "segments" of the address space in order
On 07/15/2012 10:31 PM, Shengzhou Liu wrote:
> On some platforms, in RC mode, root port has neither MSI/MSI-X nor INTx
> interrupt generated, which are available only in EP mode on those platform.
> In this case, we try to use other interrupt for port service driver to have
> AER, Hot-plug, etc, se
On Mon, Jul 16, 2012 at 8:55 PM, Geert Uytterhoeven
wrote:
> JFYI, when comparing v3.5-rc7 to v3.5-rc6[3], the summaries are:
> - build errors: +5/-24
5 regressions:
+ arch/powerpc/sysdev/mpic.c: error: case label does not reduce to
an integer constant: => 890:9, 898:9, 886:9, 894:9
powerpc
On Mon, Jul 16, 2012 at 10:27:57AM -0700, Rick Jones wrote:
> On 07/16/2012 10:01 AM, Thadeu Lima de Souza Cascardo wrote:
> >In its receive path, mlx4_en driver maps each page chunk that it pushes
> >to the hardware and unmaps it when pushing it up the stack. This limits
> >throughput to about 3Gb
From: Stuart Yoder
without setting the stack limit like this there is the possibility
of stack overflow which corrupts the thread info but
is not detected by stack overflow detection
Signed-off-by: Stuart Yoder
---
arch/powerpc/kernel/entry_32.S | 12 ++--
1 files changed, 10 inserti
On Fri, Jun 22, 2012 at 7:54 PM, David Daney wrote:
> On 06/20/2012 09:12 AM, Ralf Baechle wrote:
>>
>> On Wed, Jun 20, 2012 at 03:27:59PM +0900, Yoichi Yuasa wrote:
>>
>>> Commit: 3777808873b0c49c5cf27e44c948dfb02675d578 breaks all MIPS builds.
>>
>>
>> Thanks, fix applied.
>>
>
> Where was it ap
On 07/16/2012 12:06 PM, Thadeu Lima de Souza Cascardo wrote:
On Mon, Jul 16, 2012 at 10:27:57AM -0700, Rick Jones wrote:
What is the effect on packet-per-second performance? (eg aggregate,
burst-mode netperf TCP_RR with TCP_NODELAY set or perhaps UDP_RR)
I used uperf with TCP_NODELAY and 16
On Mon, Jul 16, 2012 at 12:08:29PM +0800, Qiang Liu wrote:
> Fix the potential risk when enable config NET_DMA and ASYNC_TX.
> Async_tx is lack of support in current release process of dma descriptor,
> all descriptors will be released whatever is acked or no-acked by async_tx,
> so there is a pote
On Fri, Jul 13, 2012 at 7:25 AM, Josh Boyer wrote:
> Right now, if the option is not set we call booke_wdt_disable which
> indeed does not actually _disable_ the WDT, but it does set the timer
> period to the maxium value. We could go one step further and implement
> a simple timer that pops and
On Sun, Jul 15, 2012 at 9:07 PM, Lu.Jiang wrote:
>
> Since the ppc44x's watch dog can not reset by software, such operation only
> set the timeout value(WDTP) to minimum, and cause the system reboot
> immediately.
It's supposed to set it to the maximum. That's what WDTP_MASK is
supposed to do.
On Jul 16, 2012, at 2:06 PM, Stuart Yoder wrote:
> From: Stuart Yoder
>
> without setting the stack limit like this there is the possibility
> of stack overflow which corrupts the thread info but
> is not detected by stack overflow detection
>
> Signed-off-by: Stuart Yoder
> ---
> arch/powerp
On Mon, Jul 16, 2012 at 12:42:41PM -0700, Rick Jones wrote:
> On 07/16/2012 12:06 PM, Thadeu Lima de Souza Cascardo wrote:
> >On Mon, Jul 16, 2012 at 10:27:57AM -0700, Rick Jones wrote:
> >
> >>What is the effect on packet-per-second performance? (eg aggregate,
> >>burst-mode netperf TCP_RR with T
On Mon, Jul 16, 2012 at 11:43:33PM +0300, Or Gerlitz wrote:
> On Mon, Jul 16, 2012 at 10:42 PM, Rick Jones wrote:
>
> > I was thinking more along the lines of an additional comparison,
> > explicitly using netperf TCP_RR or something like it, not just the packets
> > per second from a bulk transf
On Mon, Jul 16, 2012 at 4:28 PM, Tabi Timur-B04825 wrote:
> On Fri, Jul 13, 2012 at 7:25 AM, Josh Boyer wrote:
>
>> Right now, if the option is not set we call booke_wdt_disable which
>> indeed does not actually _disable_ the WDT, but it does set the timer
>> period to the maxium value. We could
Josh Boyer wrote:
> I have no idea about FSL cores, but the 4xx maximum value selects TBU
> bit 31. When that bit flips is going to be determined by the speed of
> the clock driving TB. Most of the 4xx implementations I have seen use
> the CPU clock, so to take the example from the 44x user manu
I was thinking more along the lines of an additional comparison,
explicitly using netperf TCP_RR or something like it, not just the
packets per second from a bulk transfer test.
rick
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majord...@vger.k
> -Original Message-
> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> Sent: Monday, July 16, 2012 3:36 PM
> To: Yoder Stuart-B08248
> Cc: b...@kernel.crashing.org; s...@canb.auug.org.au; pau...@samba.org;
> linuxppc-dev@lists.ozlabs.org;
> ag...@suse.de
> Subject: Re: [PATCH] powe
From: Sukadev Bhattiprolu
Date: Mon, 2 Jul 2012 08:06:14 -0700
Subject: [PATCH 2/2][v2] powerpc/perf: Sample only if SIAR-Valid bit is set in
P7+
On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the
contents of SIAR and SDAR are valid.
For marked instructions on P7+, we must s
>From 7e47842eb50d56bdeba44ea526979ee5160dbbc0 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 3 Jul 2012 13:32:46 -0700
Subject: [PATCH 1/2][v2] powerpc: Define PV_POWER7p
This change is based on the patch that Carl Love posted to LKML
https://lkml.org/lkml/2012/6/22/309
Gabriel Paubert [paub...@iram.es] wrote:
| > +#define PV_POWER7P 0x004A
| > #define PV_630 0x0040
| > #define PV_630p0x0041
| > #define PV_970MP 0x0044
|
| Hmm, before this patch the PVR definitions were sorted in ascending
| numerical order, at least for the list of 64 bit pr
On Mon, Jul 16, 2012 at 10:42 PM, Rick Jones wrote:
> I was thinking more along the lines of an additional comparison,
> explicitly using netperf TCP_RR or something like it, not just the packets
> per second from a bulk transfer test.
>
TCP_STREAM would be good to know here as well
Or.
___
On Mon, Jul 16, 2012 at 10:42 PM, Rick Jones wrote:
> I was thinking more along the lines of an additional comparison,
> explicitly using netperf TCP_RR or something like it, not just the packets
> per second from a bulk transfer test.
TCP_STREAM from this setup before the patch would be good t
On Mon, Jul 16, 2012 at 11:30:23PM +0800, Gavin Shan wrote:
> v1 -> v2:
> * Shorten the varaible names so that they looks more short.
> * Changelog adjustment so that they looks more meaningful.
>
> v2 -> v3:
> * Rebase to 3.5.RC4
>
> v3 -> v4:
> * Merge Yinghai's patches.
On 07/15/2012 10:35 PM, Jia Hongtao wrote:
> From: Liu Shuo
>
> The MPIC chip with version 2.0 has a MSI errata (errata PIC1 of mpc8544),
> It causes that neither MSI nor MSI-X can work fine. There is a workaround
> to allow MSI-X to function properly.
s/There is/This is/
There is also a workar
On Mon, Jul 16, 2012 at 11:30:27PM +0800, Gavin Shan wrote:
> The patch implements the weak function to return the default I/O
> or memory alignment for P2P bridge. Currently, I/O window has 4KiB
> alignment and memory window is 4MiB aligned by default. On the other
> hand, those platforms (e.g. po
Hi Wen,
2012/07/13 18:10, Wen Congyang wrote:
> At 07/09/2012 06:26 PM, Yasuaki Ishimatsu Wrote:
>> When (hot)adding memory into system, /sys/firmware/memmap/X/{end, start,
>> type}
>> sysfs files are created. But there is no code to remove these files. The
>> patch
>> implements the function to
Hi Wen,
2012/07/16 11:32, Wen Congyang wrote:
> At 07/09/2012 06:26 PM, Yasuaki Ishimatsu Wrote:
>> When (hot)adding memory into system, /sys/firmware/memmap/X/{end, start,
>> type}
>> sysfs files are created. But there is no code to remove these files. The
>> patch
>> implements the function to
Hi Wen,
2012/07/13 12:26, Wen Congyang wrote:
> At 07/09/2012 06:24 PM, Yasuaki Ishimatsu Wrote:
>> acpi_memory_device_remove() has been prepared to remove physical memory.
>> But, the function only frees acpi_memory_device currentlry.
>>
>> The patch adds following functions into acpi_memory_devi
On Mon, Jul 16, 2012 at 11:30:28PM +0800, Gavin Shan wrote:
> The patch changes function pbus_size_io() and pbus_size_mem() to
> do resource (I/O, memory and prefetchable memory) reassignment
> based on the minimal alignments for the p2p bridge, which was
> retrieved by function pcibios_window_alig
On Mon, 16 Jul 2012 12:07:16 +0800
Qiang Liu wrote:
> drivers/crypto/Kconfig |9 +
> drivers/crypto/talitos.c | 410 +++
> drivers/crypto/talitos.h | 53 ++
> drivers/dma/fsldma.c | 436
> +-
>
Hi Wen,
2012/07/13 19:40, Wen Congyang wrote:
> At 07/09/2012 06:24 PM, Yasuaki Ishimatsu Wrote:
>> acpi_memory_device_remove() has been prepared to remove physical memory.
>> But, the function only frees acpi_memory_device currentlry.
>>
>> The patch adds following functions into acpi_memory_devi
Hi Wen,
2012/07/13 12:35, Wen Congyang wrote:
> At 07/09/2012 06:24 PM, Yasuaki Ishimatsu Wrote:
>> acpi_memory_device_remove() has been prepared to remove physical memory.
>> But, the function only frees acpi_memory_device currentlry.
>>
>> The patch adds following functions into acpi_memory_devi
Hi Wen,
2012/07/17 10:44, Yasuaki Ishimatsu wrote:
> Hi Wen,
>
> 2012/07/13 12:35, Wen Congyang wrote:
>> At 07/09/2012 06:24 PM, Yasuaki Ishimatsu Wrote:
>>> acpi_memory_device_remove() has been prepared to remove physical memory.
>>> But, the function only frees acpi_memory_device currentlry.
>
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 17, 2012 7:20 AM
> To: Jia Hongtao-B38951
> Cc: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org;
> soniccat@gmail.com
> Subject: Re: [PATCH] powerpc/85xx: workaround for chips with MSI hareware
> errata to s
At 07/17/2012 09:54 AM, Yasuaki Ishimatsu Wrote:
> Hi Wen,
>
> 2012/07/17 10:44, Yasuaki Ishimatsu wrote:
>> Hi Wen,
>>
>> 2012/07/13 12:35, Wen Congyang wrote:
>>> At 07/09/2012 06:24 PM, Yasuaki Ishimatsu Wrote:
acpi_memory_device_remove() has been prepared to remove physical memory.
B
On some platforms, root port has neither MSI/MSI-X nor INTx interrupt
generated in RC mode. In this case, we have to use other interrupt(i.e.
system shared interrupt) for port service irq to have AER, Hot-plug, etc,
services to work.
Signed-off-by: Shengzhou Liu
---
drivers/pci/pcie/portdrv_core
> -Original Message-
> From: Wood Scott-B07421
> Sent: Monday, July 16, 2012 11:47 PM
> To: Liu Shengzhou-B36685
> Cc: bhelg...@google.com; linux-...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH 1/2 v2] PCI: Add PCI_DEV_FLAGS_USE_NON_MSI_INTX_IRQ to
> enable no
Hi Wen,
2012/07/17 11:32, Wen Congyang wrote:
> At 07/17/2012 09:54 AM, Yasuaki Ishimatsu Wrote:
>> Hi Wen,
>>
>> 2012/07/17 10:44, Yasuaki Ishimatsu wrote:
>>> Hi Wen,
>>>
>>> 2012/07/13 12:35, Wen Congyang wrote:
At 07/09/2012 06:24 PM, Yasuaki Ishimatsu Wrote:
> acpi_memory_device_remo
At 07/17/2012 11:08 AM, Yasuaki Ishimatsu Wrote:
> Hi Wen,
>
> 2012/07/17 11:32, Wen Congyang wrote:
>> At 07/17/2012 09:54 AM, Yasuaki Ishimatsu Wrote:
>>> Hi Wen,
>>>
>>> 2012/07/17 10:44, Yasuaki Ishimatsu wrote:
Hi Wen,
2012/07/13 12:35, Wen Congyang wrote:
> At 07/09/2012 0
On Mon, Jul 16, 2012 at 12:08 PM, Qiang Liu wrote:
> Fix the potential risk when enable config NET_DMA and ASYNC_TX.
> Async_tx is lack of support in current release process of dma descriptor,
> all descriptors will be released whatever is acked or no-acked by async_tx,
> so there is a potential r
On Tue, Jul 17, 2012 at 10:23:12AM +0800, Gavin Shan wrote:
> v1 -> v2:
> * Shorten the varaible names so that they looks more short.
> * Changelog adjustment so that they looks more meaningful.
>
> v2 -> v3:
> * Rebase to 3.5.RC4
>
> v3 -> v4:
> * Merge Yinghai's patches.
> -Original Message-
> From: Phillips Kim-R1AAHA
> Sent: Tuesday, July 17, 2012 9:04 AM
> To: Liu Qiang-B32616
> Cc: linux-cry...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Li Yang-
> R58472; dan.j.willi...@intel.com; herb...@gondor.hengli.com.au
> Subject: Re: [PATCH v3 0/4] Raid: ena
> -Original Message-
> From: linux-crypto-ow...@vger.kernel.org [mailto:linux-crypto-
> ow...@vger.kernel.org] On Behalf Of Li Yang
> Sent: Tuesday, July 17, 2012 11:37 AM
> To: Liu Qiang-B32616
> Cc: linux-cry...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Ira W.
> Snyder; Vinod Koul;
> -Original Message-
> From: Tabi Timur-B04825
> Sent: Monday, July 16, 2012 10:25 PM
> To: Liu Qiang-B32616
> Cc: linux-cry...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Vinod
> Koul; herb...@gondor.hengli.com.au; Dan Williams; Li Yang-R58472;
> da...@davemloft.net
> Subject: Re: [lin
Hi Wen,
2012/07/17 12:32, Wen Congyang wrote:
> At 07/17/2012 11:08 AM, Yasuaki Ishimatsu Wrote:
>> Hi Wen,
>>
>> 2012/07/17 11:32, Wen Congyang wrote:
>>> At 07/17/2012 09:54 AM, Yasuaki Ishimatsu Wrote:
Hi Wen,
2012/07/17 10:44, Yasuaki Ishimatsu wrote:
> Hi Wen,
>
> 2
On Tue, Jul 17, 2012 at 10:23:17AM +0800, Gavin Shan wrote:
> The patch changes function pbus_size_io() and pbus_size_mem() to
> do resource (I/O, memory and prefetchable memory) reassignment
> based on the minimal alignments for the p2p bridge, which was
> retrieved by function window_alignment().
At 07/17/2012 12:51 PM, Yasuaki Ishimatsu Wrote:
> Hi Wen,
>
> 2012/07/17 12:32, Wen Congyang wrote:
>> At 07/17/2012 11:08 AM, Yasuaki Ishimatsu Wrote:
>>> Hi Wen,
>>>
>>> 2012/07/17 11:32, Wen Congyang wrote:
At 07/17/2012 09:54 AM, Yasuaki Ishimatsu Wrote:
> Hi Wen,
>
> 2012/07
Hi Wen,
2012/07/17 14:17, Wen Congyang wrote:
> At 07/17/2012 12:51 PM, Yasuaki Ishimatsu Wrote:
>> Hi Wen,
>>
>> 2012/07/17 12:32, Wen Congyang wrote:
>>> At 07/17/2012 11:08 AM, Yasuaki Ishimatsu Wrote:
Hi Wen,
2012/07/17 11:32, Wen Congyang wrote:
> At 07/17/2012 09:54 AM, Ya
On Tue, Jul 17, 2012 at 01:05:47PM +0800, Ram Pai wrote:
> On Tue, Jul 17, 2012 at 10:23:17AM +0800, Gavin Shan wrote:
> > The patch changes function pbus_size_io() and pbus_size_mem() to
> > do resource (I/O, memory and prefetchable memory) reassignment
> > based on the minimal alignments for the
On Tue, Jul 17, 2012 at 01:36:49PM +0800, Gavin Shan wrote:
> On Tue, Jul 17, 2012 at 01:23:33PM +0800, Ram Pai wrote:
> >On Tue, Jul 17, 2012 at 01:05:47PM +0800, Ram Pai wrote:
> >> On Tue, Jul 17, 2012 at 10:23:17AM +0800, Gavin Shan wrote:
> >> > The patch changes function pbus_size_io() and pb
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 17, 2012 7:20 AM
> To: Jia Hongtao-B38951
> Cc: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org;
> soniccat@gmail.com
> Subject: Re: [PATCH] powerpc/85xx: workaround for chips with MSI hareware
> errata to su
On Tue, Jul 17, 2012 at 12:23 PM, Liu Qiang-B32616 wrote:
>> -Original Message-
>> From: Tabi Timur-B04825
>> Sent: Monday, July 16, 2012 10:25 PM
>> To: Liu Qiang-B32616
>> Cc: linux-cry...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Vinod
>> Koul; herb...@gondor.hengli.com.au; Dan Wi
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