Josh Boyer wrote:
> I have no idea about FSL cores, but the 4xx maximum value selects TBU
> bit 31. When that bit flips is going to be determined by the speed of
> the clock driving TB. Most of the 4xx implementations I have seen use
> the CPU clock, so to take the example from the 44x user manuals, a 400
> MHz clock results in a maximum time period of ~21 seconds. Multiply
> by 3 to get the time before the WDT actually does a reset and you're
> at about 1min.
Ah, that is a problem.
> NOWAYOUT is working. The patch was basically forcing it on, even if
> the end user doesn't want the behavior described. From what you've
> said, that simply doesn't matter in the FSL case because the machine
> will run for a really long time. On 4xx, something needs to be done
> to keep the machine running if the user doesn't want the NOWAYOUT
> behavior, which is why I suggested a kernel timer.
Yes, I agree now -- a kernel timer is a better idea. And it doesn't need
to be 4xx-specific. Although, I wonder if it's the time is reliable enough.
We already have an exception handler:
#ifdef CONFIG_BOOKE_WDT
/*
* Default handler for a Watchdog exception,
* spins until a reboot occurs
*/
void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
{
/* Generic WatchdogHandler, implement your own */
mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
return;
}
void WatchdogException(struct pt_regs *regs)
{
printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
WatchdogHandler(regs);
}
#endif
Maybe instead of disabling interrupts, we should ping the watchdog instead?
--
Timur Tabi
Linux kernel developer at Freescale
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