This was left as a sysdev, breaking the build
Signed-off-by: Benjamin Herrenschmidt
---
drivers/macintosh/via-pmu.c | 56 +-
1 files changed, 12 insertions(+), 44 deletions(-)
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index
commit 9d07bc841c9779b4d7902e417f4e509996ce805d
"powerpc: Properly handshake CPUs going out of boot spin loop"
Would cause a miscalculation of the hard CPU ID. It removes breaking
out of the loop when finding a match with a processor, thus the "i"
used as an index in the intserv array is always in
Hi Linus
Here's the bulk of powerpc changes for this merge window.
Some of the highlights are:
- Basic support for the new PowerEN processor (Power Edge of Network, I
didn't come up with that name), and known in the linux code by one of
it's former code names "wsp" (aka Wirespeed Processor). T
Hi,
gcc 4.6 with -Werror does not like setting but not using variables
anymore.
So remove it, it does not seem necessary.
Signed-off-by: Marcus Meissner
Ciao, Marcus
---
arch/powerpc/include/asm/pgtable-ppc64.h |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/a
On Thu, 19 May 2011 11:05:49 -0500
Timur Tabi wrote:
> Alan Cox wrote:
> >> > +/* Pass the received data to the tty layer. Note that
> >> > this
> >> > + * function calls tty_buffer_request_room(), so I'm not
> >> > sure if
> >> > + * we should h
Kumar,
Are you planning to release support for dual-port SRIO controller?
If yes, it may be just merged into it (unless dual-port implementation
already has it).
Alex.
> -Original Message-
> From: linuxppc-dev-bounces+alexandre.bounine=idt@lists.ozlabs.org
> [mailto:linuxppc-dev-
> b
Any reason for me not to apply this and send it upstream for now?
- k
On May 20, 2011, at 7:14 AM, Bounine, Alexandre wrote:
> Kumar,
>
> Are you planning to release support for dual-port SRIO controller?
> If yes, it may be just merged into it (unless dual-port implementation
> already has it)
On Thu, May 19, 2011 at 10:52 PM, Benjamin Herrenschmidt
wrote:
>> Unfortunately, the firmware is also required:
>> - to configure Blue Gene Interrupt Controller(BIC)
>> - to configure Torus DMA unit. e.g. fifo
>> - to configure global interrupt (even we don't use, we need to disable
>> some chann
On Thu, May 19, 2011 at 02:06:18PM +1000, Benjamin Herrenschmidt wrote:
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
When I try to build 'next' (now at 208b3a4c), it does not compile due
to a change from the following commit.
Not at all. I tested it earlier and it works for me on 8548 platform.
> -Original Message-
> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> Sent: Friday, May 20, 2011 8:42 AM
> To: Bounine, Alexandre
> Cc: Li Yang-R58472; Xie Shaohui-B21989; Zang Roy-R61911; akpm@linux-
> foundation
Hi Alex,
Just for your information as you mentioned about it. The dual port support is
being worked on, but not likely to be ready in this merge window.
- Leo
发件人: Bounine, Alexandre [alexandre.boun...@idt.com]
发送时间: 2011年5月20日 21:18
到: Kumar Gala
Cc: L
On Nov 18, 2010, at 12:57 AM, Shaohui Xie wrote:
> The sRIO controller reports errors to the core with one signal, it uses
> register EPWISR to provides the core quick access to where the error occurred.
> The EPWISR indicates that there are 4 interrupts sources, port1, port2,
> message
> unit a
On Nov 18, 2010, at 12:57 AM, Shaohui Xie wrote:
> Signed-off-by: Shaohui Xie
> Cc: Li Yang
> Cc: Kumar Gala
> Cc: Roy Zang
> Cc: Alexandre Bounine
> ---
> arch/powerpc/include/asm/rio.h |5 +
> arch/powerpc/kernel/traps.c| 13 +
> arch/powerpc/sysdev/fsl_rio.c | 1
On Fri, May 20, 2011 at 03:23:29PM +0200, Richard Cochran wrote:
>When I try to build 'next' (now at 208b3a4c), it does not compile due
>to a change from the following commit.
>
>> Benjamin Herrenschmidt (1):
>> powerpc/smp: Make start_secondary_resume available to all CPU variants
>
>I would
On Fri, May 20, 2011 at 09:58:45AM -0400, Josh Boyer wrote:
> On Fri, May 20, 2011 at 03:23:29PM +0200, Richard Cochran wrote:
> >When I try to build 'next' (now at 208b3a4c), it does not compile due
> >to a change from the following commit.
> >
> >> Benjamin Herrenschmidt (1):
> >> powerpc/s
A bug/erratum fix, and a 2 long standing SRIO patches...
The following changes since commit 208b3a4c196e733b9cec006dc132cfc149b2810a:
powerpc: Fix hard CPU IDs detection (2011-05-20 17:50:18 +1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/po
On Fri, May 20, 2011 at 04:32:59PM +0200, Richard Cochran wrote:
>On Fri, May 20, 2011 at 09:58:45AM -0400, Josh Boyer wrote:
>> On Fri, May 20, 2011 at 03:23:29PM +0200, Richard Cochran wrote:
>> >When I try to build 'next' (now at 208b3a4c), it does not compile due
>> >to a change from the follow
On Fri, May 20, 2011 at 1:09 AM, Kumar Gala wrote:
> +CONFIG_MATH_EMULATION=y
Don't these chips have hardware floating point?
> +CONFIG_FORCE_MAX_ZONEORDER=13
This may be unnecessary. I originally set CONFIG_FORCE_MAX_ZONEORDER
to 12 because the DIU driver needs to be able to allocate a conti
This patch set defines a binding for FSL MPIC message registers and implements
an API for accessing those message registers. Testing was done on a MPC8572DS
in an Linux-Linux AMP setup using OpenMCAPI (www.openmcapi.org) to communicate
between OS instances. The message register API is used by the
This binding documents how the message register blocks found in some FSL
MPIC implementations shall be represented in a device tree.
Signed-off-by: Meador Inge
Cc: Hollis Blanchard
Cc: Grant Likely
Cc: Benjamin Herrenschmidt
---
.../devicetree/bindings/powerpc/fsl/mpic-msgr.txt | 62 ++
Some MPIC implementations contain one or more blocks of message registers
that are used to send messages between cores via IPIs. A simple API has
been added to access (get/put, read, write, etc ...) these message registers.
The available message registers are initially discovered via nodes in the
In general we will not have EE soft-disabled or be napping when
these exceptions happen, but still it is not correct.
The guest doorbell exceptions can only be triggered with MSR[GS]=1,
and thus for host kernel nesting purposes are base-level exceptions.
Note that ehpriv and hypercall are trigger
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/exceptions-64e.S | 22 +-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64e.S
b/arch/powerpc/kernel/exceptions-64e.S
index b60f49e..87ca569 100644
--- a/arch/powerpc/kernel/ex
On Fri, 20 May 2011 01:09:22 -0500
Kumar Gala wrote:
> * Added BSD dual-license
> * Moved mpic-parent to root so we dont need to duplicate everywhere
> * Added next level cache from L2 to CPC
> * Moved to 4-cell MPIC interrupt properties
> * Added 3 MSI banks
> * Added numerous missing nodes: soc
On May 20, 2011, at 2:04 PM, Scott Wood wrote:
> On Fri, 20 May 2011 01:09:22 -0500
> Kumar Gala wrote:
>
>> * Added BSD dual-license
>> * Moved mpic-parent to root so we dont need to duplicate everywhere
>> * Added next level cache from L2 to CPC
>> * Moved to 4-cell MPIC interrupt properties
On May 20, 2011, at 9:45 AM, Tabi Timur-B04825 wrote:
> On Fri, May 20, 2011 at 1:09 AM, Kumar Gala wrote:
>
>> +CONFIG_MATH_EMULATION=y
>
> Don't these chips have hardware floating point?
Darn, I thought I looked at that. Will fix.
>> +CONFIG_FORCE_MAX_ZONEORDER=13
>
> This may be unneces
Kumar Gala wrote:
>> > This may be unnecessary. I originally set CONFIG_FORCE_MAX_ZONEORDER
>> > to 12 because the DIU driver needs to be able to allocate a contiguous
>> > 5MB memory block. Setting it to 13 means a max of 16MB. Is there a
>> > reason the default isn't good enough?
> Is there s
On Fri, 20 May 2011 14:25:23 -0500
Timur Tabi wrote:
> Kumar Gala wrote:
> >> > This may be unnecessary. I originally set CONFIG_FORCE_MAX_ZONEORDER
> >> > to 12 because the DIU driver needs to be able to allocate a contiguous
> >> > 5MB memory block. Setting it to 13 means a max of 16MB. Is t
On May 20, 2011, at 2:00 PM, Scott Wood wrote:
> In general we will not have EE soft-disabled or be napping when
> these exceptions happen, but still it is not correct.
>
> The guest doorbell exceptions can only be triggered with MSR[GS]=1,
> and thus for host kernel nesting purposes are base-le
On Fri, 20 May 2011 14:36:09 -0500
Kumar Gala wrote:
>
> On May 20, 2011, at 2:00 PM, Scott Wood wrote:
>
> > In general we will not have EE soft-disabled or be napping when
> > these exceptions happen, but still it is not correct.
> >
> > The guest doorbell exceptions can only be triggered wi
The e500mc and e5500 based cores are only available on corenet based
SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs
and any future processors in these families.
Signed-off-by: Kumar Gala
---
* Removed MATH_EMU
* Added KEXEC
arch/powerpc/configs/corenet32_smp_defconfig |
On May 20, 2011, at 9:46 AM, Josh Boyer wrote:
> On Fri, May 20, 2011 at 04:32:59PM +0200, Richard Cochran wrote:
>> On Fri, May 20, 2011 at 09:58:45AM -0400, Josh Boyer wrote:
>>> On Fri, May 20, 2011 at 03:23:29PM +0200, Richard Cochran wrote:
When I try to build 'next' (now at 208b3a4c),
Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
however it uses a 64-bit instruction which is not valid on 32-bit
platforms. Use 'stw' instead.
Reported-by: Richard Cochran
Tested-by: Richard Cochran
Signed-off-by: Josh Boyer
---
diff --git a/arch/powerpc/kernel/misc_3
On 05/20/2011 12:13 PM, Marcus Meissner wrote:
> Hi,
>
> gcc 4.6 with -Werror does not like setting but not using variables
> anymore.
>
> So remove it, it does not seem necessary.
>
> Signed-off-by: Marcus Meissner
>
> Ciao, Marcus
> ---
> arch/powerpc/include/asm/pgtable-ppc64.h |8 ++--
On May 19, 2011, at 8:54 AM, Timur Tabi wrote:
> have hypervisor extensions (e.g. the P4080 which has an e500mc core).
>
> I think it makes sense for this patchset to go through Kumar Gala's -next
> branch, but I still need ACKs from various people on the parts that are
> not e500-specific.
>
On Thu, 19 May 2011 07:33:55 +1000
Benjamin Herrenschmidt wrote:
> On Wed, 2011-05-18 at 16:05 -0500, Scott Wood wrote:
> > Loads with non-linear access patterns were producing a very high
> > ratio of recursive pt faults to regular tlb misses. Rather than
> > choose between a 4-level table walk
When using 64K pages with a separate cpio rootfs, U-Boot will align the rootfs
on a 4K
page boundary. When the memory is reserved, and subsequent early memblock_alloc
is called, it will allocate memory between the 64K page alignment and reserved
memory. When the reserved memory is subsequently fr
On Fri, May 20, 2011 at 04:22:25PM -0400, Josh Boyer wrote:
> Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
> however it uses a 64-bit instruction which is not valid on 32-bit
> platforms. Use 'stw' instead.
>
> Reported-by: Richard Cochran
> Tested-by: Richard Cochran
On Fri, 2011-05-20 at 15:57 -0500, Scott Wood wrote:
> I see a 2% cost going from virtual pmd to full 4-level walk in the
> benchmark mentioned above (some type of sort), and just under 3% in
> page-stride lat_mem_rd from lmbench.
>
> OTOH, the virtual pmd approach still leaves the possibility of
On Fri, 2011-05-20 at 08:01 -0500, Eric Van Hensbergen wrote:
> On Thu, May 19, 2011 at 10:52 PM, Benjamin Herrenschmidt
> wrote:
> >> Unfortunately, the firmware is also required:
> >> - to configure Blue Gene Interrupt Controller(BIC)
> >> - to configure Torus DMA unit. e.g. fifo
> >> - to confi
On Fri, 2011-05-20 at 14:58 -0700, Greg KH wrote:
> On Fri, May 20, 2011 at 04:22:25PM -0400, Josh Boyer wrote:
> > Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
> > however it uses a 64-bit instruction which is not valid on 32-bit
> > platforms. Use 'stw' instead.
> >
>
On Fri, 2011-05-20 at 15:26 -0600, Dave Carroll wrote:
> When using 64K pages with a separate cpio rootfs, U-Boot will align the
> rootfs on a 4K
> page boundary. When the memory is reserved, and subsequent early
> memblock_alloc
> is called, it will allocate memory between the 64K page alignment
On Fri, 2011-05-20 at 14:00 -0500, Scott Wood wrote:
> In general we will not have EE soft-disabled or be napping when
> these exceptions happen, but still it is not correct.
>
> The guest doorbell exceptions can only be triggered with MSR[GS]=1,
> and thus for host kernel nesting purposes are bas
On Fri, 2011-05-20 at 14:00 -0500, Scott Wood wrote:
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/kernel/exceptions-64e.S | 22 +-
> 1 files changed, 21 insertions(+), 1 deletions(-)
You can probably remove the doorbell re-check when enabling interrupts
now, can't you ?
On Fri, 2011-05-20 at 15:23 +0200, Richard Cochran wrote:
> On Thu, May 19, 2011 at 02:06:18PM +1000, Benjamin Herrenschmidt wrote:
> > are available in the git repository at:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
>
> When I try to build 'next' (now at 208
When using 64K pages with a separate cpio rootfs, U-Boot will align the rootfs
on a 4K page boundary. When the memory is reserved, and subsequent early
memblock_alloc is called, it will allocate memory between the 64K page alignment
and reserved memory. When the reserved memory is subsequently fre
On Fri, May 20, 2011 at 5:58 PM, Greg KH wrote:
> On Fri, May 20, 2011 at 04:22:25PM -0400, Josh Boyer wrote:
>> Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
>> however it uses a 64-bit instruction which is not valid on 32-bit
>> platforms. Use 'stw' instead.
>>
>> Repor
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