Hi Grant,
On 10/06/2010 06:52 PM, Grant Likely wrote:
> On Wed, Oct 6, 2010 at 3:53 AM, Heiko Schocher wrote:
So, the question is, is there a possibility to solve this problem?
If there is no standard option, what would be with adding a
"scan_phy" file in
/proc/devic
Fabian Bertholm wrote:
> Hi,
>
> I try to run ath9k on a P1020RDB Freescale board.
> I run into the problem similar to the Bug/Patch here:
> http://patchwork.ozlabs.org/patch/52137/
>
> I get irq 16: nobody cared
Firstly you should check if 'irq 16' is issue from your PCIe device.
>
> I tr
david.hag...@gmail.com wrote:
>> Scott Wood wrote:
>> I also meet machine check exception if configure LAW improperly for PCI.
>> (i.e.
>> unmatched PCIe controller id.)
>>
>> From you log looks 0xexxx should be your PCI space. So you can check
>> if that
>> fall into appropriate LAW configura
On Fri, 2010-10-08 at 17:22 +0800, tiejun.chen wrote:
>
> I think it should be allowed to use two LAWs to map different space for PCIe
> since I ever saw more one LAWs are created for different RAM space.
>
> Sorry for this delay response.
>
> -Tiejun
It's my bad, as I'd worked out the problem:
On Thu, Oct 07, 2010 at 12:07:16PM -0700, Victor Gallardo wrote:
>Add suspend/resume support for all 4xx compatible CPUs.
>See /sys/power/state for available power states configured in.
>
>Add two different idle states (idle-wait and idle-doze)
>controlled via sysfs. Default is idle-wait.
> c
On Thu, Oct 07, 2010 at 12:07:16PM -0700, Victor Gallardo wrote:
I hit send too soon on my earlier response. My apologies.
>--- /dev/null
>+++ b/arch/powerpc/sysdev/ppc4xx_cpm.c
>@@ -0,0 +1,339 @@
>+/*
>+ * PowerPC 4xx Clock and Power Management
>+ *
>+ * Copyright (C) 2010, Applied Micro Circui
arch/powerpc/platforms/built-in.o:(.toc1+0x18): undefined reference to
`__early_start'
This is due to the 85xx/smp.c not handling the 64-bit side properly. We
need to set the entry point for secondary cores on ppc64e to
generic_secondary_smp_init instead of __early_start that we due on ppc32.
S
Hello,
I noticed a compilation warning of RTC for powerpc. Found the fix existing
for MIPS & not for available for PowerPC.
--
"The Good You Do, The Best You GET"
Regards
Srikanth Krishnakar
**
From 8435e5876fc3d629406c63b85bff82c25fc4bf75 Mon Sep 17 00:00:00 2001
From: Srik
Ben,
This isn't critical, but it does fix having the ppc64e_defconfig
build cleanly.
- k
The following changes since commit 6b0cd00bc396daf5c2dcf17a8d82055335341f46:
Merge branch 'hwpoison-fixes' of
git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux-mce-2.6 (2010-10-07
13:59:32 -0700)
On Fri, Oct 08, 2010 at 10:50:50AM +0200, Holger brunck wrote:
> Hi Grant,
>
> On 10/06/2010 06:52 PM, Grant Likely wrote:
> > On Wed, Oct 6, 2010 at 3:53 AM, Heiko Schocher wrote:
> So, the question is, is there a possibility to solve this problem?
>
> If there is no standard opti
Hi,
The following series, which builds upon the series of cleanups I posted
on 9/15 as "ppc iommu cleanups", enables the pseries firmware feature
dynamic dma windows. This feature will allow future devices to have a
64-bit DMA mapping covering all memory, coexisting with a smaller IOMMU
window in
Also add a comment to dev_archdata, indicating that changes there need
to be verified against the driver code.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
arch/powerpc/include/asm/device.h |6 ++
drivers/macintosh/macio_asic.c|7 +++
2 files changed,
Replace the union with just the multiple fields, ifdef on CONFIG_PPC64.
Future pseries boxes will allow a 64 bit dma mapping covering all
memory, coexisting with a smaller iommu window in 32 bit pci space.
The cell fixed mapping would also like both to coexist.
Signed-off-by: Milton Miller
Sign
Also allow the coherent ops to be iommu if only the coherent mask is too
small, mostly for driver that do not set set the coherent mask but also
don't use the coherent api.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
arch/powerpc/include/asm/dma-mapping.h |2 +
arch/
The device tree root is never a pci bus, and will not have a
PCI_DN(pdn), so the check for PCI_DN added in
650f7b3b2f0ead0673e90452cf3dedde97c537ba makes the check for pdn->parent
redundant and it can be removed.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
arch/powerpc/p
The iommu_table pointer in the pci auxiliary struct of device_node has
not been used by the iommu ops since the dma refactor of
12d04eef927bf61328af2c7cbe756c96f98ac3bf, however this code still uses
it to find tables for dlpar. By only setting the PCI_DN iommu_table
pointer on nodes with dma window
The block in pci_dma_dev_setup_pSeriesLP for dma_window == NULL can be
removed because we will only teminate the loop if we had already allocated
a iommu table for that node or we found a window. While there may be
no window for the device, the intresting part is if we are reusing a
table or creat
The work done in pci_dma_bus_setup_pSeriesLP will be done in
pci_dma_dev_setup_pSeriesLP, and therefore we can remove the bus setup
function for lpar.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
arch/powerpc/platforms/pseries/iommu.c | 43 --
Add a function to get the maximum address that can be hotplug added.
This is needed to calculate the size of the tce table needed to cover
all memory in 1:1 mode.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
Comments on where to export?
---
arch/powerpc/include/asm/mmzone
If firmware allows us to map all of a partition's memory for DMA on a
particular bridge, create a 1:1 mapping of that memory. Add hooks for
dealing with hotplug events. Dyanmic DMA windows can use larger than the
default page size, and we use the largest one possible.
Signed-off-by: Milton Miller
iommu_table_setparms_lpar needs either the phb or the subbusnumber
(not both), pass the phb to make it similar to iommu_table_setparms.
Note: In cases where a caller was passing bus->number previously to
iommu_table_setparms_lpar() rather than phb->bus->number, this can lead
to a different value i
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
arch/powerpc/platforms/pseries/iommu.c | 98
1 files changed, 98 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
ind
Hi Josh,
On Fri, Oct 8, 2010 at 6:35 AM, Josh Boyer wrote:
> On Thu, Oct 07, 2010 at 12:07:16PM -0700, Victor Gallardo wrote:
>>Add suspend/resume support for all 4xx compatible CPUs.
>>See /sys/power/state for available power states configured in.
>>
>>Add two different idle states (idle-wait a
On Fri, Oct 8, 2010 at 6:46 AM, Josh Boyer wrote:
> On Thu, Oct 07, 2010 at 12:07:16PM -0700, Victor Gallardo wrote:
>
> I hit send too soon on my earlier response. My apologies.
>
>>--- /dev/null
>>+++ b/arch/powerpc/sysdev/ppc4xx_cpm.c
>>@@ -0,0 +1,339 @@
>>+/*
>>+ * PowerPC 4xx Clock and Power
Add 'fsl,qoriq-gpio' compatiable to the list we search for to bind
against for mpc8xxx_gpio. This compatiable will be used on P1-P5xxx
QorIQ devices like P4080.
Signed-off-by: Kumar Gala
---
arch/powerpc/sysdev/mpc8xxx_gpio.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --
Signed-off-by: Kumar Gala
---
arch/powerpc/sysdev/fsl_pci.c |8
include/linux/pci_ids.h |8
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 32012a2..4d0b249 100644
--- a/arch/powerp
From: Scott Wood
On an arch 2.06 hypervisor, a pending perfmon interrupt will be delivered
to the hypervisor at any point the guest is running, regardless of
MSR[EE]. In order to reflect this interrupt, the hypervisor has to mask
the interrupt in PMGC0 -- and set MSRP[PMMP] to intercept futher g
The P3041DS is in the same family of boards as the P4080DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
arch/powerpc/platforms/85xx/Kconfig| 12 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/p3041_ds.c | 64 +
arch/powerpc/kernel/paca.c: In function 'allocate_lppacas':
arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted
arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted
Signed-off-by: Kumar Gala
---
arch/powerpc/kernel/paca.c |2 +-
1 files changed, 1 insertions(+), 1 dele
arch/powerpc/platforms/built-in.o:(.toc1+0x18): undefined reference to
`__early_start'
This is due to the 85xx/smp.c not handling the 64-bit side properly. We
need to set the entry point for secondary cores on ppc64e to
generic_secondary_smp_init instead of __early_start that we due on ppc32.
S
The new e5500 core is similar to the e500mc core but adds 64-bit
support. We support running it in 32-bit mode as it is identical to the
e500mc.
Signed-off-by: Kumar Gala
---
arch/powerpc/include/asm/cache.h |2 +-
arch/powerpc/include/asm/reg_booke.h |3 ++-
arch/powerpc/
Update setup_page_sizes() to support for a MMU v1.0 FSL style MMU
implementation. In such a processor, we don't have TLB0PS or EPTCFG
registers (and access to these registers may cause exceptions). We need
to parse the older format of TLBnCFG for page size support. Additionaly,
assume since we a
On Freescale parts typically have TLB array for large mappings that we can
bolt the linear mapping into. We utilize the code that already exists
on PPC32 on the 64-bit side to setup the linear mapping to be cover by
bolted TLB entries. We utilize a quarter of the variable size TLB array
for this
The P5020DS is in the same family of boards as the P4080 DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
arch/powerpc/platforms/85xx/Kconfig| 12 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/p5020_ds.c | 69
The p5020 SoC from Freescale is the first 64-bit Book-E processor and
utilizes the two e5500 cores. Adding a defconfig that enables basic kernel
for e5500 based processors.
Also added the p5020 / e5500 support to the ppc64e defconfig.
Signed-off-by: Kumar Gala
---
arch/powerpc/configs/e55xx_sm
On Oct 8, 2010, at 2:06 PM, Kumar Gala wrote:
> Add 'fsl,qoriq-gpio' compatiable to the list we search for to bind
> against for mpc8xxx_gpio. This compatiable will be used on P1-P5xxx
> QorIQ devices like P4080.
>
> Signed-off-by: Kumar Gala
> ---
> arch/powerpc/sysdev/mpc8xxx_gpio.c |3 +
On Fri, Oct 8, 2010 at 2:06 PM, Kumar Gala wrote:
> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> index 32012a2..4d0b249 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -417,10 +417,18 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_D
On Oct 8, 2010, at 2:06 PM, Kumar Gala wrote:
> Signed-off-by: Kumar Gala
> ---
> arch/powerpc/sysdev/fsl_pci.c |8
> include/linux/pci_ids.h |8
> 2 files changed, 16 insertions(+), 0 deletions(-)
applied to next
- k
__
On Oct 8, 2010, at 2:28 PM, Timur Tabi wrote:
> On Fri, Oct 8, 2010 at 2:06 PM, Kumar Gala wrote:
>
>> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
>> index 32012a2..4d0b249 100644
>> --- a/arch/powerpc/sysdev/fsl_pci.c
>> +++ b/arch/powerpc/sysdev/fsl_pci.c
>> @@
Add suspend/resume support for 4xx compatible CPUs.
See /sys/power/state for available power states
configured in.
Add two different idle states (idle-wait and idle-doze)
controlled via sysfs. Default is idle-wait.
cat /sys/devices/system/cpu/cpu0/idle
[wait] doze
To save addition
- Add Clock Power Management (CPM) node to dts tree
- Add idle-doze entry in CPM node
- Add standby entry in CPM node
- Add PM and SUSPEND support by default in defconfig
- Remove UART2 and UART3 as they are unused, this will
allow CPM to put unused-units (UART2 and UART3) to sleep.
Signed-off-b
- Add Clock Power Management (CPM) node to dts tree
- Add idle-doze entry in CPM node
- Add standby entry in CPM node
- Add PM and SUSPEND support by default in defconfig
- Add NO_HZ and CONFIG_HIGH_RES_TIMERS support by
default in defconfig
Signed-off-by: Victor Gallardo
---
arch/powerpc/boot
On Fri, 8 Oct 2010 14:06:49 -0500
Kumar Gala wrote:
> diff --git a/arch/powerpc/platforms/Kconfig.cputype
> b/arch/powerpc/platforms/Kconfig.cputype
> index d361f81..19083b3 100644
> --- a/arch/powerpc/platforms/Kconfig.cputype
> +++ b/arch/powerpc/platforms/Kconfig.cputype
> @@ -132,13 +132,18
On Fri, 2010-10-08 at 11:04 -0500, Kumar Gala wrote:
> Ben,
>
> This isn't critical, but it does fix having the ppc64e_defconfig
> build cleanly.
BTW. Do you have a -next for me ? It's past time :-)
Cheers,
Ben.
> - k
>
> The following changes since commit 6b0cd00bc396daf5c2dcf17a8d82055335341
On Fri, 2010-10-08 at 10:33 -0700, Nishanth Aravamudan wrote:
> Replace the union with just the multiple fields, ifdef on CONFIG_PPC64.
>
> Future pseries boxes will allow a 64 bit dma mapping covering all
> memory, coexisting with a smaller iommu window in 32 bit pci space.
>
> The cell fixed ma
On Fri, 2010-10-08 at 10:33 -0700, Nishanth Aravamudan wrote:
> Also allow the coherent ops to be iommu if only the coherent mask is too
> small, mostly for driver that do not set set the coherent mask but also
> don't use the coherent api.
You are doing the transition at map_sg time which is a ho
On Fri, 2010-10-08 at 10:33 -0700, Nishanth Aravamudan wrote:
> Also allow the coherent ops to be iommu if only the coherent mask is too
> small, mostly for driver that do not set set the coherent mask but also
> don't use the coherent api.
You are doing the transition at map_sg time which is a ho
47 matches
Mail list logo
