On Tue, Aug 4, 2015 at 4:23 AM, Scott Wood
wrote:
On Mon, 2015-08-03 at 19:14 +0800, Chenhui Zhao wrote:
On Sat, Aug 1, 2015 at 8:45 AM, Scott Wood
wrote:
> On Fri, 2015-06-26 at 15:44 +0800,
Yuantian.Tang@freescale.comwrote:
> > +static void rcpm_v1_set_ip_power(bool enable, u32 *m
On Mon, 2015-08-03 at 19:14 +0800, Chenhui Zhao wrote:
> On Sat, Aug 1, 2015 at 8:45 AM, Scott Wood
> wrote:
> > On Fri, 2015-06-26 at 15:44 +0800, Yuantian.Tang@freescale.comwrote:
> > > +static void rcpm_v1_set_ip_power(bool enable, u32 *mask)
> > > +{
> > > + if (enable)
> > > +
On Sat, Aug 1, 2015 at 8:45 AM, Scott Wood
wrote:
On Fri, 2015-06-26 at 15:44 +0800, yuantian.t...@freescale.com wrote:
+static void rcpm_v1_set_ip_power(bool enable, u32 *mask)
+{
+ if (enable)
+ setbits32(&rcpm_v1_regs->ippdexpcr, *mask);
+ else
+ clrb
On Fri, 2015-06-26 at 15:44 +0800, yuantian.t...@freescale.com wrote:
> +static void rcpm_v1_set_ip_power(bool enable, u32 *mask)
> +{
> + if (enable)
> + setbits32(&rcpm_v1_regs->ippdexpcr, *mask);
> + else
> + clrbits32(&rcpm_v1_regs->ippdexpcr, *mask);
> +}
> +
>
From: Tang Yuantian
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.
The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.
S
