On 3/18/25 11:28 PM, Alex Williamson wrote:
On Tue, 18 Mar 2025 17:29:21 +
Shivaprasad G Bhat wrote:
On POWER systems, when the device is behind the io expander,
not all PCI slots would have the PCI_INTERRUPT_LINE connected.
The firmware assigns a valid PCI_INTERRUPT_PIN though. In such
.
The patch adds the additional check[1] if the irq is assigned
for the PIN which is done iff the LINE is connected.
[1]:
https://lore.kernel.org/qemu-devel/20250131150201.048aa3bf.alex.william...@redhat.com/
Signed-off-by: Shivaprasad G Bhat
Suggested-By: Alex Williamson
---
drivers/vfio/pci
eported-by: Vaishnavi Bhat
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index 534cd159e9ab..78b895b568b3 100644
--- a/arch/powerpc
eported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202407020357.hz8kqkkf-...@intel.com/
Fixes: b09c031d9433 ("powerpc/iommu: Move pSeries specific functions to
pseries/iommu.c")
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c |8
an the DMA window management changes mentioned above, the
patch also brings back the userspace view for the single level TCE
as it existed before commit 090bad39b237a ("powerpc/powernv: Add
indirect levels to it_userspace") along with the relavent
refactoring.
Signed-off-by: Shivaprasa
Move function dev_has_iommu_table() to powerpc/kernel/iommu.c
as it is going to be used by machine specific iommu code as
well in subsequent patches.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/iommu.h |6 ++
arch/powerpc/kernel/eeh.c| 16
PowerNV, this has no side effect as the TCE clear can be done
before the DMA window removal as well.
Signed-off-by: Shivaprasad G Bhat
---
drivers/vfio/vfio_iommu_spapr_tce.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
b
e.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index 97b9a4e6bf8a..d2ac6c19cf9b 100644
--- a/ar
parent nodes anyway.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c | 81 ++--
1 file changed, 67 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index
.
Only code movement, no functional changes intended.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/iommu.h |4 +
arch/powerpc/kernel/iommu.c| 149
arch/powerpc/platforms/pseries/iommu.c | 144
...@linux.ibm.com/
- Rewrite as to stop borrowing the DMA windows and implemented
the table_group_ops for pSeries.
- Cover letter and Patch 6 has more details as this was a rewrite.
Shivaprasad G Bhat (6):
powerpc/iommu: Move pSeries specific functions to pseries/iommu.c
powerpc/pseries
an the DMA window management changes mentioned above, the
patch also brings back the userspace view for the single level TCE
as it existed before commit 090bad39b237a ("powerpc/powernv: Add
indirect levels to it_userspace") along with the relavent
refactoring.
Signed-off-by: Shivaprasa
Move function dev_has_iommu_table() to powerpc/kernel/iommu.c
as it is going to be used by machine specific iommu code as
well in subsequent patches.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/iommu.h |1 +
arch/powerpc/kernel/eeh.c| 16
arch
PowerNV, this has no side effect as the TCE clear can be done
before the DMA window removal as well.
Signed-off-by: Shivaprasad G Bhat
---
drivers/vfio/vfio_iommu_spapr_tce.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
b
e.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index eebb8296d431..cffa64cf60e7 100644
--- a/ar
parent nodes anyway.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c | 81 ++--
1 file changed, 67 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index
The PowerNV specific table_group_ops are defined in powernv/pci-ioda.c.
The pSeries specific table_group_ops are sitting in the generic powerpc
file. Move it to where it actually belong(pseries/iommu.c).
Only code movement, no functional changes intended.
Signed-off-by: Shivaprasad G Bhat
pSeries.
- Cover letter and Patch 6 has more details as this was a rewrite.
Shivaprasad G Bhat (6):
powerpc/iommu: Move pSeries specific functions to pseries/iommu.c
powerpc/pseries/iommu: Fix the VFIO_IOMMU_SPAPR_TCE_GET_INFO ioctl output
powerpc/pseries/iommu: Use the iommu
The patch adds a one-reg register identifier which can be used to
read and set the DEXCR for the guest during enter/exit with
KVM_REG_PPC_DEXCR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
Documentation/virt/kvm/api.rst
On 6/4/24 11:37, Nicholas Piggin wrote:
On Mon Jun 3, 2024 at 9:15 PM AEST, Shivaprasad G Bhat wrote:
The patch adds a one-reg register identifier which can be used to
read and set the virtual HASHKEYR for the guest during enter/exit
with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API
The nestedv2 APIs has the guest state element defined for HASHPKEYR
for the save-restore with L0. However, its ignored in the code.
The patch takes care of this for the HASHPKEYR GSID.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/kvm/book3s_hv_nestedv2.c |6 ++
1 file changed, 6
The patch adds a one-reg register identifier which can be used to
read and set the virtual HASHPKEYR for the guest during enter/exit
with KVM_REG_PPC_HASHPKEYR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat
---
Documentation/virt/kvm/api.rst |1
The nestedv2 APIs has the guest state element defined for HASHKEYR for
the save-restore with L0. However, its ignored in the code.
The patch takes care of this for the HASHKEYR GSID.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
arch/powerpc/kvm/book3s_hv_nestedv2.c
The patch adds a one-reg register identifier which can be used to
read and set the virtual HASHKEYR for the guest during enter/exit
with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
Documentation
The nestedv2 APIs has the guest state element defined for DEXCR
for the save-restore with L0. However, its ignored in the code.
The patch takes care of this for the DEXCR GSID.
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
arch/powerpc/kvm/book3s_hv_nestedv2.c |6
ned-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
arch/powerpc/kvm/book3s_hv.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index a4f34f94c86f..b576781d58d5 100644
--- a/arch/powerpc/kvm/book3s_hv.c
The kvmppc_set_one_reg_hv() wrongly get() the value
instead of set() for MMCR3. Fix the same.
Fixes: 5752fe0b811b ("KVM: PPC: Book3S HV: Save/restore new PMU registers")
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
arch/powerpc/kvm/book3s_hv.c |2 +-
1 file
patches in a way to introduce the SPRs first as
suggested.
- Added Reviewed-bys to the reviewed ones.
- Added 2 more patches to handle the hashpkeyr state
Shivaprasad G Bhat (8):
KVM: PPC: Book3S HV: Fix the set_one_reg for MMCR3
KVM: PPC: Book3S HV: Fix the get_one_reg of SDAR
The patch adds a one-reg register identifier which can be used to
read and set the virtual HASHKEYR for the guest during enter/exit
with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat
---
Documentation/virt/kvm/api.rst
The nestedv2 APIs has the guest state element defined for HASHKEYR for
the save-restore with L0. However, its ignored in the code.
The patch takes care of this for the HASHKEYR GSID.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm
The patch adds a one-reg register identifier which can be used to
read and set the DEXCR for the guest during enter/exit with
KVM_REG_PPC_DEXCR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat
---
Documentation/virt/kvm/api.rst|1 +
arch
The nestedv2 APIs has the guest state element defined for DEXCR
for the save-restore with L0. However, its ignored in the code.
The patch takes care of this for the DEXCR GSID.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm/book3s_hv.h
ned-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
arch/powerpc/kvm/book3s_hv.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index a4f34f94c86f..b576781d58d5 100644
--- a/arch/powerpc/kvm/book3s_hv.c
The kvmppc_set_one_reg_hv() wrongly get() the value
instead of set() for MMCR3. Fix the same.
Fixes: 5752fe0b811b ("KVM: PPC: Book3S HV: Save/restore new PMU registers")
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
arch/powerpc/kvm/book3s_hv.c |2 +-
1 file
-tests/kvm-unit-tests
---
Shivaprasad G Bhat (6):
KVM: PPC: Book3S HV: Fix the set_one_reg for MMCR3
KVM: PPC: Book3S HV: Fix the get_one_reg of SDAR
KVM: PPC: Book3S HV nestedv2: Keep nested guest DEXCR in sync
KVM: PPC: Book3S HV: Add one-reg interface for DEXCR register
Hi Jason,
On 5/6/24 23:13, Jason Gunthorpe wrote:
On Sat, May 04, 2024 at 12:33:53AM +0530, Shivaprasad G Bhat wrote:
We have legacy workloads using VFIO in userspace/kvm guests running
on downstream distro kernels. We want these workloads to be able to
continue running on our arch.
It has
On 5/2/24 06:59, Alexey Kardashevskiy wrote:
On 2/5/24 00:09, Jason Gunthorpe wrote:
On Tue, Apr 30, 2024 at 03:05:34PM -0500, Shivaprasad G Bhat wrote:
RFC v1 was posted here [1]. As I was testing more and fixing the
issues, I realized its clean to have the table_group_ops implemented
the
er than the DMA window management changes mentioned above, the
patch also brings back the userspace view for the single level TCE
as it existed before commit 090bad39b237a ("powerpc/powernv: Add
indirect levels to it_userspace") along with the relavent
refactoring.
Signed-off-by: Shivaprasa
PowerNV, this has no side effect as the TCE clear can be done
before the DMA window removal as well.
Signed-off-by: Shivaprasad G Bhat
---
drivers/vfio/vfio_iommu_spapr_tce.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
b
Move function dev_has_iommu_table() to powerpc/kernel/iommu.c
as it is going to be used by machine specific iommu code as
well in subsequent patches.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/iommu.h |1 +
arch/powerpc/kernel/eeh.c| 16
arch
e.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index 5b68a4918d63..e701255560a6 100644
--- a/ar
parent nodes anyway.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c | 81 ++--
1 file changed, 67 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index
The PowerNV specific table_group_ops are defined in powernv/pci-ioda.c.
The pSeries specific table_group_ops are sitting in the generic powerpc
file. Move it to where it actually belong(pseries/iommu.c).
Only code movement, no functional changes intended.
Signed-off-by: Shivaprasad G Bhat
fio-ppc-ex
---
Changelog:
v1:
https://lore.kernel.org/linuxppc-dev/171026724548.8367.8321359354119254395.st...@linux.ibm.com/
- Rewrite as to stop borrowing the DMA windows and implemented
the table_group_ops for pSeries.
- Cover letter and Patch 6 has more details as this was a rewrite.
Shivaprasad
Hi Michael,
On 3/13/24 18:23, Michael Ellerman wrote:
Hi Shivaprasad,
Shivaprasad G Bhat writes:
The commit 9d67c9433509 ("powerpc/iommu: Add \"borrowing\"
iommu_table_group_ops") implemented the "borrow" mechanism for
the pSeries SPAPR TCE. It did implement
Hi Jason,
On 3/19/24 20:02, Jason Gunthorpe wrote:
On Tue, Mar 12, 2024 at 01:14:20PM -0500, Shivaprasad G Bhat wrote:
The commit 090bad39b237a ("powerpc/powernv: Add indirect levels to
it_userspace") which implemented the tce indirect levels
support for PowerNV ended up removing
n enable_ddw() if the user had
created/modified the DDW. As there is preference for DIRECT mapping
on the host driver side, the user created window is removed.
The changes work only for the non-SRIOV-VF scenarios for PEs having
2 DMA windows.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/in
The PowerNV specific table_group_ops are defined in powernv/pci-ioda.c.
The pSeries specific table_group_ops are sitting in the generic powerpc
file. Move it to where it actually belong(pseries/iommu.c).
Only code movement, no functional changes intended.
Signed-off-by: Shivaprasad G Bhat
or the tce release call paths
as the table is not really freed. So, decoupling the userspace view
array free and alloc from table's it_ops just the way it was before.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/platforms/pseries/iommu.c | 19 ++--
drivers/vfio/vfio
Commit: 090bad39b237 ("powerpc/powernv: Add indirect levels to
it_userspace")
[2] Commit: 9d67c9433509 ("powerpc/iommu: Add \"borrowing\"
iommu_table_group_ops")
[3] https://github.com/awilliam/tests
[4] https://github.com/nnmwebmin/vfio-ppc-tests/tree/vfio-ppc-ex
---
On 2/15/24 08:01, Michael Ellerman wrote:
Shivaprasad G Bhat writes:
The function spapr_tce_platform_iommu_attach_dev() is missing to call
iommu_group_put() when the domain is already set. This refcount leak
shows up with BUG_ON() during DLPAR remove operation as,
[c013aed5fd10
The patch makes the iommu_group_get() call only when using it
thereby avoiding the unnecessary get & put for domain already
being set case.
Reviewed-by: Jason Gunthorpe
Signed-off-by: Shivaprasad G Bhat
---
Changelog:
v2:
https://lore.kernel.org/linux-i
On 2/14/24 18:28, Jason Gunthorpe wrote:
On Wed, Feb 14, 2024 at 11:53:20PM +1100, Michael Ellerman wrote:
Venkat Rao Bagalkote writes:
Thanks for the patch. Applied this patch and verified and issue is fixed.
This issue way originally reported in the below mail.
https://marc.info/?l=linux
-475e-94e6-8427e88e2...@linux.vnet.ibm.com
Signed-off-by: Shivaprasad G Bhat
---
Changelog:
v1:
https://lore.kernel.org/all/170784021983.6249.10039296655906636112.st...@linux.ibm.com/
- Minor refactor to call the iommu_group_get() only if required.
- Updated the title, description and signature(Closes/
00 ]---
The patch adds the missing iommu_group_put() call.
Fixes: a8ca9fc9134c ("powerpc/iommu: Do not do platform domain attach atctions
after probe")
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/kernel/iommu.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
On 1/26/24 02:46, Christophe Leroy wrote:
Le 18/04/2022 à 06:38, Shivaprasad G Bhat a écrit :
papr_scm and ndtest share common PDSM payload structs like
nd_papr_pdsm_health. Presently these structs are duplicated across
papr_pdsm.h and ndtest.h header files. Since 'ndtest' is essent
them to a header file which
can be shared across ndtest and papr_scm via newly introduced
include/linux/papr_scm.h.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
Suggested-by: "Aneesh Kumar K.V"
---
Changelog:
Repost of v3:
Link:
https:/
On 1/25/24 21:22, Jason Gunthorpe wrote:
On Thu, Jan 25, 2024 at 06:08:52AM -0600, Shivaprasad G Bhat wrote:
On PPC64, the iommu_ops.def_domain_type() is not defined and
CONFIG_IOMMU_DMA not enabled. With commit 0f6a90436a57 ("iommu: Do not
use IOMMU_DOMAIN_DMA if CONFIG_IOMMU_DMA i
On 1/25/24 21:20, Jason Gunthorpe wrote:
On Thu, Jan 25, 2024 at 06:08:39AM -0600, Shivaprasad G Bhat wrote:
The commit 2ad56efa80db ("powerpc/iommu: Setup a default domain and
[snip]
+ /*
+* The domain being set to PLATFORM from ea
able_group release_ownership()
call when switching back to PLATFORM domain from BLOCKED, while
also separates the domain_ops for both.
Fixes: 2ad56efa80db ("powerpc/iommu: Setup a default domain and remove
set_platform_dma_ops")
Signed-off-by: Shivaprasad G Bhat
---
Changelog:
v1:
https://l
t_domain() to not error out if the requested
type is same as default domain type.
Fixes: 2ad56efa80db ("powerpc/iommu: Setup a default domain and remove
set_platform_dma_ops")
Fixes: 0f6a90436a57 ("iommu: Do not use IOMMU_DOMAIN_DMA if CONFIG_IOMMU_DMA is
not enabled")
Sign
able_group release_ownership()
call when switching back to PLATFORM domain.
Fixes: 2ad56efa80db ("powerpc/iommu: Setup a default domain and remove
set_platform_dma_ops")
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/kernel/iommu.c | 16 +---
1 file changed, 13 insert
Details of the same are in the following patch descriptions.
---
Shivaprasad G Bhat (2):
powerpc: iommu: Bring back table group release_ownership() call
iommu: Fix the domain type checks when default_domain is set
arch/powerpc/kernel/iommu.c | 16 +---
drivers/iomm
;
| ^~~~
| ndtest_blk_mmio
The current patch removes the specific code to cleanup all obsolete
references.
Signed-off-by: Shivaprasad G Bhat
---
Changelog:
Repost of v1:
Link -
https://patchwork.kernel.org/project/linux-nvdimm/patch/165025395730.2821159.14794984437851867426
ised.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
---
Changelog:
Since v2:
Link:
https://patchwork.kernel.org/project/linux-nvdimm/patch/163454437514.431245.15482985237822269917.st...@lep8c.aus.stglabs.ibm.com/
* Made it like v1 which had the patches based on the moved header files.
So
file to take care of that.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
---
tools/testing/nvdimm/test/Kbuild |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/testing/nvdimm/test/Kbuild b/tools/testing/nvdimm/test/Kbuild
index 197bcb2b7f35
them to a header file which can be shared
across ndtest and papr_scm via newly introduced include/linux/papr_scm.h.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
Suggested-by: "Aneesh Kumar K.V"
---
Changelog:
Since v2:
Link:
https://patchwork.kernel.org/projec
;
| ^~~~
| ndtest_blk_mmio
The current patch removes the specific code to cleanup all obsolete
references.
Signed-off-by: Shivaprasad G Bhat
---
tools/testing/nvdimm/test/ndtest.c | 77
1 file changed, 77 deletions(-)
diff --git a
them to a header file which can be shared
across ndtest and papr_scm via newly introduced include/linux/papr_scm.h.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
Suggested-by: "Aneesh Kumar K.V"
---
Changelog:
Since v1:
Link:
https://patchwork.kernel.org/projec
ised.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
---
Changelog:
Since v1:
Link: https://patchwork.kernel.org/project/linux-nvdimm/list/?series=521767
* Removed the dependency on a header movement patch
tools/testing/nvdimm/test/ndtest.c | 148
tools
RT_INJECT', papr_pdsm_smart_inject()
constructs a pair or 'mask' and 'override' bitmaps from the payload
and bit-blt it to the 'health_bitmap_{mask, override}' members. This
ensures the after being fetched from the hypervisor, the health_bitmap
reflects requested sma
them to a header file which can be shared across ndtest and papr_scm via newly
introduced include/linux/papr_scm.h.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
Suggested-by: "Aneesh Kumar K.V"
---
Changelog:
Since v1:
Link:
https://patchwork.kernel.org/projec
ised.
Signed-off-by: Shivaprasad G Bhat
Signed-off-by: Vaibhav Jain
---
Changelog:
Since v1:
Link: https://patchwork.kernel.org/project/linux-nvdimm/list/?series=521767
* Removed the dependency on a header movement patch
tools/testing/nvdimm/test/ndtest.c | 148
RT_INJECT', papr_pdsm_smart_inject()
constructs a pair or 'mask' and 'override' bitmaps from the payload
and bit-blt it to the 'health_bitmap_{mask, override}' members. This
ensures the after being fetched from the hypervisor, the health_bitmap
reflects requested sma
ised.
Signed-off-by: Shivaprasad G Bhat
---
The patch depends on the PAPR PDSM smart-inject payload definitions
added with the patch -
https://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg191337.html
tools/testing/nvdimm/test/ndtest.c | 149
tools/testing/
and ndtest
which are not exported to the user space. So, move them to a header
file which can be shared across ndtest and papr_scm via newly
introduced include/linux/papr_scm.h.
Signed-off-by: Shivaprasad G Bhat
Suggested-by: "Aneesh Kumar K.V"
---
M
ent nvdimm H_SCM_HEALTH call.
This patch prevents mmap of namespaces with MAP_SYNC flag if the
nvdimm requires an explicit flush[1].
References:
[1]
https://github.com/avocado-framework-tests/avocado-misc-tests/blob/master/memory/ndctl.py.data/map_sync.c
Signed-off-by: Shivaprasad G Bhat
---
quent dimm health request call.
This patch prevents mmap of namespaces with MAP_SYNC flag if the
nvdimm requires explicit flush[1].
References:
[1]
https://github.com/avocado-framework-tests/avocado-misc-tests/blob/master/memory/ndctl.py.data/map_sync.c
Signed-off-by: Shivaprasad G Bhat
---
Hi David,
Sorry about the delay.
On 2/8/21 11:51 AM, David Gibson wrote:
On Tue, Jan 19, 2021 at 12:40:31PM +0530, Shivaprasad G Bhat wrote:
Thanks for the comments!
On 12/28/20 2:08 PM, David Gibson wrote:
On Mon, Dec 21, 2020 at 01:08:53PM +0100, Greg Kurz wrote:
...
The overall idea
Thanks for the comments!
On 12/28/20 2:08 PM, David Gibson wrote:
On Mon, Dec 21, 2020 at 01:08:53PM +0100, Greg Kurz wrote:
...
The overall idea looks good but I think you should consider using
a thread pool to implement it. See below.
I am not convinced, however. Specifically, attaching
/dev/pmem1 on /mnt2 type xfs
(rw,relatime,attr2,dax=always,inode64,logbufs=8,logbsize=32k,noquota)
#./mapsync /mnt1/newfile> Without async-flush-required
#./mapsync /mnt2/newfile> With async-flush-required
Failed to mmap with Operation not supported
Signed-off-by: Shivaprasad
enables explicit asynchronous
flush requests from guest. It can be disabled by setting syn-dax=on.
Signed-off-by: Shivaprasad G Bhat
---
hw/mem/nvdimm.c |1 +
hw/ppc/spapr_nvdimm.c | 79 +++
include/hw/mem/nvdimm.h | 10 ++
include/hw
The patch adds support for async hcalls at the DRC level for the
spapr devices. To be used by spapr-scm devices in the patch/es to follow.
Signed-off-by: Shivaprasad G Bhat
---
hw/ppc/spapr_drc.c | 149
include/hw/ppc/spapr_drc.h | 25
30.html
Changes from v1
- Fixed a missed-out unlock
- using QLIST_FOREACH instead of QLIST_FOREACH_SAFE while generating token
Shivaprasad G Bhat (2):
spapr: drc: Add support for async hcalls at the drc level
spapr: nvdimm: Implement async flush hcalls
hw/mem/nvdimm.c
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