[Resending after bogofilter adjustment on vger.kernel.org]
On Mon, Aug 03, 2015 at 09:44:01AM +0300, Igal.Liberman wrote:
> + xmdio0: mdio@f1000{
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,fman-xmdio";
> + reg = <0xf1
On Tue, Aug 4, 2015 at 4:23 AM, Scott Wood
wrote:
On Mon, 2015-08-03 at 19:14 +0800, Chenhui Zhao wrote:
On Sat, Aug 1, 2015 at 8:45 AM, Scott Wood
wrote:
> On Fri, 2015-06-26 at 15:44 +0800,
Yuantian.Tang@freescale.comwrote:
> > +static void rcpm_v1_set_ip_power(bool enable, u32 *m
On Mon, Aug 03, 2015 at 09:44:01AM +0300, Igal.Liberman wrote:
> + xmdio0: mdio@f1000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,fman-xmdio";
> + reg = <0xf1000 0x1000>;
> + interrupts = <101 1 0 0>;
> +
On Fri, 2015-07-31 at 11:29 +0200, Laurent Dufour wrote:
> This patch fixes several endianness issues detected when running the HVSI
> driver in little endian mode.
>
> These issues are raised in little endian mode because the data exchanged in
> memory between the kernel and the hypervisor has to
On Mon, 2015-08-03 at 16:35 +0800, Zhao Qiang wrote:
>
> @@ -73,6 +74,13 @@ struct gen_pool_chunk {
> unsigned long bits[0]; /* bitmap for allocating memory chunk */
> };
>
> +/*
> + * General purpose special memory pool data descriptor.
> + */
It's not "general purpose". It's
On 03.08.2015 18:21, Mark Brown wrote:
> On Mon, Aug 03, 2015 at 12:44:11AM +0200, Maciej S. Szmigiero wrote:
>> Adjust set DAI format function in fsl_ssi driver
>> so it doesn't fail and clears RXDIR in AC'97 mode.
>>
>> Changes from v1: fix indentation to be consistent with rest
>> of the driver.
On Mon, 2015-08-03 at 20:01 +0800, Chenhui Zhao wrote:
> On Sat, Aug 1, 2015 at 8:41 AM, Scott Wood
> wrote:
> > On Fri, 2015-07-31 at 20:53 +0800, Chenhui Zhao wrote:
> > > In the last stage of deep sleep, software will trigger a Finite
> > > State Machine (FSM) to control the hardware precedu
[Added linuxppc-dev@lists.ozlabs.org. Besides that list being required for
review of PPC patches, it feeds the patchwork that I use to track and apply
patches.]
On Mon, 2015-08-03 at 19:52 +0800, Chenhui Zhao wrote:
> On Sat, Aug 1, 2015 at 8:14 AM, Scott Wood
> wrote:
> > On Fri, 2015-07-31
On Mon, 2015-08-03 at 19:14 +0800, Chenhui Zhao wrote:
> On Sat, Aug 1, 2015 at 8:45 AM, Scott Wood
> wrote:
> > On Fri, 2015-06-26 at 15:44 +0800, Yuantian.Tang@freescale.comwrote:
> > > +static void rcpm_v1_set_ip_power(bool enable, u32 *mask)
> > > +{
> > > + if (enable)
> > > +
On Mon, Aug 03, 2015 at 12:44:11AM +0200, Maciej S. Szmigiero wrote:
> Adjust set DAI format function in fsl_ssi driver
> so it doesn't fail and clears RXDIR in AC'97 mode.
>
> Changes from v1: fix indentation to be consistent with rest
> of the driver.
Inter version changelogs go after the --- a
From: Igal Liberman
Describe the PHY topology for all configurations supported by each board
Based on prior work by Andy Fleming
Signed-off-by: Shruti Kanetkar
Signed-off-by: Emil Medve
Signed-off-by: Igal Liberman
---
Depends on the following patch set:
https://patchwork.ozlabs.or
On Sat, Aug 1, 2015 at 8:41 AM, Scott Wood
wrote:
On Fri, 2015-07-31 at 20:53 +0800, Chenhui Zhao wrote:
In the last stage of deep sleep, software will trigger a Finite
State Machine (FSM) to control the hardware precedure, such as
board isolation, killing PLLs, removing power, and so on.
From: Laurent Dufour
> Sent: 31 July 2015 10:30
> This patch fixes several endianness issues detected when running the HVSI
> driver in little endian mode.
>
> These issues are raised in little endian mode because the data exchanged in
> memory between the kernel and the hypervisor has to be in bi
On Sat, Aug 1, 2015 at 8:45 AM, Scott Wood
wrote:
On Fri, 2015-06-26 at 15:44 +0800, yuantian.t...@freescale.com wrote:
+static void rcpm_v1_set_ip_power(bool enable, u32 *mask)
+{
+ if (enable)
+ setbits32(&rcpm_v1_regs->ippdexpcr, *mask);
+ else
+ clrb
On Sat, Aug 1, 2015 at 10:57 AM, Scott Wood
wrote:
On Fri, 2015-07-24 at 20:46 +0800, Chenhui Zhao wrote:
+static void mpc85xx_pmc_set_wake(struct device *dev, void *enable)
{
int ret;
+ u32 value[2];
+
+ if (!device_may_wakeup(dev))
+ return;
+
+ if (
From: Igal Liberman
Based on prior work by Andy Fleming
Signed-off-by: Shruti Kanetkar
Signed-off-by: Emil Medve
Signed-off-by: Igal Liberman
---
v2 ---> v3:
- Removed P1023 support
v1 ---> v2:
- Added T1024 support
arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi |9 ++-
Bytes alignment is required to manage some special RAM,
so add gen_pool_first_fit_align to genalloc,
meanwhile add gen_pool_alloc_data to pass data to
gen_pool_first_fit_align(modify gen_pool_alloc as a wrapper)
Signed-off-by: Zhao Qiang
---
*v2:
changes:
title has been modified, original patch l
On Fri, Jul 31, 2015 at 11:16 AM, Uwe Kleine-König
wrote:
> While the handling of fsl,pq3-gpio and fsl,mpc8572-gpio is done in the
> same driver and the two hardly differ, the latter controller needs a
> workaround for an erratum in the gpio_get callback. To make this
> difference more explicit r
Regards,
Igal Liberman.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, July 30, 2015 11:12 PM
> To: Liberman Igal-B31950
> Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Bucur
> Madalin-Cristian-B32716; linux-ker...@vger.kernel.org
> Subject: Re: [PATCH
Adds cpumask attribute to be used by each nest pmu since nest
units are per-chip. Only one cpu (first online cpu) from each chip
is designated to read counters.
On cpu hotplug, dying cpu is checked to see whether it is one of the
designated cpus, if yes, next online cpu from the same chip is
desig
Create a file "nest-pmu.c" to contain nest pmu related functions. Code
to detect nest pmu support and parser to collect per-chip reserved memory
region information from device tree (DT).
Detection mechanism is to look for specific property "ibm,ima-chip" in DT.
For Nest pmu, device tree will have
Parse device tree to detect supported nest pmu units. Traverse
through each nest pmu unit folder to find supported events and
corresponding unit/scale files (if any).
The nest unit event file from Device Tree will contain the offset in the
reserved memory region to get the counter data for a given
Add set of generic nest pmu related event functions to be used by
each nest pmu. Add code to register nest pmus.
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Anton Blanchard
Cc: Sukadev Bhattiprolu
Cc: Daniel Axtens
Cc: Stephane Eranian
Signed-off-by: Madhavan Srin
Regards,
Igal Liberman.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, July 30, 2015 11:00 PM
> To: Liberman Igal-B31950
> Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Bucur
> Madalin-Cristian-B32716; linux-ker...@vger.kernel.org
> Subject: Re: [PATCH
Create new header file "nest-pmu.h" to add the data structures
and macros needed for the nest pmu support.
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Anton Blanchard
Cc: Sukadev Bhattiprolu
Cc: Daniel Axtens
Cc: Stephane Eranian
Signed-off-by: Madhavan Srinivasan
Add code to create event/format attributes and attribute groups for
each nest pmu.
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Anton Blanchard
Cc: Sukadev Bhattiprolu
Cc: Daniel Axtens
Cc: Stephane Eranian
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf
Nest Counters can be configured via PORE Engine and OPAL
provides an interface to start/stop it.
OPAL side patches are posted in the skiboot mailing.
Cc: Stewart Smith
Cc: Jeremy Kerr
Cc: Benjamin Herrenschmidt
Cc: Michael Ellerman
Cc: Paul Mackerras
Cc: Anton Blanchard
Cc: Sukadev Bhattipr
This patchset enables Nest Instrumentation support on powerpc.
POWER8 has per-chip Nest Intrumentation which provides various
per-chip metrics like memory, powerbus, Xlink and Alink
bandwidth.
Nest Instrumentation provides an interface (via PORE Engine)
to configure and move the nest counter data
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