This change adds an initial IPMI driver for powerpc OPAL firmware. The
interface is exposed entirely through firmware: we have two functions to
send and receive IPMI messages, and an interrupt notification from the
firmware to signify that a message is available.
Signed-off-by: Jeremy Kerr
---
v
Hi Corey,
>>> Alternatively, they could be merged by one maintainer, pending an ack
>>> from the other.
>>
>> I'm fine either way.
>
> How about the third option? :)
>
> I've put patch 1 in a topic branch:
>
>
> https://git.kernel.org/cgit/linux/kernel/git/mpe/linux.git/log/?h=topic/opal-ipm
Hi Shreyas,
On 11/03/2014 09:38 PM, Shreyas B. Prabhu wrote:
> diff --git a/arch/powerpc/kernel/idle_power7.S
> b/arch/powerpc/kernel/idle_power7.S
> index 283c603..df11acb 100644
> --- a/arch/powerpc/kernel/idle_power7.S
> +++ b/arch/powerpc/kernel/idle_power7.S
> _GLOBAL(power7_idle)
> /
On Mon, 2014-11-10 at 11:35 +0530, Neelesh Gupta wrote:
> The patch exposes the available i2c busses on the PowerNV platform
> to the kernel and implements the bus driver to support i2c and
> smbus commands.
> The driver uses the platform device infrastructure to probe the busses
> on the platform
On Thu, 2014-11-06 at 08:15 -0600, Corey Minyard wrote:
> On 11/05/2014 09:38 PM, Jeremy Kerr wrote:
> > Corey & Michael: if this is acceptable, it may be mergable as two
> > separate patches - one for the IPMI subsystem, one for the powernv
> > platform. However, we'd need to preserve their order
If OPAL requests it, call it back via opal_poll_events() at a
regular interval. Some versions of OPAL on some machines require
this to operate some internal timeouts properly.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/opal.c | 64 ++-
We have a historical hack that treats missing ranges properties as the
equivalent of an empty one. This is needed for ancient PowerMac "bad"
device-trees, and shouldn't be enabled for any other PowerPC platform,
otherwise we get some nasty layout of devices in sysfs or even
duplication when a set o
Michael Neuling writes:
> On Sun, 2014-11-02 at 20:02 +0530, Aneesh Kumar K.V wrote:
>> Runtime disable transactional memory feature looking at pa-features
>> device tree entry. We need to do this so that we can run a kernel
>> built with TM config in PR mode.
>
> I'm happy to turn this off but
On Tue, Nov 11, 2014 at 9:06 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2014-11-12 at 13:23 +1100, Michael Ellerman wrote:
>> On Tue, 2014-11-11 at 14:12 -0700, Bjorn Helgaas wrote:
>> > On Thu, Oct 16, 2014 at 09:55:32AM +1100, Benjamin Herrenschmidt wrote:
>> > > On Wed, 2014-10-15 at 16:19 -06
On Wed, 2014-11-12 at 13:23 +1100, Michael Ellerman wrote:
> On Tue, 2014-11-11 at 14:12 -0700, Bjorn Helgaas wrote:
> > On Thu, Oct 16, 2014 at 09:55:32AM +1100, Benjamin Herrenschmidt wrote:
> > > On Wed, 2014-10-15 at 16:19 -0600, Bjorn Helgaas wrote:
> > > > PCI/MSI: Add device flag indicatin
On 12 November 2014 00:39, Scott Wood wrote:
> What purpose do those " CPU frequency scaling drivers" submenus
> serve, versus just including the options in the main cpufreq menu? It's
> not as if more than one arch would be visible at once (and when a
> situation with multiple visible menus popp
ls1 has qe and ls1 has arm cpu.
move qe from arch/powerpc to drivers/soc/fsl
to adapt to powerpc and arm
Signed-off-by: Zhao Qiang
---
Changes for v2:
- move code to driver/soc
Changes for v3:
- change drivers/soc/qe to drivers/soc/fsl-qe
Changes for v4:
- move drivers/soc
Nested if statements are always bad and the patch avoids one by
checking PHB type and bail in advance if necessary.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 32 ---
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/arch/p
Commit 262af55 ("powerpc/powernv: Enable M64 aperatus for PHB3")
introduced compound PEs in order to support M64 aperatus on PHB3.
However, we never configured PELTV for compound PEs. The patch
fixes that by: parent PE can freeze all child compound PEs. Any
compound PE affects the group.
Signed-of
The patch initializes PE instance when reserving PE number to
keep consistent things as we did before. Also, it replaces the
iteration on bridge's windows with the prefered way.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 27 +--
1 file chang
The patch checks PHB type a bit early to save a bit cycles
for P7 because we don't support M64 for P7IOC no matter what
OPAL firmware we have.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/
When freezing compound PEs in pnv_ioda_freeze_pe(), we should bail
upon illegal master PE. We needn't freeze slave PE because it should
have been put into frozen state by hardware.
Reported-by: Anton Blanchard
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 4 +++-
1 f
The patch renames alloc_m64_pe() to reserve_m64_pe() to reflect
its real usage: We reserve PE numbers for M64 segments in advance
and then pick up the reserved PE numbers when building the mapping
between PE numbers and M64 segments.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/p
If there're no PHBs under P5IOC2 HUB device tree node, we should
bail early to avoid zero devisor and allocating TCE tables.
Reported-by: Anton Blanchard
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-p5ioc2.c | 28
1 file changed, 16 insertions(+)
The M64 resource should be removed if we don't have hook to
initialize it, or (not and) fail to do that.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/ar
The patchset cleans up PowerNV PCI code. Also, the compound PEs are
affected to each other with help of PELTV, which was missed from
commit 262af557 ("powerpc/powernv: Enable M64 aperatus for PHB3").
Gavin Shan (8):
powerpc/powernv: Check PHB type in advance
powerpc/powernv: Fix condition to r
PAGE_FACTOR was defined to reflect the difference between configured
page size and fixed 4KB page size. Replace (PAGE_SHIFT - HW_PAGE_SHIFT)
with PAGE_FACTOR.
Signed-off-by: Gavin Shan
---
arch/powerpc/mm/hash_low_64.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/
On Tue, 2014-11-11 at 14:12 -0700, Bjorn Helgaas wrote:
> On Thu, Oct 16, 2014 at 09:55:32AM +1100, Benjamin Herrenschmidt wrote:
> > On Wed, 2014-10-15 at 16:19 -0600, Bjorn Helgaas wrote:
> > > PCI/MSI: Add device flag indicating that 64-bit MSIs don't work
>
> I'm still assuming you're going
On Sun, 2014-11-02 at 20:02 +0530, Aneesh Kumar K.V wrote:
> Runtime disable transactional memory feature looking at pa-features
> device tree entry. We need to do this so that we can run a kernel
> built with TM config in PR mode.
I'm happy to turn this off but why do we need to do this in PR mo
> >
> > The TBI implements transmit/receive portions of PCS, it's not used in
> > Linux. The PCS on Fman V3 are not just for SGMII, it has more
> > implementations, it's used in Linux.
It is used for PHY less mode(aka fixed PHY) and needs to be exposed to
linux so it is possible to select SGMII/10
On Thu, Oct 16, 2014 at 09:55:32AM +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2014-10-15 at 16:19 -0600, Bjorn Helgaas wrote:
> > PCI/MSI: Add device flag indicating that 64-bit MSIs don't work
> >
> > I'd be happy to merge it, but given what I know now, I would wait and merge
> > it during
On 11/09/2014 09:26 PM, Jeremy Kerr wrote:
> Hi Corey,
>
> Thanks for the review.
>
>>> IPMI folks: the IPMI driver could do with a little review, as it's
>>> not a conventional BT/KCS/SMI SI, in that the low-level send/recv
>>> interface will handle the entire message at once.
>> Handling the enti
On Tue, 2014-10-21 at 08:59 +, Yuantian Tang wrote:
> > > -config PPC_CORENET_CPUFREQ
> > > - tristate "CPU frequency scaling driver for Freescale E500MC SoCs"
> > > - depends on PPC_E500MC && OF && COMMON_CLK
> > > +config QORIQ_CPUFREQ
> > > + tristate "CPU frequency scaling
From: Denis Kirjanov
Date: Mon, 10 Nov 2014 08:59:43 +0300
> Add BPF extension SKF_AD_HATYPE to ppc JIT to check
> the hw type of the interface
>
> Before:
> [ 57.723666] test_bpf: #20 LD_HATYPE
> [ 57.723675] BPF filter opcode 0020 (@0) unsupported
> [ 57.724168] 48 48 PASS
>
> After:
>
On Mon, Nov 10, 2014 at 10:04:57AM +1100, Michael Ellerman wrote:
> On Wed, 2014-11-05 at 06:21 -0800, Guenter Roeck wrote:
> > On Wed, Nov 05, 2014 at 04:45:14PM +0530, Neelesh Gupta wrote:
> > > The current driver probe() function assumes the sensor device to be
> > > alwary present and gets exec
On Tue, 2014-11-11 at 04:32 -0600, Xie Shaohui-B21989 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, November 11, 2014 8:23 AM
> > To: shh@gmail.com
> > Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Medve
> > Emilian-EMMEDVE1; Xie Shaohui-B
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, November 11, 2014 8:23 AM
> To: shh@gmail.com
> Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Medve
> Emilian-EMMEDVE1; Xie Shaohui-B21989
> Subject: Re: [PATCH] DT: add MDIO node for FMan node
>
> On Tue,
On 11/10/2014 11:42 PM, Michael Ellerman wrote:
On Sun, 2014-11-09 at 17:42 -0800, Guenter Roeck wrote:
Register with kernel power-off handler instead of setting pm_power_off
directly.
If there is an indication that there can be more than one power-off handler,
use register_power_off_handler, o
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