On Mon, 2014-08-18 at 22:13 +1000, Paul Mackerras wrote:
> This splits out the instruction analysis part of emulate_step() into
> a separate analyse_instr() function, which decodes the instruction,
> but doesn't execute any load or store instructions. It does execute
> integer instructions and bra
On 21 August 2014 10:36, Shilpasri G Bhat wrote:
> The intention here is stop the cpufreq governor and then to set the cpus to
> nominal frequency so as to ensure that the frequency won't be changed later.
>
> The .suspend callback of the driver is not called during reboot/kexec.
> So we need an e
On 08/18/2014 01:16 PM, Viresh Kumar wrote:
On 14 August 2014 16:49, Shilpasri G Bhat
wrote:
This patch ensures the cpus to kexec/reboot at nominal frequency.
Nominal frequency is the highest cpu frequency on PowerPC at
which the cores can run without getting throttled.
If the host kernel had
On Wed, 2014-08-13 at 14:48 +0530, Himangi Saraogi wrote:
> Continue is not needed at the bottom of a loop.
True.
I wonder though, is the code trying to continue to the outer loop? I stared at
it for a minute but it wasn't obvious.
I wonder if Robert still remembers?
cheers
> diff --git a/arc
CONFIG_JUMP_LABEL doesn't ensure HAVE_JUMP_LABEL, if it
is not the case use maintainers's own mutex to guard
the modification of global values.
Signed-off-by: Zhouyi Zhou
---
arch/powerpc/platforms/powernv/opal-tracepoints.c |2 +-
arch/powerpc/platforms/pseries/lpar.c |2 +-
On Wed, 2014-08-20 at 16:09 +0300, Mihai Caraman wrote:
> Book3E specification defines shared interrupt numbers for SPE and AltiVec
> units. Still SPE is present in e200/e500v2 cores while AltiVec is present in
> e6500 core. So we can currently decide at compile-time which unit to support
> exclusi
On Wed, 2014-08-20 at 16:09 +0300, Mihai Caraman wrote:
> SPE exception handlers are now defined for 32-bit e500mc cores even though
> SPE unit is not present and CONFIG_SPE is undefined.
>
> Restrict SPE exception handlers to e200/e500 cores adding CONFIG_SPE_POSSIBLE
> and consequently guard __s
The following commit prevents the MPC8548E on the XPedite5200 PrPMC
module from enumerating its PCI/PCI-X bus, though it was previously
able to:
powerpc/fsl-pci: use 'Header Type' to identify PCIE mode
The previous patch prevents any Freescale PCI-X bridge from enumerating
the bus, if it is h
From: Douglas Lehr
The Crocodile chip occasionally comes up with 4k and 8k BAR sizes.
Due to an errata, setting the SR-IOV page size causes the physical
function BARs to expand to the system page size. Since ppc64 uses
64k pages, when Linux tries to assign the smaller resource sizes
to the now 6
On Wed, 2014-08-20 at 09:05 +0530, Prabhakar Kushwaha wrote:
> On 8/20/2014 5:38 AM, Scott Wood wrote:
> > On Fri, 2014-08-15 at 16:07 -0500, Aaron Sierra wrote:
> >> Freescale's QorIQ T Series processors support 8 IFC chip selects
> >> within a memory map backward compatible with previous P Series
- Original Message -
> From: "Gokul C G"
> Sent: Tuesday, August 19, 2014 9:43:38 AM
>
> HI,
>
> I am facing problem with PCIE driver in new Linux kernel compiled for powerpc
> architecture (Big endian) ,freescales P2040 processor.I was using old kernel
> Linux version 3.0.48 previously
> >> -#define FSL_IFC_BANK_COUNT 4
> >> +#define FSL_IFC_BANK_COUNT 8
> > First please modify fsl_ifc_nand.c to limit itself to the number of
> > banks it dynamically determines are present based on the IFC version.
> >
> >
>
> Number of available bank/chip select are defined by SoC and it is
> in
On Fri, Aug 15, 2014 at 12:26:09AM -0700, Sukadev Bhattiprolu wrote:
> From: Cody P Schafer
>
> What this patchset does:
>
> - the first patch (override sysfs in tools/perf via SYSFS_PATH) was sent out
>previously, but needed a resend anyhow. Having it is useful for testing the
>later c
Make ONE_REG generic for server and embedded architectures by moving
kvm_vcpu_ioctl_get_one_reg() and kvm_vcpu_ioctl_set_one_reg() functions
to powerpc layer.
Signed-off-by: Mihai Caraman
---
v4:
- split ONE_REG powerpc generic and ONE_REG AltiVec
v3:
- make ONE_REG AltiVec support powerpc gen
Add ONE_REG support for IVPR and IVORs registers. Implement IVPR, IVORs 0-15
and 35 in booke common layer.
Signed-off-by: Mihai Caraman
---
v4:
- add ONE_REG IVPR
- use IVPR, IVOR2 and IVOR8 setters
- add api documentation for ONE_REG IVPR and IVORs
v3:
- new patch
Documentation/virtual/kv
Add setter functions for IVPR, IVOR2 and IVOR8 emulation in preparation
for ONE_REG support.
Signed-off-by: Mihai Caraman
---
v4:
- new patch
- add api documentation for ONE_REG IVPR and IVORs
arch/powerpc/kvm/booke.c | 24
arch/powerpc/kvm/booke.h |
Move ONE_REG AltiVec support to powerpc generic layer.
Signed-off-by: Mihai Caraman
---
v4:
- split ONE_REG powerpc generic and ONE_REG AltiVec
v3:
- make ONE_REG AltiVec support powerpc generic
v2:
- add comment describing VCSR register representation in KVM vs kernel
arch/powerpc/include
Add AltiVec support in KVM for Book3e. FPU support gracefully reuse host
infrastructure so follow the same approach for AltiVec.
Book3e specification defines shared interrupt numbers for SPE and AltiVec
units. Still SPE is present in e200/e500v2 cores while AltiVec is present in
e6500 core. So we
Add KVM Book3e AltiVec support.
Changes:
v4:
- use CONFIG_SPE_POSSIBLE and a new ifdef for CONFIG_ALTIVEC
- remove SPE handlers from bookehv
- split ONE_REG powerpc generic and ONE_REG AltiVec
- add setters for IVPR, IVOR2 and IVOR8
- add api documentation for ONE_REG IVPR and IVORs
- don't
Increase FPU laziness by loading the guest state into the unit before entering
the guest instead of doing it on each vcpu schedule. Without this improvement
an interrupt may claim floating point corrupting guest state.
Signed-off-by: Mihai Caraman
---
v4:
- update commit message
v3:
- no chang
Philipp,
On Wed, Aug 20, 2014 at 10:42:58AM +0200, Philipp Zabel wrote:
> Hi,
>
> currently there is a wild mixture of isl, isil, and intersil
> compatibles in the kernel. I figure at this point it is still
> possible to change this to use "isil" everywhere without too
> much pain, but it might b
On Wed, Aug 20, 2014 at 4:00 AM, Geert Uytterhoeven
wrote:
>> 1.9.1
>
> In light of my investigation for your spufs patch, I guess this is a non-SMP
> PSERIES config?
So what happens is SELECT_MEMORY_MODEL choses FLATMEM_MANUAL because
of which SPARSEMEM is not enabled despite having
ARCH_SPARSE
On Wed, Aug 20, 2014 at 3:49 AM, Geert Uytterhoeven
wrote:
> Is this a randconfig kernel?
Yes, randconfig with ARCH=powerpc.
>
> config ARCH_SPARSEMEM_DEFAULT
>def_bool y
>depends on (SMP && PPC_PSERIES) || PPC_PS3
>
> Why is this not enabled? !SMP? !PPC_PSERIES? !PPC_PS3?
This
SPE exception handlers are now defined for 32-bit e500mc cores even though
SPE unit is not present and CONFIG_SPE is undefined.
Restrict SPE exception handlers to e200/e500 cores adding CONFIG_SPE_POSSIBLE
and consequently guard __stup_ivors and __setup_cpu functions.
Signed-off-by: Mihai Caraman
Book3E specification defines shared interrupt numbers for SPE and AltiVec
units. Still SPE is present in e200/e500v2 cores while AltiVec is present in
e6500 core. So we can currently decide at compile-time which unit to support
exclusively. As Alexander Graf suggested, this will improve code readab
On 8/16/2014 2:37 AM, Aaron Sierra wrote:
According to Freescale manuals, the IFC_CSORn_EXT register is located
immediately _after_ the bank's IFC_CSORn register.
This patch adjusts the csor_ext member of and reserved register arrays
immediately surrounding the csor_cs structure to provide prop
Hello.
On 8/20/2014 12:43 PM, Philipp Zabel wrote:
Currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. At this point, changing the vendor
symbol to the most often used variant, which is equal to the
NASDAQ symbol, isil, should not hurt, since the isl1208 driv
Hi,
currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. I figure at this point it is still
possible to change this to use "isil" everywhere without too
much pain, but it might be preferred to keep the already
documented "isl" prefix, even though it doesn't follo
Currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. At this point, changing the vendor
symbol to the most often used variant, which is equal to the
NASDAQ symbol, isil, should not hurt, since the isl1208 driver
doesn't care either way.
Patch db04d6284e2a added de
Currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. At this point, changing the vendor
symbol to the most often used variant, which is equal to the
NASDAQ symbol, isil, should not hurt.
Signed-off-by: Philipp Zabel
---
arch/arm/boot/dts/armada-370-netgear-rn10
Currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. At this point, changing the vendor
symbol to the most often used variant, which is equal to the
NASDAQ symbol, isil, should not hurt.
Signed-off-by: Philipp Zabel
---
Documentation/devicetree/bindings/i2c/tri
This patch adds the Intersil ISL1208 and ISL12022 I2C RTCs to the
trivial-devices list.
Signed-off-by: Philipp Zabel
---
Documentation/devicetree/bindings/i2c/trivial-devices.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
b/Do
Currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. At this point, changing the vendor
symbol to the most often used variant, which is equal to the
NASDAQ symbol, isil, should not hurt, since the isl1208 driver
doesn't care either way.
Signed-off-by: Philipp Zab
Currently there is a wild mixture of isl, isil, and intersil
compatibles in the kernel. At this point, changing the vendor
symbol to the most often used variant, which is equal to the
NASDAQ symbol, isil, should not hurt, since the isl1208 driver
doesn't care either way.
Patch 70e123373c05 added th
On Tue, Aug 19, 2014 at 11:01 PM, Pranith Kumar wrote:
> ARCH_ENABLE_MEMORY_HOTPLUG is enabled by default for powerpc. This causes
> build
> failures when SPARSEMEM=n as memory hotplug needs definition which are defined
> only when SPARSEMEM=y. The error is as follows:
>
> arch/powerpc/platforms/
Hi Pranith,
On Tue, Aug 19, 2014 at 11:16 PM, Pranith Kumar wrote:
> SPU_FS unconditionally enables MEMORY_HOTPLUG, which will fail to build if
> SPARSEMEM=n.
>
> Make SPU_FS depend on SPARSEMEM so that hotplug-memory.c does not fail to
> compile.
>
> Signed-off-by: Pranith Kumar
> ---
> arch/p
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