On Mon, 2014-08-18 at 22:13 +1000, Paul Mackerras wrote:
> This splits out the instruction analysis part of emulate_step() into
> a separate analyse_instr() function, which decodes the instruction,
> but doesn't execute any load or store instructions. It does execute
> integer instructions and branches which can be executed purely by
> updating register values in the pt_regs struct. For other instructions,
> it returns the instruction type and other details in a new
> instruction_op struct. emulate_step() then uses that information
> to execute loads, stores, cache operations, mfmsr, mtmsr[d], and
> (on 64-bit) sc instructions.
>
> The reason for doing this is so that the KVM code can use it instead
> of having its own separate instruction emulation code. Possibly the
> alignment interrupt handler could also use this.
Breaks the ppc64e_defconfig build:
arch/powerpc/lib/sstep.c: In function 'emulate_step':
arch/powerpc/lib/sstep.c:1794:3: error: implicit declaration of function
'do_vec_load' [-Werror=implicit-function-declaration]
reg, do_lvx, op.ea & ~0xfUL, regs);
arch/powerpc/lib/sstep.c:1840:3: error: implicit declaration of function
'do_vec_store' [-Werror=implicit-function-declaration]
err = do_vec_store(op.reg, do_stvx, op.ea & ~0xfUL, regs);
^
cheers
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