> -Original Message-
> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Dongsheng
> Wang
> Sent: Tuesday, September 24, 2013 2:59 PM
> To: Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> Subject:
On 09/25/2013 07:49 AM, Michael Ellerman wrote:
> On Mon, 2013-09-23 at 14:45 +0530, Anshuman Khandual wrote:
>> On 09/21/2013 12:25 PM, Stephane Eranian wrote:
>>> On Tue, Sep 10, 2013 at 4:06 AM, Michael Ellerman
>>> wrote:
>
> On Fri, 2013-08-30 at 09:54 +0530, Anshuman Khandual wrote:
These accessors allow us to do cache inhibited accesses when in real
mode. They should only be used in real mode.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/io.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/inc
In io.h we have macros to generate our IO accessors. These are currently
named FOO_BE() and FOO_LE() to indicate big & little endian. However the
distinction between the macros is not so much the endianess as the form
of the instruction that is used.
Rename the macros to reflect that, so we end up
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Wednesday, September 25, 2013 11:43 AM
> To: Kumar Gala
> Cc: Wang Dongsheng-B40534; Wood Scott-B07421; linuxppc-
> d...@lists.ozlabs.org
> Subject: RE: [PATCH v4 1/4] powerpc/fsl: add E6500 PVR and SPRN_PWRMGTCR0
> define
>
>
>
Hi Linus !
Here are a few things for -rc2, this time it's all written by me so it
can only be perfect right ? :)
So we have the fix to call irq_enter/exit on the irq stack we've been
discussing, plus a cleanup on top to remove an unused (and broken)
stack limit tracking feature (well, make i
Starting secondary CPUs early on from Open Firmware and placing them
in a holding spin loop slows down the boot process significantly under
some hypervisors such as KVM.
This is also unnecessary when RTAS supports querying the CPU state
So let's not do it.
Signed-off-by: Benjamin Herrenschmidt
> -Original Message-
> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> Sent: Tuesday, September 24, 2013 9:19 PM
> To: Bhushan Bharat-R65777
> Cc: Wang Dongsheng-B40534; Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH v4 1/4] powerpc/fsl: add E6500 PVR and SPR
A security check is performed on mmap addresses in
security/security.c:security_mmap_addr(). It uses mmap_min_addr to insure
mmaps don't get addresses lower than a user configurable guard value
(/proc/sys/vm/mmap_min_addr). The arch specific mmap topdown searches
look for a map candidate address
> >> /*
> >> * For the 8xx processors, all of them report the same PVR family for
> >> * the PowerPC core. The various versions of these processors must be
> >> diff -- git a/arch/powerpc/include/asm/reg_booke.h
> >> b/arch/powerpc/include/asm/reg_booke.h
> >> index ed8f836..4a6457e 100644
> >> -
On Mon, 2013-09-23 at 14:45 +0530, Anshuman Khandual wrote:
> On 09/21/2013 12:25 PM, Stephane Eranian wrote:
> > On Tue, Sep 10, 2013 at 4:06 AM, Michael Ellerman
> > wrote:
> >> >
> >> > On Fri, 2013-08-30 at 09:54 +0530, Anshuman Khandual wrote:
> >>> > > This patchset is the re-spin of t
On Tue, Sep 24, 2013 at 8:06 PM, Stephen Rothwell wrote:
> Hi Andrew,
>
> After merging the akpm tree, linux-next builds (powerpc allmodconfig)
> fail like this:
>
> drivers/tty/ehv_bytechan.c:362:1: error: type defaults to 'int' in
> declaration of 'console_initcall' [-Werror=implicit-int]
>
> C
Hi Andrew,
After merging the akpm tree, linux-next builds (powerpc allmodconfig)
fail like this:
drivers/tty/ehv_bytechan.c:362:1: error: type defaults to 'int' in declaration
of 'console_initcall' [-Werror=implicit-int]
Caused by commit 0f01cf96c2d4 ("./Makefile: enable -Werror=implicit-int
an
On Tue, Sep 24, 2013 at 05:41:32PM -0500, Scott Wood wrote:
> On Tue, 2013-09-24 at 11:03 +0800, Kevin Hao wrote:
> > + and B4 QDS boards
[...]
>
> Is there any difference between the 32-bit and 64-bit versions of this
> config symbol, other than the help text?
No. As you know some of these b
Scott Wood wrote:
>I think it should be okay to leave the DIU node. I think the kernel
>will crash if you try to enable a DIU console (video= on the kernel
>command line), but I think it's okay to ignore that for the moment.
Sounds like a bug in the DIU driver. It should fail gracefully in t
On Mon, 2013-09-23 at 09:21 +0530, Prabhakar Kushwaha wrote:
> +/* coreint doesn't play nice with lazy EE, use legacy mpic for now */
> + .get_irq= mpic_get_coreint_irq,
Remove the comment.
Also note Kevin's patch to consolidate on a common corenet board file.
-Scott
_
On Thu, Sep 19, 2013 at 12:59:17PM +0530, Bharat Bhushan wrote:
> This patch adds interface to get following information
> - Number of MSI regions (which is number of MSI banks for powerpc).
> - Get the region address range: Physical page which have the
> address/addresses used for generat
On Tue, 2013-09-17 at 17:23 +0800, Lian Minghuan-b31939 wrote:
> >> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> >> index a189ff0..4cb12e8 100644
> >> --- a/arch/powerpc/sysdev/fsl_pci.c
> >> +++ b/arch/powerpc/sysdev/fsl_pci.c
> >> @@ -62,7 +62,11 @@ static void qui
On Thu, 2013-09-19 at 22:08 -0500, Timur Tabi wrote:
> Kushwaha Prabhakar-B32579 wrote:
> > My primary object is to put base patch in Linux. once it done other things
> > can be enabled one by one.
>
> Any features which are not enabled must be specified in the patch
> description. The patch sa
On Tue, 2013-09-24 at 18:48 +0800, Xie Xiaobo wrote:
> + partition@8 {
> + /* 3.5 MB for Linux Kernel Image */
> + reg = <0x0008 0x0038>;
> + label = "NOR Linux Kernel Image";
> + };
Is this enough?
>
On Tue, 2013-09-24 at 18:48 +0800, Xie Xiaobo wrote:
> Define two QE init functions in common file, and avoid
> the same codes being duplicated in board files.
>
> Signed-off-by: Xie Xiaobo
> ---
> V4 -> V3: Nochange
>
> arch/powerpc/platforms/85xx/common.c | 51
>
On Tue, 2013-09-24 at 11:03 +0800, Kevin Hao wrote:
> Currently all these boards use the same machine struct and also select
> the same kernel options, so it seems a bit of redundant to keep one
> separate kernel option for each board. Also update the defconfigs
> according to this change.
>
> Sig
Anshuman Khandual [khand...@linux.vnet.ibm.com] wrote:
| On 09/14/2013 06:19 AM, Sukadev Bhattiprolu wrote:
| > +static void power7_get_mem_data_src(union perf_mem_data_src *dsrc,
| > + struct pt_regs *regs)
| > +{
| > + u64 idx;
| > + u64 mmcra = regs->dsisr;
| > + u64 addr
On Tue, Sep 24, 2013 at 02:23:31PM -0700, Timothy Pepper wrote:
> diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
> index 0c63562..0e7355d 100644
> --- a/arch/arm/mm/mmap.c
> +++ b/arch/arm/mm/mmap.c
> @@ -9,6 +9,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #def
On Tue, 2013-09-24 at 05:27 -0500, Hu Mingkai-B21284 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, September 24, 2013 7:03 AM
> > To: Hu Mingkai-B21284
> > Cc: Wood Scott-B07421; linuxppc-...@ozlabs.org
> > Subject: Re: [PATCH] powerpc/85xx: DTS - re-organi
On 09/24/2013 04:30 AM, Hongbo Zhang wrote:
> On 09/24/2013 01:04 AM, Stephen Warren wrote:
>> On 09/18/2013 04:15 AM, hongbo.zh...@freescale.com wrote:
>>> From: Hongbo Zhang
>>>
>>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this
>>> patch adds
>>> the device tree nodes for t
On Tue, Sep 24, 2013 at 11:39:57AM +0400, Aida Mynzhasova wrote:
> Currently IEEE 1588 timer reference clock source is determined through
> hard-coded value in gianfar_ptp driver. This patch allows to select ptp
> clock source by means of device tree file node.
>
> For instance:
>
> fsl,cks
On Sep 24, 2013, at 6:21 AM, Bhushan Bharat-R65777 wrote:
>
>
>> -Original Message-
>> From: Linuxppc-dev [mailto:linuxppc-dev-
>> bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Dongsheng
>> Wang
>> Sent: Tuesday, September 24, 2013 2:58 PM
>> To: Wood Scott-B07421
This enables the Berkeley Packet Filter JIT compiler
for the PowerPC running in 64bit Little Endian.
Signed-off-by: Philippe Bergheaud
---
arch/powerpc/include/asm/ppc-opcode.h |1 +
arch/powerpc/net/bpf_jit.h| 10 ++
arch/powerpc/net/bpf_jit_64.S |9 +++
> -Original Message-
> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Dongsheng
> Wang
> Sent: Tuesday, September 24, 2013 2:58 PM
> To: Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534
> Subject:
TWR-P1025 Overview
-
512Mbyte DDR3 (on board DDR)
64MB Nor Flash
eTSEC1: Connected to RGMII PHY AR8035
eTSEC3: Connected to RGMII PHY AR8035
Two USB2.0 Type A
One microSD Card slot
One mini-PCIe slot
One mini-USB TypeB dual UART
Signed-off-by: Michael Johnston
Signed-off-
Define two QE init functions in common file, and avoid
the same codes being duplicated in board files.
Signed-off-by: Xie Xiaobo
---
V4 -> V3: Nochange
arch/powerpc/platforms/85xx/common.c | 51 +++
arch/powerpc/platforms/85xx/mpc85xx.h | 8 ++
2 files chan
Use common init functions instead of the duplicated codes
in some platforms with QUICC Engine.
Signed-off-by: Xie Xiaobo
---
V4: new patch
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 55 ++-
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 36 ++--
2 files
C290PCIe has NAND flash present on IFC Chip Select(CS) 1.
So Add "ranges" field for NAND flash on CS1.
Signed-off-by: Prabhakar Kushwaha
---
Based upon git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git
branch next
arch/powerpc/boot/dts/c293pcie.dts |1 +
1 file changed, 1 in
On 09/24/2013 01:04 AM, Stephen Warren wrote:
On 09/18/2013 04:15 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/d
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, September 24, 2013 7:03 AM
> To: Hu Mingkai-B21284
> Cc: Wood Scott-B07421; linuxppc-...@ozlabs.org
> Subject: Re: [PATCH] powerpc/85xx: DTS - re-organize the SPI partitions
> property
>
> On Tue, 2013-09-17 at 06:06 -0500,
Alexey Kardashevskiy writes:
> The previous scheme always put 0 as a parent slot#. However it is
> not always the case and QEMU's PCI bridge does not support putting
> device at slot#0 as it claims SHPC support for hotplug.
>
> This modifies the interrups map to let the linux guest resolve XICS
>
From: Wang Dongsheng
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
From: Wang Dongsheng
Add a sys interface to enable/diable pw20 state or altivec idle, and
control the wait entry time.
Enable/Disable interface:
0, disable. 1, enable.
/sys/devices/system/cpu/cpuX/pw20_state
/sys/devices/system/cpu/cpuX/altivec_idle
Set wait time interface:(Nanosecond)
/sys/dev
From: Wang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed
From: Wang Dongsheng
E6500 PVR and SPRN_PWRMGTCR0 will be used in subsequent pw20/altivec
idle patches.
Signed-off-by: Wang Dongsheng
---
*v3:
Add bit definitions for PWRMGTCR0.
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/include/asm/reg_booke.h | 9 +
2 files changed, 1
On Mon, 2013-06-03 at 09:36 -0400, Josh Boyer wrote:
> On Mon, Jun 03, 2013 at 12:00:24PM +0100, Ian Campbell wrote:
> >Currently I see:
> > DTC arch/powerpc/boot/kilauea.dtb
> >Warning (reg_format): "reg" property in /plb/ppc4xx-msi@C1000 has
> >invalid length (12 bytes) (#address-cells
On Mon, 2013-06-03 at 12:00 +0100, Ian Campbell wrote:
> This fixes a warning:
>
> DTC arch/powerpc/boot/virtex440-ml507.dtb
> Warning (reg_format): "reg" property in
> /plb@0/xps-ll-temac@81c0/ethernet@81c0/phy@7 has invalid length (4
> bytes) (#address-cells == 2, #size-cells ==
Activating CONFIG_PIN_TLB is supposed to pin the IMMR and the first three
8Mbytes pages. But the setting of MD_CTR to a pinnable entry was missing before
the pinning of the third 8Mb page. As the index is decremented module 28
(MD_RSV4D is set) after every DTLB update, the third 8Mbytes page was
no
Le 20/09/2013 23:22, Scott Wood a écrit :
The hardware wants to decrement; why fight it?
>I see your point.
>However it is not clear in the documentation if the decrement is done
>really after the update, or at xTLB interrupt. So I propose to still set
>the CTR ourself as described in the refer
Currently IEEE 1588 timer reference clock source is determined through
hard-coded value in gianfar_ptp driver. This patch allows to select ptp
clock source by means of device tree file node.
For instance:
fsl,cksel = <0>;
for using external (TSEC_TMR_CLK input) high precision timer
refer
The previous scheme always put 0 as a parent slot#. However it is
not always the case and QEMU's PCI bridge does not support putting
device at slot#0 as it claims SHPC support for hotplug.
This modifies the interrups map to let the linux guest resolve XICS
global interrupt number correctly.
Signe
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