On 07/10/2013 01:20 PM, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Tiejun Chen
Sent: Tuesday, July 09, 2013 1:33 PM
To: b...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozla
On 07/10/2013 01:17 PM, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Tiejun Chen
Sent: Tuesday, July 09, 2013 1:33 PM
To: b...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozla
> -Original Message-
> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Tiejun
> Chen
> Sent: Tuesday, July 09, 2013 1:33 PM
> To: b...@kernel.crashing.org
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
> Su
> -Original Message-
> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Tiejun
> Chen
> Sent: Tuesday, July 09, 2013 1:33 PM
> To: b...@kernel.crashing.org
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
> Su
On 07/10/2013 03:02 AM, Alexander Graf wrote:
> On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
>> This adds real mode handlers for the H_PUT_TCE_INDIRECT and
>> H_STUFF_TCE hypercalls for QEMU emulated devices such as IBMVIO
>> devices or emulated PCI. These calls allow adding multiple entrie
On Wed, 2013-07-10 at 13:25 +1000, Michael Ellerman wrote:
> > > Any idea why we have that there? ie. have the config symbols changed
> > > over time or was this always dead code?
> >
> > No idea. I tried to trace this before submitting the patch. But it has
> > been there since the begin of the g
On Wed, Jul 10, 2013 at 01:25:33PM +1000, Michael Ellerman wrote:
> On Wed, Jul 10, 2013 at 10:23:07AM +0800, Kevin Hao wrote:
> > On Wed, Jul 10, 2013 at 12:01:33PM +1000, Michael Ellerman wrote:
> > > On Wed, Jul 10, 2013 at 09:43:42AM +0800, Kevin Hao wrote:
> > > > The math.c is only built when
Thanks.
Regards
Haijun.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, July 10, 2013 4:04 AM
> To: Zhang Haijun-B42677
> Cc: Wood Scott-B07421; linux-...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; cbouatmai...@gmail.com; c...@laptop.org; Fleming
> Andy-AFLEMI
On Tue, 2013-07-09 at 18:02 +0200, Alexander Graf wrote:
> On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
> > The existing TCE machine calls (tce_build and tce_free) only support
> > virtual mode as they call __raw_writeq for TCE invalidation what
> > fails in real mode.
> >
> > This introduce
On Wed, Jul 10, 2013 at 10:23:07AM +0800, Kevin Hao wrote:
> On Wed, Jul 10, 2013 at 12:01:33PM +1000, Michael Ellerman wrote:
> > On Wed, Jul 10, 2013 at 09:43:42AM +0800, Kevin Hao wrote:
> > > The math.c is only built when CONFIG_MATH_EMULATION is enabled.
> > > So we would never get into the ca
On 07/10/2013 02:02 AM, Alexander Graf wrote:
> On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
>> The existing TCE machine calls (tce_build and tce_free) only support
>> virtual mode as they call __raw_writeq for TCE invalidation what
>> fails in real mode.
>>
>> This introduces tce_build_rm a
Hi, scott
Patch V4 had send, Pls review.
Thanks.
Regards
Haijun.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, July 10, 2013 12:15 AM
> To: Zhang Haijun-B42677
> Cc: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org; Fleming
> Andy-AFLEMING; Zhang Haijun-B426
Overview of P1020RDB-PD device:
- DDR3 2GB
- NOR flash 64MB
- NAND flash 128MB
- SPI flash 16MB
- I2C EEPROM 256Kb
- eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
- eTSEC2 (SGMII PHY)
- eTSEC3 (RGMII PHY)
- SDHC
- 1 USB ports
- TDM ports
- PCIe
Signed-off-by: Haijun Zhang
Signed-off-by: Jerry
On Tue, Jul 09, 2013 at 10:14:34AM +0200, Peter Zijlstra wrote:
> On Mon, Jul 08, 2013 at 10:24:34PM -0400, Vince Weaver wrote:
> >
> > So something like they have on ARM?
> >
> > vince@pandaboard:/sys/bus/event_source/devices$ ls -l
> > lrwxrwxrwx 1 root root 0 Jul 8 21:57 ARMv7 Cortex-A9 ->
>
On Tue, Jul 09, 2013 at 11:20:50AM -0400, Vince Weaver wrote:
> On Tue, 9 Jul 2013, Michael Ellerman wrote:
>
> > On Mon, Jul 08, 2013 at 10:24:34PM -0400, Vince Weaver wrote:
> > > why is it a hack to use cpuid?
> >
> > Because you're assuming that the PMU the kernel has exposed is for the
> > c
On Wed, Jul 10, 2013 at 12:01:33PM +1000, Michael Ellerman wrote:
> On Wed, Jul 10, 2013 at 09:43:42AM +0800, Kevin Hao wrote:
> > The math.c is only built when CONFIG_MATH_EMULATION is enabled.
> > So we would never get into the case that CONFIG_MATH_EMULATION
> > is not defined in this file.
>
>
On Tue, Jul 09, 2013 at 05:15:23PM -0700, Sukadev Bhattiprolu wrote:
> Anshuman Khandual [khand...@linux.vnet.ibm.com] wrote:
> | On 06/24/2013 04:58 PM, Michael Ellerman wrote:
> | > In pmu_disable() we disable the PMU by setting the FC (Freeze Counters)
> | > bit in MMCR0. In order to do this we
Hi Scott,
I made this patch to fix msi compile error on mpc83xx.
Could you please have a review.
Thanks.
-Hongtao
> -Original Message-
> From: Jia Hongtao-B38951
> Sent: Tuesday, July 02, 2013 9:37 AM
> To: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421
> Cc: ga...@kernel.crashing.org;
On Wed, Jul 10, 2013 at 09:43:42AM +0800, Kevin Hao wrote:
> The math.c is only built when CONFIG_MATH_EMULATION is enabled.
> So we would never get into the case that CONFIG_MATH_EMULATION
> is not defined in this file.
Any idea why we have that there? ie. have the config symbols changed
over tim
I got the following error on my t4240qds board.
ntpd[2713]: unhandled signal 4 at 0fd5b448 nip 0fd5b448 lr 0fd5b424 code 30001
The root cause is that the float point instruction 'fsqrt' is used.
But this instruction is not implemented on e6500 core. Even this
does seem a gcc bug, I would like to
The math.c is only built when CONFIG_MATH_EMULATION is enabled.
So the #ifdef check for CONFIG_MATH_EMULATION in it seems redundant.
Drop all of them.
Signed-off-by: Kevin Hao
---
arch/powerpc/math-emu/math.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/powerpc/math-emu/math.c b/a
The math.c is only built when CONFIG_MATH_EMULATION is enabled.
So we would never get into the case that CONFIG_MATH_EMULATION
is not defined in this file.
Signed-off-by: Kevin Hao
---
arch/powerpc/math-emu/math.c | 42 --
1 file changed, 42 deletions(-)
Just remove some dead or unneeded codes in math.c. No function change.
Kevin Hao (2):
powerpc/math-emu: remove the dead code in math.c
powerpc/math-emu: remove the unneeded check for CONFIG_MATH_EMULATION
in math.c
arch/powerpc/math-emu/math.c | 46 ---
Anshuman Khandual [khand...@linux.vnet.ibm.com] wrote:
| On 06/24/2013 04:58 PM, Michael Ellerman wrote:
| > In pmu_disable() we disable the PMU by setting the FC (Freeze Counters)
| > bit in MMCR0. In order to do this we have to read/modify/write MMCR0.
| >
| > It's possible that we read a value
On 07/09/2013 04:45:10 PM, Alexander Graf wrote:
On 28.06.2013, at 11:20, Mihai Caraman wrote:
> + /* Get page size */
> + if (MAS0_GET_TLBSEL(mfspr(SPRN_MAS0)) == 0)
> + psize_shift = PAGE_SHIFT;
> + else
> + psize_shift = MAS1_GET_TSIZE(mas1) + 10;
> +
> + mas7_mas3 = ((
On 07/09/2013 04:44:24 PM, Alexander Graf wrote:
On 09.07.2013, at 20:46, Scott Wood wrote:
> I suspect that tlbsx is faster, or at worst similar. And unlike
comparing tlbsx to lwepx (not counting a fix for the threading
problem), we don't already have code to search the guest TLB, so
tes
On Tue, 2013-07-09 at 17:26 -0500, Scott Wood wrote:
> On 07/09/2013 05:00:26 PM, Alexander Graf wrote:
> >
> > On 09.07.2013, at 23:54, Scott Wood wrote:
> >
> > > On 07/09/2013 04:49:32 PM, Alexander Graf wrote:
> > >> Not sure I understand. What the timing stats do is that they
> > measure t
On Wed, 2013-07-10 at 00:00 +0200, Alexander Graf wrote:
> Then don't overflow the buffer. Make it large enough. IIRC ftrace improved
> recently to dynamically increase the buffer size too.
>
> Steven, do I remember correctly here?
Not really. Ftrace only dynamically increases the buffer when t
On 07/02/2013 06:20:04 AM, Catalin Udma wrote:
If CONFIG_E500 is enabled, the compilation flags are updated
specifying the target core -mcpu=e5500/e500mc/8540
Also remove -Wa,-me500, being incompatible with -mcpu=e5500/e6500
The assembler option is redundant if the -mcpu= flag is set.
The patch f
On 07/10/2013 01:35 AM, Alexander Graf wrote:
> On 06/27/2013 07:02 AM, Alexey Kardashevskiy wrote:
>> Signed-off-by: Alexey Kardashevskiy
>> ---
>> include/uapi/linux/kvm.h |2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
>> in
On 07/10/2013 03:32 AM, Alexander Graf wrote:
> On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
>> This adds special support for huge pages (16MB). The reference
>> counting cannot be easily done for such pages in real mode (when
>> MMU is off) so we added a list of huge pages. It is populate
On 07/09/2013 05:00:26 PM, Alexander Graf wrote:
On 09.07.2013, at 23:54, Scott Wood wrote:
> On 07/09/2013 04:49:32 PM, Alexander Graf wrote:
>> Not sure I understand. What the timing stats do is that they
measure the time between [exit ... entry], right? We'd do the same
thing, just all i
On 09.07.2013, at 23:54, Scott Wood wrote:
> On 07/09/2013 04:49:32 PM, Alexander Graf wrote:
>> On 09.07.2013, at 20:29, Scott Wood wrote:
>> > On 07/09/2013 12:46:32 PM, Alexander Graf wrote:
>> >> On 07/09/2013 07:16 PM, Scott Wood wrote:
>> >>> On 07/08/2013 01:45:58 PM, Alexander Graf wrote:
On 07/09/2013 04:49:32 PM, Alexander Graf wrote:
On 09.07.2013, at 20:29, Scott Wood wrote:
> On 07/09/2013 12:46:32 PM, Alexander Graf wrote:
>> On 07/09/2013 07:16 PM, Scott Wood wrote:
>>> On 07/08/2013 01:45:58 PM, Alexander Graf wrote:
On 03.07.2013, at 15:30, Mihai Caraman wrote:
>>>
On 09.07.2013, at 06:24, Michael Neuling wrote:
> Alexander Graf wrote:
>
>>
>> On 04.07.2013, at 08:15, Bharat Bhushan wrote:
>>
>>> From: Bharat Bhushan
>>>
>>> This patchset moves the debug registers in a structure, which allows
>>> kvm to use same structure for debug emulation.
>>>
>>>
On 09.07.2013, at 20:29, Scott Wood wrote:
> On 07/09/2013 12:46:32 PM, Alexander Graf wrote:
>> On 07/09/2013 07:16 PM, Scott Wood wrote:
>>> On 07/08/2013 01:45:58 PM, Alexander Graf wrote:
On 03.07.2013, at 15:30, Mihai Caraman wrote:
> Some guests are making use of return from machi
On 28.06.2013, at 11:20, Mihai Caraman wrote:
> lwepx faults needs to be handled by KVM and this implies additional code
> in DO_KVM macro to identify the source of the exception originated from
> host context. This requires to check the Exception Syndrome Register
> (ESR[EPID]) and External PID
On 09.07.2013, at 20:46, Scott Wood wrote:
> On 07/09/2013 12:44:32 PM, Alexander Graf wrote:
>> On 07/09/2013 07:13 PM, Scott Wood wrote:
>>> On 07/08/2013 08:39:05 AM, Alexander Graf wrote:
On 28.06.2013, at 11:20, Mihai Caraman wrote:
> lwepx faults needs to be handled by KVM and thi
On 07/09/2013 01:04:01 AM, Zhang Haijun-B42677 wrote:
Regards & Thanks
Haijun.
发件人: Wood Scott-B07421
发送时间: 2013年7月8日 17:14
收件人: Zhang Haijun-B42677
抄送: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
cbouatmai...@gmail.com; c...@laptop.org
On 07/09/2013 12:44:32 PM, Alexander Graf wrote:
On 07/09/2013 07:13 PM, Scott Wood wrote:
On 07/08/2013 08:39:05 AM, Alexander Graf wrote:
On 28.06.2013, at 11:20, Mihai Caraman wrote:
> lwepx faults needs to be handled by KVM and this implies
additional code
> in DO_KVM macro to identify
On 07/09/2013 12:46:32 PM, Alexander Graf wrote:
On 07/09/2013 07:16 PM, Scott Wood wrote:
On 07/08/2013 01:45:58 PM, Alexander Graf wrote:
On 03.07.2013, at 15:30, Mihai Caraman wrote:
> Some guests are making use of return from machine check
instruction
> to do crazy things even though th
On 07/09/2013 07:16 PM, Scott Wood wrote:
On 07/08/2013 01:45:58 PM, Alexander Graf wrote:
On 03.07.2013, at 15:30, Mihai Caraman wrote:
> Some guests are making use of return from machine check instruction
> to do crazy things even though the 64-bit kernel doesn't handle yet
> this interrupt.
On 07/09/2013 07:13 PM, Scott Wood wrote:
On 07/08/2013 08:39:05 AM, Alexander Graf wrote:
On 28.06.2013, at 11:20, Mihai Caraman wrote:
> lwepx faults needs to be handled by KVM and this implies additional
code
> in DO_KVM macro to identify the source of the exception originated
from
> hos
On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
This adds special support for huge pages (16MB). The reference
counting cannot be easily done for such pages in real mode (when
MMU is off) so we added a list of huge pages. It is populated in
virtual mode and get_page is called just once per
On 07/08/2013 01:45:58 PM, Alexander Graf wrote:
On 03.07.2013, at 15:30, Mihai Caraman wrote:
> Some guests are making use of return from machine check instruction
> to do crazy things even though the 64-bit kernel doesn't handle yet
> this interrupt. Emulate MCSRR0/1 SPR and rfmci instruction
On 07/08/2013 08:39:05 AM, Alexander Graf wrote:
On 28.06.2013, at 11:20, Mihai Caraman wrote:
> lwepx faults needs to be handled by KVM and this implies additional
code
> in DO_KVM macro to identify the source of the exception originated
from
> host context. This requires to check the Exc
On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
This adds real mode handlers for the H_PUT_TCE_INDIRECT and
H_STUFF_TCE hypercalls for QEMU emulated devices such as IBMVIO
devices or emulated PCI. These calls allow adding multiple entries
(up to 512) into the TCE table in one call which save
On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT
and H_STUFF_TCE requests without passing them to QEMU, which saves time
on switching to QEMU and back.
Both real and virtual modes are supported. First the kernel tries to
hand
On 07/05/2013 05:11:04 PM, James Yang wrote:
This patch makes available the unmodified BookE branch taken debug
exception through PTRACE_SINGLEBLOCK if the ptrace() addr parameter is
set to 2.
This is hacky -- if we must retain the existing PTRACE_SINGLEBLOCK
semantics (which aren't actually
On 07/05/2013 01:27:05 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this
patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
---
arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 90
++
On 07/09/2013 03:35:43 AM, Haijun Zhang wrote:
Overview of P1020RDB-PD device:
- DDR3 2GB
- NOR flash 64MB
- NAND flash 128MB
- SPI flash 16MB
- I2C EEPROM 256Kb
- eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
- eTSEC2 (SGMII PHY)
- eTSEC3 (RGMII PHY)
- SDHC
- 2 USB ports
- 4 TDM ports
- PCIe
On 07/09/2013 12:34:34 AM, Zhang Haijun-B42677 wrote:
> cpld@2,0 {
> compatible = "fsl, p1020rdb-cpld";
> reg = <0x2 0x0 0x2>;
> read-only;
> };
Again, what is read-only supposed to mean here? I don't care that
it's
copied from the PC version. It doesn't ma
On 07/06/2013 05:07 PM, Alexey Kardashevskiy wrote:
The existing TCE machine calls (tce_build and tce_free) only support
virtual mode as they call __raw_writeq for TCE invalidation what
fails in real mode.
This introduces tce_build_rm and tce_free_rm real mode versions
which do mostly the same b
On 07/08/2013 03:33 AM, Benjamin Herrenschmidt wrote:
On Sun, 2013-07-07 at 01:07 +1000, Alexey Kardashevskiy wrote:
The current VFIO-on-POWER implementation supports only user mode
driven mapping, i.e. QEMU is sending requests to map/unmap pages.
However this approach is really slow, so we want
On 06/27/2013 07:02 AM, Alexey Kardashevskiy wrote:
Signed-off-by: Alexey Kardashevskiy
---
include/uapi/linux/kvm.h |2 ++
1 file changed, 2 insertions(+)
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 970b1f5..0865c01 100644
--- a/include/uapi/linux/kvm.h
+++ b/i
On Tue, 9 Jul 2013, Michael Ellerman wrote:
> On Mon, Jul 08, 2013 at 10:24:34PM -0400, Vince Weaver wrote:
> > why is it a hack to use cpuid?
>
> Because you're assuming that the PMU the kernel has exposed is for the
> cpu you happen to be executing on.
>
> But the real issue is with PMUs that
On Tue, 9 Jul 2013, Peter Zijlstra wrote:
> On Mon, Jul 08, 2013 at 10:24:34PM -0400, Vince Weaver wrote:
> >
> > So something like they have on ARM?
> >
> > vince@pandaboard:/sys/bus/event_source/devices$ ls -l
> > lrwxrwxrwx 1 root root 0 Jul 8 21:57 ARMv7 Cortex-A9 ->
> > ../../../devices/A
On Tue, 2013-07-09 at 15:40 +1000, Alexey Kardashevskiy wrote:
> On 07/09/2013 07:52 AM, Alex Williamson wrote:
> > On Sun, 2013-07-07 at 01:07 +1000, Alexey Kardashevskiy wrote:
> >> VFIO is designed to be used via ioctls on file descriptors
> >> returned by VFIO.
> >>
> >> However in some situati
Overview of P1020RDB-PD device:
- DDR3 2GB
- NOR flash 64MB
- NAND flash 128MB
- SPI flash 16MB
- I2C EEPROM 256Kb
- eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
- eTSEC2 (SGMII PHY)
- eTSEC3 (RGMII PHY)
- SDHC
- 2 USB ports
- 4 TDM ports
- PCIe
Signed-off-by: Haijun Zhang
Signed-off-by: Jer
On Mon, Jul 08, 2013 at 10:24:34PM -0400, Vince Weaver wrote:
>
> So something like they have on ARM?
>
> vince@pandaboard:/sys/bus/event_source/devices$ ls -l
> lrwxrwxrwx 1 root root 0 Jul 8 21:57 ARMv7 Cortex-A9 ->
> ../../../devices/ARMv7 Cortex-A9
> lrwxrwxrwx 1 root root 0 Jul 8 21:57 br
In commit 96f013f, "powerpc/kexec: Add kexec "hold" support for Book3e
processors", requires that GPR4 survive the "hold" process, for IBM Blue
Gene/Q with with some very strange firmware. But for FSL Book3E, r4 = 1
to indicate that the initial TLB entry for this core already exists so
we still sho
Book3e is always aligned 1GB to create TLB so we should
use (KERNELBASE - MEMORY_START) as VIRT_PHYS_OFFSET to
get __pa/__va properly while boot kdump.
Signed-off-by: Tiejun Chen
---
arch/powerpc/include/asm/page.h |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/include/asm
ppc64 kexec mechanism has a different implementation with ppc32.
Signed-off-by: Tiejun Chen
---
arch/powerpc/platforms/85xx/smp.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index 14d461b..d862808 100
We need to introduce a flag to indicate we're already running
a kexec kernel then we can go proper path. For example, We
shouldn't access spin_table from the bootloader to up any secondary
cpu for kexec kernel, and kexec kernel already know how to jump to
generic_secondary_smp_init.
Signed-off-by:
book3e have no real MMU mode so we have to create a 1:1 TLB
mapping to make sure we can access the real physical address.
And correct something to support this pseudo real mode on book3e.
Signed-off-by: Tiejun Chen
---
arch/powerpc/kernel/head_64.S |9 ---
arch/powerpc/kernel/misc_64.S |
We need to active KEXEC for book3e and bypass or convert non-book3e stuff
in kexec coverage.
Signed-off-by: Tiejun Chen
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/kernel/machine_kexec_64.c | 148 ++--
arch/powerpc/kernel/misc_64.S |
book3e is different with book3s since 3s includes the exception
vectors code in head_64.S as it relies on absolute addressing
which is only possible within this compilation unit. So we have
to get that label address with got.
And when boot a relocated kernel, we should reset ipvr properly again
af
We can rename 'interrupt_end_book3e' with '__end_interrupts' then
book3s/book3e can share this unique label to make sure we can use
this conveniently.
Signed-off-by: Tiejun Chen
---
arch/powerpc/kernel/exceptions-64e.S |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
This patchset is used to support kexec and kdump on book3e.
Tested on fsl-p5040 DS.
v3:
* add one patch to rename interrupt_end_book3e with __end_interrupts
then we can have a unique lable for book3e and book3s.
* add some comments for "book3e/kexec/kdump: enable kexec for kernel"
* clean "boo
> Hi Anshuman,
>
> Which system did you test this on and what results did you see?
>
Tested this on a power8 system.
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On 07/03/2013 07:52 PM, Sethi Varun-B16395 wrote:
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+varun.sethi=freescale@lists.ozlabs.org] On Behalf Of Tiejun
Chen
Sent: Thursday, June 20, 2013 1:23 PM
To: b...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozlabs.or
On 07/02/2013 01:37 PM, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Tiejun Chen
Sent: Thursday, June 20, 2013 1:23 PM
To: b...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozl
On 07/02/2013 01:17 PM, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Tiejun Chen
Sent: Thursday, June 20, 2013 1:23 PM
To: b...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozl
On 07/02/2013 01:00 PM, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Tiejun Chen
Sent: Thursday, June 20, 2013 1:23 PM
To: b...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozl
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