On Thu, Sep 01, 2011 at 02:27:00PM -0600, Alex Williamson wrote:
> On Thu, 2011-09-01 at 14:10 +1000, David Gibson wrote:
> > On Tue, Aug 30, 2011 at 08:51:38AM -0600, Alex Williamson wrote:
[snip]
> > > > If you open a group, merge in a bunch of other groups, then re-open
> > > > /dev/vfio/NNN for
On Sep 1, 2011, at 5:33 PM, Tabi Timur-B04825 wrote:
> On Thu, Sep 1, 2011 at 2:26 PM, Kumar Gala wrote:
>> The P4080 silicon device tree was using PowerPC,4080 while the other
>> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
>> consistent going forward.
>
> Shouldn't we chang
On Sep 1, 2011, at 3:42 PM, Scott Wood wrote:
> On 09/01/2011 02:26 PM, Kumar Gala wrote:
>> The P4080 silicon device tree was using PowerPC,4080 while the other
>> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
>> consistent going forward.
>
> Why are we not using the generic n
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On Thu, Sep 1, 2011 at 2:26 PM, Kumar Gala wrote:
> The P4080 silicon device tree was using PowerPC,4080 while the other
> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
> consistent going forward.
Shouldn't we change the nodes for all e500 based device trees in one
shot, instead
On Thu, Sep 1, 2011 at 3:42 PM, Scott Wood wrote:
> On 09/01/2011 02:26 PM, Kumar Gala wrote:
>> The P4080 silicon device tree was using PowerPC,4080 while the other
>> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
>> consistent going forward.
>
> Why are we not using the generic
Audio support for the MPC5200 exists, so enable it by default.
Signed-off-by: Timur Tabi
---
There was a bug in the audio drivers related to the of_platform
changes that was never discovered because these drivers were
never compiled by default. This patch should make sure that
never happens aga
On 09/01/2011 04:41 AM, LiuShuo wrote:
> After doing some tests, I found that the elbc controller can read/write
> 4k with one command
> if we insert a FIR_OP_NOP between first half reading/wring and second
> half reading/writing.(delay for something ?)
>From the docs:
> A NOP instruction that ap
On 09/01/2011 02:26 PM, Kumar Gala wrote:
> The P4080 silicon device tree was using PowerPC,4080 while the other
> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
> consistent going forward.
Why are we not using the generic names recommendation?
Is the "PowerPC" vendor string stil
On Thu, 2011-09-01 at 14:10 +1000, David Gibson wrote:
> On Tue, Aug 30, 2011 at 08:51:38AM -0600, Alex Williamson wrote:
> > On Tue, 2011-08-30 at 17:48 +1000, David Gibson wrote:
> > > On Mon, Aug 29, 2011 at 10:24:43PM -0600, Alex Williamson wrote:
> > > > On Tue, 2011-08-30 at 13:04 +1000, Davi
From: Mingkai Hu
There's only p2041rdb board for official release, but the p2041 silicon
on the board can be converted to p2040 silicon without XAUI and L2 cache
function, then the board becomes p2040rdb board. so we use the file name
p2041_rdb.c to handle P2040RDB board and P2041RDB board which
From: Stephen George
Adding new device tree binding file for the DCSR node. Modifying device
tree dtsi files to add DCSR node for P2041, P3041, P3060, P4080, & P5020.
Signed-off-by: Stephen George
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/p2041rdb.dts |4 ++
arch/powerpc/boot/d
From: Shengzhou Liu
The P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC.
The P3060 Processor combines six e500mc Power Architecture processor cores with
high-performance datapath acceleration architecture(DPAA), CoreNet fabric
infrastructure, as well as network and perip
From: Mingkai Hu
There's only p2041rdb board for official release, but the p2041 silicon
on the board can be converted to p2040 silicon without XAUI and L2 cache
function, then the board becomes p2040rdb board. so we use the file name
p2041_rdb.c to handle P2040RDB board and P2041RDB board which
The P4080 silicon device tree was using PowerPC,4080 while the other
e500mc based SoCs used PowerPC,e500mc. Use the core name to be
consistent going forward.
Signed-off-by: Kumar Gala
---
arch/powerpc/boot/dts/p4080si.dtsi | 16
1 files changed, 8 insertions(+), 8 deletions(-
On Sep 1, 2011, at 10:38 AM, Tudor Laurentiu wrote:
> On 9/1/2011 4:56 PM, Kumar Gala wrote:
>>
>> On Sep 1, 2011, at 3:31 AM, Tudor Laurentiu wrote:
>>
>>> On 9/1/2011 9:27 AM, Kumar Gala wrote:
On Aug 25, 2011, at 7:19 AM, Laurentiu Tudor wrote:
> Clearing the other TCR b
On 9/1/2011 4:56 PM, Kumar Gala wrote:
On Sep 1, 2011, at 3:31 AM, Tudor Laurentiu wrote:
On 9/1/2011 9:27 AM, Kumar Gala wrote:
On Aug 25, 2011, at 7:19 AM, Laurentiu Tudor wrote:
Clearing the other TCR bits might break code that sets them (e.g. to setup
the watchdog or fixed interval tim
On Sep 1, 2011, at 3:31 AM, Tudor Laurentiu wrote:
> On 9/1/2011 9:27 AM, Kumar Gala wrote:
>>
>> On Aug 25, 2011, at 7:19 AM, Laurentiu Tudor wrote:
>>
>>> Clearing the other TCR bits might break code that sets them (e.g. to setup
>>> the watchdog or fixed interval timer) before start_cpu_decr
On Thursday, September 01, 2011 5:52 AM
Liu Gang wrote:
> Subject: [PATCH] fsl-rio: Release rapidio port I/O region resource if
> portfailed to initialize
>
...
>
> Signed-off-by: Liu Gang
> ---
> arch/powerpc/sysdev/fsl_rio.c |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
>
The "struct rio_mport" contains a member of master port I/O memory resource
structure
"struct resource iores". This resource will be read from device tree and be
used for
rapidio R/W transaction memory space. Rapidio requests the port I/O memory
resource
under the root resource "iomem_resource".
于 2011年08月25日 19:25, Matthieu CASTET 写道:
Hi,
LiuShuo a écrit :
于 2011年08月23日 18:02, Matthieu CASTET 写道:
LiuShuo a écrit :
于 2011年08月19日 00:25, Scott Wood 写道:
On 08/17/2011 09:33 PM, b35...@freescale.com wrote:
From: Liu Shuo
Freescale FCM controller has a 2K size limitation of buffer RAM.
On Thursday 01 September 2011 16:02:06 Benjamin Herrenschmidt wrote:
> On Mon, 2011-06-27 at 23:45 +0200, Arnd Bergmann wrote:
> > This iotype is only used by the legacy_serial code in powerpc, so the
> > code should live there, rather than be compiled in for every 8250
> > driver.
>
> Obviously u
On 9/1/2011 9:27 AM, Kumar Gala wrote:
On Aug 25, 2011, at 7:19 AM, Laurentiu Tudor wrote:
Clearing the other TCR bits might break code that sets them (e.g. to setup
the watchdog or fixed interval timer) before start_cpu_decrementer() gets
called.
Can you be more specific about the case you'
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