On 09.07.2010, at 06:57, MJ embd wrote:
> On Thu, Jul 1, 2010 at 4:12 PM, Alexander Graf wrote:
>> On PPC we run PR=0 (kernel mode) code in PR=1 (user mode) and don't use the
>> hypervisor extensions.
>>
>> While that is all great to show that virtualization is possible, there are
>> quite some
They will fail to build due to the lack of mtmsrd, and wouldn't
be useful anyways
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/oprofile/Makefile |2 +-
arch/powerpc/oprofile/common.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/oprofile/Mak
Use the MMU config registers to scan for available direct and
indirect page sizes and print out the result. Will be needed
for future hugetlbfs implementation.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/mmu-book3e.h |4 +
arch/powerpc/include/asm/reg_booke.h |1 +
We patch the TLB miss exception vectors to point to alternate
functions when using HW page table on BookE.
However, we were patching in a new branch in the first instruction
of the exception handler instead of the second one, thus overriding
the nop that is in the first instruction.
This cause pr
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/xmon/xmon.c | 152 ++
1 files changed, 152 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 8bad7d5..0554445 100644
--- a/arch/powerpc/xmon/xmon
From: Michael Ellerman
If we are soft disabled and receive a doorbell exception we don't process
it immediately. This means we need to check on the way out of irq restore
if there are any doorbell exceptions to process.
The problem is at that point we don't know what our regs are, and that
in tu
We use a similar technique to ppc32: We set a thread local flag
to indicate that we are about to enter or have entered the stop
state, and have fixup code in the async interrupt entry code that
reacts to this flag to make us return to a different location
(sets NIP to LINK in our case).
Signed-off
Note that critical doorbells are an unimplemented stub just like
other critical or machine check handlers, since we haven't done
support for "levelled" exceptions yet.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/Makefile |1 +
arch/powerpc/kernel/exceptions-64e.S |
From: David Gibson
include/asm-generic/irq_regs.h declares per-cpu irq_regs variables and
get_irq_regs() and set_irq_regs() helper functions to maintain them.
These can be used to access the proper pt_regs structure related to the
current interrupt entry (if any).
In the powerpc arch code, this
The decrementer on BookE acts as a level interrupt and doesn't
need to be re-triggered when going negative. It doesn't go
negative anyways (unless programmed to auto-reload with a
negative value) as it stops when reaching 0.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/irq.c |
... where it belongs
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/dbell.c | 22 +-
arch/powerpc/kernel/traps.c | 21 -
2 files changed, 21 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/d
The doorbells use the content of the PIR register to match messages
from other CPUs. This may or may not be the same as our linux CPU
number, so using that as the "target" is no right.
Instead, we sample the PIR register at boot on every processor
and use that value subsequently when sending IPIs.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/reg.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index d62fdf4..d8be016 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/
Our handling of debug interrupts on Book3E 64-bit is not quite
the way it should be just yet. This is a workaround to let gdb
work at least for now. We ensure that when context switching,
we set the appropriate DBCR0 value for the new task. We also
make sure that we turn off MSR[DE] within the kern
Fix sizes of variables so correct values are exported via /proc.
Cast variable in comparison to avoid compiler error.
Signed-off-by: Matthew McClintock
---
arch/powerpc/kernel/crash_dump.c|4 ++--
arch/powerpc/kernel/machine_kexec.c | 10 +-
2 files changed, 7 insertions(+), 7
On Thu, Jul 1, 2010 at 4:12 PM, Alexander Graf wrote:
> On PPC we run PR=0 (kernel mode) code in PR=1 (user mode) and don't use the
> hypervisor extensions.
>
> While that is all great to show that virtualization is possible, there are
> quite some cases where the emulation overhead of privileged
On Thu, 2010-07-08 at 07:40 -0500, Kumar Gala wrote:
> On Jul 8, 2010, at 5:49 AM, Benjamin Herrenschmidt wrote:
>
> > On Thu, 2010-07-08 at 04:07 -0500, Milton Miller wrote:
> >> On Wed, 07 Jul 2010 around 10:51:20 - Matthew McClintock wrote:
> >>>
> >>> Fix sizes of variables so correct val
On Fri, 2010-07-09 at 15:18 -0500, Milton Miller wrote:
> > I don't disagree but this can break kexec if phys_addr_t != unsigned
> > long. Also, doesn't the crash kernel have to live below 2GB so
> unsigned
> > long is always fine?
>
>
> Its could only break kexec for the case of phys_addr_t != u
This patch adds the quirk for PCIE controller found on Freescale MPC8308.
The quirk is the same as for other MPC83xx processors.
Signed-off-by: Ilya Yanok
---
arch/powerpc/sysdev/fsl_pci.c |1 +
include/linux/pci_ids.h |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --
These two patches add support for MPC8308RDB development board from Freescale.
Supported hardware:
DUART
Dual Ethernet
NOR and NAND flashes
I2C
USB device
PCIE (MSI support is broken by commit 3da34aa)
Signed-off-by: Ilya Yanok
___
Linuxppc-dev m
On Thu, 08 Jul 2010 around 09:27:15 -0500 Matthew McClintock wrote:
> On Thu, 2010-07-08 at 04:07 -0500, Milton Miller wrote:
> > On Wed, 07 Jul 2010 around 10:51:20 - Matthew McClintock wrote:
...
> > > Fix sizes of variables so correct values are exported via /proc.
> > > Cast variable in co
Hi Kumar, All,
I've found that MSI work correctly with older kernels on my MPC8308RDB
board and don't work with newer ones. After bisecting I've found that
the source of the problem is commit 3da34aa:
commit 3da34aae03d498ee62f75aa7467de93cce3030fd
Author: Kumar Gala
Date: Tue May 12 15:51
This patch adds support for MPC8308RDB development board from
Freescale.
Supported devices:
DUART
Dual Ethernet
NOR and NAND flashes
I2C
USB in peripheral mode
PCIE support is broken by the commit 3da34aa ("powerpc/fsl: Support
unique MSI addresses per PCIe Root Complex"). Works after revert.
Am 08.07.10 21:30 schrieb(en) Segher Boessenkool:
Actually, this is something which might need closer attention - and maybe some
support in the device tree indicating which read or write width a device can
accept?
There already is "device-width"; the drivers never should use any other access
On Thu, 8 Jul 2010 21:30:33 +0200
Segher Boessenkool wrote:
> > Actually, this is something which might need closer attention -
> > and maybe some support in the device tree indicating which read or
> > write width a device can accept?
>
> There already is "device-width"; the drivers never sho
On Thu, Jul 8, 2010 at 2:24 PM, Josh Boyer wrote:
> On Thu, Jul 08, 2010 at 11:01:11AM -0500, Lee Nipper wrote:
>>On Thu, Jul 8, 2010 at 10:06, Marc Chidester wrote:
>>> It looks like the Rev D version of the 405EX chip without security
>>> will be identified as a 405EXr, based on the values in t
Actually, this is something which might need closer attention - and
maybe some support in the device tree indicating which read or
write width a device can accept?
There already is "device-width"; the drivers never should use any other
access width unless they *know* that will work.
Segher
On Thu, Jul 8, 2010 at 13:22, Josh Boyer wrote:
> On Thu, Jul 08, 2010 at 12:59:29PM -0500, Lee Nipper wrote:
>>On Thu, Jul 8, 2010 at 10:06, Marc Chidester wrote:
>>
>>> Is there an algorithm update needed or am I missing something?
>>
>>Perhaps add more cpu_spec table entries for the 405EX & 40
On Thu, Jul 8, 2010 at 13:24, Josh Boyer wrote:
> On Thu, Jul 08, 2010 at 11:01:11AM -0500, Lee Nipper wrote:
>>On Thu, Jul 8, 2010 at 10:06, Marc Chidester wrote:
>>> It looks like the Rev D version of the 405EX chip without security
>>> will be identified as a 405EXr, based on the values in the
Am 08.07.10 17:22 schrieb(en) Grant Likely:
Just out of curiousity, what configuration might cause a byte-wise alignment
not to work?
Can't remember the register configuration, but I worked on one project where
this was the case. In hindsight, it was probably a mis-configuration of the
loca
On Thu, Jul 08, 2010 at 11:01:11AM -0500, Lee Nipper wrote:
>On Thu, Jul 8, 2010 at 10:06, Marc Chidester wrote:
>> It looks like the Rev D version of the 405EX chip without security
>> will be identified as a 405EXr, based on the values in the cpu_specs
>> table. For 405EX/405EXr the pvr_mask is
On Thu, Jul 08, 2010 at 12:59:29PM -0500, Lee Nipper wrote:
>On Thu, Jul 8, 2010 at 10:06, Marc Chidester wrote:
>> It looks like the Rev D version of the 405EX chip without security
>> will be identified as a 405EXr, based on the values in the cpu_specs
>> table.
>
>Yes, that is the case.
>The 40
On Thu, Jul 8, 2010 at 10:06, Marc Chidester wrote:
> It looks like the Rev D version of the 405EX chip without security
> will be identified as a 405EXr, based on the values in the cpu_specs
> table.
Yes, that is the case.
The 405EX Rev D without security PVR matches an old 405EXr A/B with secur
This saves runtime memory and fixes lots of sparse warnings like this:
CHECK arch/powerpc/sysdev/micropatch.c
arch/powerpc/sysdev/micropatch.c:27:6: warning: symbol 'patch_2000'
was not declared. Should it be static?
arch/powerpc/sysdev/micropatch.c:146:6: warning: symbol 'patch_2f00'
Warnings are treated as errors for arch/powerpc code, so build fails
with CONFIG_I2C_SPI_UCODE_PATCH=y:
CC arch/powerpc/sysdev/micropatch.o
cc1: warnings being treated as errors
arch/powerpc/sysdev/micropatch.c: In function 'cpm_load_patch':
arch/powerpc/sysdev/micropatch.c:630: war
spi_t was removed in commit 644b2a680ccc51a9ec4d6beb12e9d47d2dee98e2
("powerpc/cpm: Remove SPI defines and spi structs"), the commit assumed
that spi_t isn't used anywhere outside of the spi_mpc8xxx driver. But
it appears that the struct is needed for micropatch code. So, let's
reintroduce the stru
On Tue, Jul 06, 2010 at 10:03:43AM +1000, Tony Breeds wrote:
> On Mon, Jul 05, 2010 at 09:45:11AM +0200, LEROY Christophe wrote:
> > When activating micropatch option, the kernel does not compile.
>
> powerpc problems should alos CC linuxppc-dev.
>
> > It looks like a spi_t is not defined anywhe
On Thu, Jul 8, 2010 at 10:06, Marc Chidester wrote:
> It looks like the Rev D version of the 405EX chip without security
> will be identified as a 405EXr, based on the values in the cpu_specs
> table. For 405EX/405EXr the pvr_mask is 0x0004 with the
> pvr_value's as 0x12910004 and 0x1291
On Thu, Jul 8, 2010 at 8:38 AM, Steve Deiters wrote:
>> -Original Message-
>> From: glik...@secretlab.ca [mailto:glik...@secretlab.ca] On
>> Behalf Of Grant Likely
>> Sent: Thursday, July 08, 2010 12:38 AM
>> To: Benjamin Herrenschmidt
>> Cc: Steve Deiters; linuxppc-dev@lists.ozlabs.org
>>
It looks like the Rev D version of the 405EX chip without security
will be identified as a 405EXr, based on the values in the cpu_specs
table. For 405EX/405EXr the pvr_mask is 0x0004 with the
pvr_value's as 0x12910004 and 0x1291 respectively. I see that the
Rev D PVR value for the 405EX w
Hello,
I'm looking for an HDLC driver for the SCCs in MPC885 CPM.
Does anybody know where I could find such a driver for kernel 2.6.xx ?
Best regards
Christophe
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listi
> -Original Message-
> From: glik...@secretlab.ca [mailto:glik...@secretlab.ca] On
> Behalf Of Grant Likely
> Sent: Thursday, July 08, 2010 12:38 AM
> To: Benjamin Herrenschmidt
> Cc: Steve Deiters; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] arch/powerpc/lib/copy_32.S: Use
> alt
On Thu, 2010-07-08 at 04:07 -0500, Milton Miller wrote:
> On Wed, 07 Jul 2010 around 10:51:20 - Matthew McClintock wrote:
> >
> > Fix sizes of variables so correct values are exported via /proc.
> > Cast variable in comparison to avoid compiler error.
> >
> > Signed-off-by: Matthew McClintock
The default for llseek is changing, so we need
explicit operations everywhere.
Signed-off-by: Arnd Bergmann
Cc: Jeremy Kerr
Cc: linuxppc-...@ozlabs.org
---
Same as previous version, but no longer breaking the existing llseek
operation in spufs_*box_info_fops. Pushed out to my bkl/llseek branch.
On Thursday 08 July 2010, Jeremy Kerr wrote:
> > @@ -2151,7 +2166,7 @@ static ssize_t spufs_ibox_info_read(struct file
> > *file, char __user *buf,
> > static const struct file_operations spufs_ibox_info_fops = {
> > .open = spufs_info_open,
> > .read = spufs_ibox_info_read,
> > -
On Jul 8, 2010, at 5:49 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2010-07-08 at 04:07 -0500, Milton Miller wrote:
>> On Wed, 07 Jul 2010 around 10:51:20 - Matthew McClintock wrote:
>>>
>>> Fix sizes of variables so correct values are exported via /proc.
>>> Cast variable in comparison to a
On Thu, 2010-07-08 at 04:07 -0500, Milton Miller wrote:
> On Wed, 07 Jul 2010 around 10:51:20 - Matthew McClintock wrote:
> >
> > Fix sizes of variables so correct values are exported via /proc.
> > Cast variable in comparison to avoid compiler error.
> >
I'm afraid I already pulled that in.
On Thu, 2010-07-08 at 11:01 +0200, lawrence rust wrote:
> On Thu, 2010-07-08 at 16:30 +1000, Benjamin Herrenschmidt wrote:
> > On Thu, 2010-07-08 at 08:18 +0200, lawrence rust wrote:
> > >
> > > Sure. it would be preferable but unfortunately the PowerMac on-board IDE
> > > controller (CONFIG_BLK_D
On Wed, 07 Jul 2010 around 10:51:20 - Matthew McClintock wrote:
>
> Fix sizes of variables so correct values are exported via /proc.
> Cast variable in comparison to avoid compiler error.
>
> Signed-off-by: Matthew McClintock
>
>
> - csize = min(csize, PAGE_SIZE);
> + csize = min(
On Thu, 2010-07-08 at 16:30 +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2010-07-08 at 08:18 +0200, lawrence rust wrote:
> >
> > Sure. it would be preferable but unfortunately the PowerMac on-board IDE
> > controller (CONFIG_BLK_DEV_IDE_PMAC), used for the DVD drive on B/W
> > G3's, doesn't have
Hi Linus !
Here are a few powerpc nits and bits still for 2.6.35. Mostly simple/trivial
stuff and some gcc-4.5 related fixes.
Thanks !
Cheers,
Ben.
The following changes since commit 2aa72f612144a0a7d4b0b22ae7c122692ac6a013:
Linus Torvalds (1):
Merge git://git.kernel.org/.../davem/net
With dynamic PACAs, the kexecing CPU's PACA won't lie within the kernel
static data and there is a chance that something may stomp it when preparing
to kexec. This patch switches this final CPU to a static PACA just before
we pull the switch.
Signed-off-by: Matt Evans
---
v2: Changes from Mi
52 matches
Mail list logo