> -Original Message-
> From: Anton Vorontsov [mailto:[EMAIL PROTECTED]
> Sent: Monday, September 01, 2008 9:35 PM
> To: Kumar Gala
> Cc: linuxppc-dev@ozlabs.org; Li Yang-R58472
> Subject: [RFC PATCH 2/2 v2] powerpc/83xx: mpc836x_mds: add
> support for USBHost
>
> Various changes to suppo
Hello Vitaly,
I tried to use the mii-bitbang driver (drivers/net/fs_enet/mii-bitbang.c)
as a module and got the following error, when inserting it with insmod:
~ # insmod fs_enet
eth0: fs_enet: a6:07:11:7f:de:26
~ # insmod mii-bitbang
mii_bitbang: module license 'unspecified' taints kernel.
mii_b
Hi,
I've been trying to hook an IRQ on a modified mpc8349emitx board without
success.
The IRQ is hooked physically to IRQ1/GPIO2[13] on the mpc8349e. No other
devices are
tied to this pin.
I'm using uboot 1.2.0 and kernel 2.6.22.19.
Do I need to have a dts entry for this interrupt in order
On Wed, 2008-09-03 at 15:41 +0200, Sebastien Dugue wrote:
> On Wed, 20 Aug 2008 15:23:01 +1000 Benjamin Herrenschmidt <[EMAIL PROTECTED]>
> wrote:
>
> > BTW. It would be good to try to turn the GFP_ATOMIC into GFP_KERNEL,
>
> That would be nice indeed
>
> > maybe using a semaphore instead of
> > The things that truly aren't clear are the various lists.
> > For example, how does "interrupt-map" and "interrupts" describe
> > how the interrupts are handled?
>
> It is described in this document:
> http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf
And in Documentati
On Wed, 2008-09-03 at 13:09 -0500, Kumar Gala wrote:
> Implement _PAGE_SPECIAL and pte_special() for 32-bit powerpc. This bit will
> be used by the fast get_user_pages() to differenciate PTEs that correspond
> to a valid struct page from special mappings that don't such as IO mappings
> obtained vi
> FIND_PTE
> andc. r13,r13,r11 /* Check permission */
> - bne 2f /* Bail if permission mismach */
>
> #ifdef CONFIG_PTE_64BIT
> - lwz r13, 0(r12)
> +#ifdef CONFIG_SMP
> + subfr10, r11, r12 /* create false data dep
On Wed, 2008-09-03 at 13:09 -0500, Kumar Gala wrote:
> There are some minor issues with support 64-bit PTEs on a 32-bit processor
> when dealing with SMP.
>
> * We need to order the stores in set_pte_at to make sure the flag word
> is set second.
> * Change pte_clear to use pte_update so only th
On Fri, 2008-08-29 at 08:56 -0500, Kumar Gala wrote:
> #if defined(CONFIG_40x) || defined(CONFIG_8xx)
> #define _tlbia() asm volatile ("tlbia; sync" : : : "memory")
> @@ -38,31 +41,31 @@ extern void _tlbia(void);
>
> static inline void flush_tlb_mm(struct mm_struct *mm)
> {
> - _tlbi
On Wed, 2008-09-03 at 23:02 +0200, Sébastien Chrétien wrote:
> irq_of_parse_and_map is equivalent to ioremap in the MMU case ?
On the powerpc architecture, we use virtualized IRQ numbers in order to
deal with the wide range of interrupt controllers around and multiple
of them cascaded.
The base
On Wed, 2008-09-03 at 10:10 -0500, Becky Bruce wrote:
> Actually, PTE_SIZE is already defined in hash_low_32.S, and it's the
> size of the HPTE. I'll rename that to HPTE_SIZE and use PTE_SIZE for
> the linux PTE.
Good idea. Thanks.
Cheers,
Ben.
prodyut hazarika writes:
> glibc memxxx for powerpc are horribly inefficient. For optimal performance,
> we should should dcbt instruction to establish the source address in cache,
> and
> dcbz to establish the destination address in cache. We should do
> dcbt and dcbz such that the touches happe
On Wed, 2008-09-03 at 17:01 -0700, Linus Torvalds wrote:
>
> On Wed, 3 Sep 2008, James Bottomley wrote:
> >
> > Oh ... because Arjan has a patch to export
> > dereference_function_descriptor. I suppose I could make him do the
> > heavy lifting, but it seemed sensible to make it easy for him (and
Linus,
Please pull from the 'merge' branch of
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git merge
to get 6 commits that fix various regressions, build problems and
serious bugs on powerpc. I have included the full commit messages
below.
Thanks,
Paul.
arch/powerpc/Makefile
On Wed, 3 Sep 2008, James Bottomley wrote:
>
> Oh ... because Arjan has a patch to export
> dereference_function_descriptor. I suppose I could make him do the
> heavy lifting, but it seemed sensible to make it easy for him (and me)
> by putting it in a header.
>
> http://marc.info/?l=linux-ker
On Wed, 2008-09-03 at 16:15 -0700, Linus Torvalds wrote:
>
> On Wed, 3 Sep 2008, James Bottomley wrote:
> >
> > You want me to pull the elf header files into lib/vsprintf.c and have
> > something like
>
> No.
>
> I want you to stop polluting with total and utter crap.
>
> Please tell my WHY t
Martyn Welch wrote:
On Fri, 29 Aug 2008 07:04:18 -0500
Kumar Gala <[EMAIL PROTECTED]> wrote:
On Aug 26, 2008, at 8:13 AM, Martyn Welch wrote:
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = "cpu";
+ reg = <0x>;
+
On Wed, 3 Sep 2008, James Bottomley wrote:
>
> You want me to pull the elf header files into lib/vsprintf.c and have
> something like
No.
I want you to stop polluting with total and utter crap.
Please tell my WHY the hell you have
diff --git a/include/linux/module.h b/include/linux/
On Wed, 2008-09-03 at 15:54 -0700, Linus Torvalds wrote:
> > Anyway, it's easy to do (if a slightly larger diff) ... I have to move
> > the prototype from include/kernel.h to include/module.h because I need
> > an assured asm/xxx include before it to get the override.
>
> I don't really see what t
On Wed, 3 Sep 2008, James Bottomley wrote:
>
> Is that finally final? because the last time I tried to do the above
> for a voyager override I was told weak functions were the preferred
> method ...
Weak functions are fine IF THEY DO SOMETHING REAL AND SHOULD BE FUNCTIONS
IN THE FIRST PLACE!
On Wed, 2008-09-03 at 14:22 -0700, Linus Torvalds wrote:
>
> On Wed, 3 Sep 2008, James Bottomley wrote:
> >
> > Make dereference_function_descriptor() more accommodating by allowing
> > architecture overrides.
>
> Don't do it like this.
>
> We don't want some stupid useless weak function that i
David Gibson wrote:
> On Tue, Sep 02, 2008 at 12:12:27PM -0500, Jon Tollefson wrote:
>
>> David Gibson wrote:
>>
>>> When BenH and I were looking at the new code for handling 16G pages,
>>> we noticed a small bug. It doesn't actually break anything user
>>> visible, but it's certainly not
I am trying to accomplish the following:
1) load base address of paca into a register
2) and value of a global variable that I have defined in another file, I have
called it mitesh0_prio, this value is not a constant and can be changed by the
user at runtime via the proc interface.
I hav
On Wed, 3 Sep 2008, James Bottomley wrote:
>
> Make dereference_function_descriptor() more accommodating by allowing
> architecture overrides.
Don't do it like this.
We don't want some stupid useless weak function that is empty on all sane
platforms.
Just do
.. declare or create an
Sébastien Chrétien wrote:
irq_of_parse_and_map is equivalent to ioremap in the MMU case ?
It's more analogous to of_iomap().
-Scott
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irq_of_parse_and_map is equivalent to ioremap in the MMU case ?
Scott Wood a écrit :
On Wed, Sep 03, 2008 at 06:36:39PM +0200, Sébastien Chrétien wrote:
Ok I will try irq_create_mapping tomorrow.
When have I to use this function ?
You always need to create a mapping (though doing it w
Hi all,
> These could probably go to glibc
> as new general purpose memxxx() routines. You will probably see
> a big increase once dcbz is added to the copy/memset functions.
glibc memxxx for powerpc are horribly inefficient. For optimal performance,
we should should dcbt instruction to establis
It was introduced by
commit 0fe1ef24f7bd0020f29ffe287dfdb9ead33ca0b2
Author: Linus Torvalds <[EMAIL PROTECTED]>
Date: Sun Jul 6 16:43:12 2008 -0700
vsprintf: add support for '%pS' and '%pF' pointer formats
However, the current way its coded doesn't work on parisc64. For two
reasons: 1)
This is just a parallel of a5dc66e2ab2e2cf641346b056a69a67cfcf9458c
applied to the sbc8560 board.
Signed-off-by: Paul Gortmaker <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/85xx/sbc8560.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/sbc85
On Sep 3, 2008, at 11:12 AM, Scott Wood wrote:
On Fri, Aug 29, 2008 at 08:56:50AM -0500, Kumar Gala wrote:
+_GLOBAL(_tlbil_all)
+#define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
+MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
+ li r3,(MMUCSR0_TLBFI)@l
+ mt
Implement _PAGE_SPECIAL and pte_special() for 32-bit powerpc. This bit will
be used by the fast get_user_pages() to differenciate PTEs that correspond
to a valid struct page from special mappings that don't such as IO mappings
obtained via io_remap_pfn_ranges().
We currently only implement this on
We need to create a false data dependency to ensure the loads of
the pte are done in the right order.
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/head_fsl_booke.S | 24
1 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/arch/powerp
There are some minor issues with support 64-bit PTEs on a 32-bit processor
when dealing with SMP.
* We need to order the stores in set_pte_at to make sure the flag word
is set second.
* Change pte_clear to use pte_update so only the flag word is cleared
Signed-off-by: Kumar Gala <[EMAIL PROTECT
Introduced a new set of low level tlb invalidate functions that do not
broadcast invalidates on the bus:
_tlbil_all - invalidate all
_tlbil_pid - invalidate based on process id (or mm context)
_tlbil_va - invalidate based on virtual address (ea + pid)
On non-SMP configs _tlbil_all should be func
On Aug 29, 2008, at 8:56 AM, Kumar Gala wrote:
There are some minor issues with support 64-bit PTEs on a 32-bit
processor
when dealing with SMP.
* We need to order the stores in set_pte_at to make sure the flag word
is set second.
* Change pte_clear to use pte_update so only the flag word i
On Wed, Sep 03, 2008 at 05:50:10PM +1000, Janaka Subhawickrama wrote:
> My DTS file entries for PCI are as follows:
>
> [EMAIL PROTECTED] {
> interrupt-map-mask = < // Mask the child UnitIrqSpec
> //ff00 0 0 7
>
On Wed, Sep 03, 2008 at 07:36:00AM -0600, Gary Thomas wrote:
> [EMAIL PROTECTED] {
> #interrupt-cells = <1>;
> #size-cells = <2>;
> #address-cells = <3>;
> device_type = "pci";
> compatible = "fsl,mpc5200-pci";
On Wed, Sep 03, 2008 at 06:36:39PM +0200, Sébastien Chrétien wrote:
> Ok I will try irq_create_mapping tomorrow.
> When have I to use this function ?
You always need to create a mapping (though doing it with
irq_of_parse_and_map is preferred). request_irq() takes virtual IRQ
numbers, not hardware
Ok I will try irq_create_mapping tomorrow.
When have I to use this function ?
I am using a MPC7448.
M B a écrit :
Hi,
this seems to be the same problem I had, when registering an irq with UIO.
On Wed, Sep 3, 2008 at 5:03 PM, Sébastien Chrétien
<[EMAIL PROTECTED]> wrote:
The failure referes
On Fri, Aug 29, 2008 at 08:56:50AM -0500, Kumar Gala wrote:
> +_GLOBAL(_tlbil_all)
> +#define MMUCSR0_TLBFI(MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
> + MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
> + li r3,(MMUCSR0_TLBFI)@l
> + mtspr SPRN_MMUCSR0, r3
> +1:
> + mfspr
Hi,
this seems to be the same problem I had, when registering an irq with UIO.
On Wed, Sep 3, 2008 at 5:03 PM, Sébastien Chrétien
<[EMAIL PROTECTED]> wrote:
> The failure referes to setup_irq :
> desc->chip == &no_irq_chip is true
>
> What is irq_desc and how can I initialize it ?
I did use irq_
The problem:
The system clock under QEMU (PREP architecture) increments at four
times the correct wall clock rate.
Comments:
prep_calibrate_decr() hardcoded the divisor for the timebase to be
'4'. This value should be read from the residual data that is provided
by PREP at boot. QEMU fo
It's the size of the hardware PTE; make that clear in the name.
Signed-off-by: Becky Bruce <[EMAIL PROTECTED]>
---
arch/powerpc/mm/hash_low_32.S | 36 ++--
1 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/power
On Sep 2, 2008, at 4:21 PM, Benjamin Herrenschmidt wrote:
The reason I did that was to distinguish between the size of a
software PTE entry, and the actual size of the hardware entry. In
the
case of 36b physical, the hardware PTE size is the same as it always
is; but we've grown the Linux
The failure referes to setup_irq :
desc->chip == &no_irq_chip is true
What is irq_desc and how can I initialize it ?
setup_irq(unsigned int irq, struct irqaction *new)
{
struct irq_desc *desc = irq_desc + irq;
struct irqaction *old, **p;
const char *old_name = NULL;
unsigned long
Try to set some flag into the third parameter of the request_irq()
function like:
SA_SHIRQInterrupt is shared
SA_INTERRUPTDisable local interrupts while processing
SA_SAMPLE_RANDOMThe interrupt can be used for entropy
otherwise try to use the function install
Hello,
I am trying to register a function writh IRQ :
static irqreturn_t uart_test (int irq , void *dev_id)
{
printk("/!\\ Interruption : tx_empty\n");
return IRQ_HANDLED;
}
req=request_irq(0x18,uart_test,NULL,"uart_test",NULL);
printk("Initialisation IRQ UART : %d \n", req);
Benjamin Herrenschmidt wrote:
> On Tue, 2008-09-02 at 17:16 -0500, Jon Tollefson wrote:
>
>> Benjamin Herrenschmidt wrote:
>>
Actually, Jon has been hitting an occasional pagetable lock related
problem. The last theory was that it might be some sort of race but it's
vaguely p
roel kluin wrote:
MAL[12]_IER_EVENTS definitions have MAL_IER_OTE twice
but lack MAL_IER_DE
Signed-off-by: Roel Kluin <[EMAIL PROTECTED]>
---
drivers/net/ibm_newemac/mal.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ibm_newemac/mal.h b/drivers/net/ibm
I'm having a bit of bother with mounting a CF card using a promise
pdc20275 with an 8347.
I've finally got my address mapping sorted out, and it all seems to work
in principle.
I wait until a CF card is inserted, then load the pdc2027x.ko module,
then mount the card.
The module load, however, ta
This gets rid of a big mv643xx_eth annoyance of mine where the driver
exports the offsets of some of its internal registers via a header
file, and the Pegasos platform code ioremaps the peripheral directly
and pokes into peripheral registers directly without involving the
driver at all.
I don't ha
Hello all,
I can't fully understand the differences in what should be simple I/O
read/writes.
If I write a standalone program using the Xilinx API calls, I have access to
the following functions to control the direction of GPIO bits. For instance:
XGpio Input, Output;
XGpio_Initialize(&Input
On Wed, 20 Aug 2008 15:23:01 +1000 Benjamin Herrenschmidt <[EMAIL PROTECTED]>
wrote:
> BTW. It would be good to try to turn the GFP_ATOMIC into GFP_KERNEL,
That would be nice indeed
> maybe using a semaphore instead of a lock to protect insertion vs.
> initialisation.
a semaphore? are you
Thanks for the pointer to the DTC/DTS documents. These
help, but I still have many questions and am unsure how
to solve some problems.
Most particularly, I have a number of platforms with
"extended" interrupts. In these cases, I have an FPGA
which is used as an interrupt controller, multiplexin
On Wed, 20 Aug 2008 15:22:06 +1000 Benjamin Herrenschmidt <[EMAIL PROTECTED]>
wrote:
> On Wed, 2008-08-06 at 15:30 +0200, Sebastien Dugue wrote:
> > The radix trees used by interrupt controllers for their irq reverse mapping
> > (currently only the XICS found on pSeries) have a complex locking sc
Hi Benjamin,
sorry for the (long) delay, just came back from vacation.
On Wed, 20 Aug 2008 15:21:24 +1000 Benjamin Herrenschmidt <[EMAIL PROTECTED]>
wrote:
> On Wed, 2008-08-06 at 15:30 +0200, Sebastien Dugue wrote:
> > irq_radix_revmap() currently serves 2 purposes, irq mapping lookup
> >
Hi all,
I am trying to setup the PCI on a Flattened Device Tree (DTS file) for a
Microsys MPX8349 board. I have the PCI outbound windows setup as follows:
0xA000 of size 0x2000, none pre-fechable PCI memory
window
0xD800 of size 0x0100, PCI IO win
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