On Wed, Sep 03, 2008 at 05:50:10PM +1000, Janaka Subhawickrama wrote:
> My DTS file entries for PCI are as follows:
> 
> [EMAIL PROTECTED] {
>                         interrupt-map-mask = <  // Mask the child UnitIrqSpec
>                                                 //ff00 0 0 7
>                                                 ffff ff ff f
>                                                 >;
>                         interrupt-map = <
>                                         // Child UnitIrqSpec, Parent PIC 
> handle, Parent UnitIrqSpec
>                                         // PCI unit address (0000 0 0), 
> Interrupt specifier IDSEL 0x0D (CRX board hard wired to IDSEL 13),
>                                         //      parent Phandle, IRQ7=0x17 
> (jumper based) level sensitive(8)
>                                         //0d00 0 0 1 &ipic 17 8
>                                         00006800 0 0 1 &ipic 17 8
>                                         >;
>                         interrupt-parent = < &ipic >;
>                         interrupts = <42 8>;            //PCI1 interrupt, 
> level sensitive
>                         bus-range = <0 0>;              //Bus number and 
> largest bus under this
>                         /*
>                                 struct ranges_pci {
>                                         unsigned int pci_space; 
> //Prefechable/relocatable .... IEEE1275
>                                         u64 pci_addr;
>                                         phys_addr_t phys_addr;
>                                         u64 size;
>                                 };
>                         */
>                         ranges = < 02000000 0 A0000000 A0000000 0 20000000
>                                    01000000 0 D8000000 D8000000 0 01000000 >;
>                         clock-frequency = <1FCA055>;    //33333333Hz
>                         #interrupt-cells = <1>;         //PCI aparently uses 1
>                         #size-cells = <2>;              //Max of 2 ints
>                         #address-cells = <3>;           //int size
>                         reg = <8500 100>; //??
>                         compatible = "fsl,mpc8349-pci";
>                         device_type = "pci";
>                 };
> 
> 
> What am I doing wrong ?

The PCI node needs to go under the root node, rather than under the soc
node.  Otherwise, the kernel will try to translate ranges through the IMMR
window.  In older kernels, there was a bug in the PCI code that let you get
away with this.

See current in-kernel device trees for examples.

-Scott
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