Re: [kvm-unit-tests PATCH v3 1/2] lib: Add STR_IS_Y and STR_IS_N for checking env vars

2025-07-09 Thread Andrew Jones
> s = getenv(erratum); > > - return !(s && (*s == '0' || *s == 'n' || *s == 'N')); > + return !STR_IS_N(s); > } > > #endif > diff --git a/riscv/sbi-tests.h b/riscv/sbi-tests.h > index c1ebf016..4e051dca 100644 > --- a/riscv/sbi-tests.h > +++ b/riscv/sbi-tests.h > @@ -37,6 +37,7 @@ > > #ifndef __ASSEMBLER__ > #include > +#include > #include > > #define __sbiret_report(kfail, ret, expected_error, expected_value, > \ > @@ -94,7 +95,7 @@ static inline bool env_enabled(const char *env) > { > char *s = getenv(env); > > - return s && (*s == '1' || *s == 'y' || *s == 'Y'); > + return STR_IS_Y(s); > } > > void split_phys_addr(phys_addr_t paddr, unsigned long *hi, unsigned long > *lo); > -- > 2.43.0 Reviewed-by: Andrew Jones

Re: [kvm-unit-tests PATCH v2 2/2] riscv: lib: Add sbi-exit-code to configure and environment

2025-07-09 Thread Andrew Jones
echo "#define CONFIG_SBI_CONSOLE" >> > lib/config.h > +echo "#define CONFIG_SBI_EXIT_CODE ${sbi_exit_code}" >> lib/config.h > echo >> lib/config.h > fi > echo "#endif" >> lib/config.h > diff --git a/lib/riscv/io.c

Re: [kvm-unit-tests PATCH v2 1/2] lib: Add STR_IS_Y and STR_IS_N for checking env vars

2025-07-09 Thread Andrew Jones
On Tue, Jul 08, 2025 at 08:48:10AM -0700, Jesse Taube wrote: > the line: > (s && (*s == '1' || *s == 'y' || *s == 'Y')) > is used in a few places add a macro for it and it's 'n' counterpart. > > Add GET_CONFIG_OR_ENV for CONFIG values which can be overridden by > the environment. > > Signed-off-b

Re: [kvm-unit-tests PATCH v2 1/2] lib: Add STR_IS_Y and STR_IS_N for checking env vars

2025-07-09 Thread Andrew Jones
cv/sbi-tests.h > index c1ebf016..4e051dca 100644 > --- a/riscv/sbi-tests.h > +++ b/riscv/sbi-tests.h > @@ -37,6 +37,7 @@ > > #ifndef __ASSEMBLER__ > #include > +#include > #include > > #define __sbiret_report(kfail, ret, expected_error, expected_value, > \ > @@ -94,7 +95,7 @@ static inline bool env_enabled(const char *env) > { > char *s = getenv(env); > > - return s && (*s == '1' || *s == 'y' || *s == 'Y'); > + return STR_IS_Y(s); > } > > void split_phys_addr(phys_addr_t paddr, unsigned long *hi, unsigned long > *lo); > -- > 2.43.0 > Besides the typo, LGTM Reviewed-by: Andrew Jones

Re: [kvm-unit-tests PATCH] riscv: lib: Add sbi-exit-code to configure and environment

2025-07-07 Thread Andrew Jones
On Mon, Jul 07, 2025 at 08:57:37AM -0700, Jesse Taube wrote: > On Fri, Jul 4, 2025 at 1:17 AM Andrew Jones wrote: > > > > On Thu, Jul 03, 2025 at 06:36:00AM -0700, Jesse Taube wrote: > > > Add --[enable|disable]-sbi-exit-code to configure script. > > > With the de

Re: [kvm-unit-tests PATCH] riscv: Use norvc over arch, -c

2025-07-04 Thread Andrew Jones
On Thu, Jul 03, 2025 at 06:58:37PM -0700, Jesse Taube wrote: > The Linux kernel main tree uses "norvc" over > "arch, -c" change to match this. > > GCC 15 started to add _zca_zcd to the assembler flags causing a bug > which made "arch, -c" generate a compressed instruction. > > Link: https://sourc

Re: [kvm-unit-tests PATCH] riscv: lib: Add sbi-exit-code to configure and environment

2025-07-04 Thread Andrew Jones
On Thu, Jul 03, 2025 at 06:36:00AM -0700, Jesse Taube wrote: > Add --[enable|disable]-sbi-exit-code to configure script. > With the default value disabled. > Add a check for SBI_PASS_EXIT_CODE in the environment, so that passing > of the test status is configurable from both the > environment and t

Re: [kvm-unit-tests PATCH v3 1/2] riscv: Add RV_INSN_LEN to processor.h

2025-07-02 Thread Andrew Jones
On Thu, Jun 05, 2025 at 09:18:05AM -0700, Jesse Taube wrote: > When handeling traps and faults it is offten necessary to know the size > of the instruction at epc. Add RV_INSN_LEN to calculate the > instruction size. > > Signed-off-by: Jesse Taube > --- > lib/riscv/asm/processor.h | 2 ++ > 1 fi

Re: [kvm-unit-tests PATCH v2] riscv: Allow SBI_CONSOLE with no uart in device tree

2025-07-02 Thread Andrew Jones
On Fri, Jun 13, 2025 at 08:03:13AM -0700, Jesse Taube wrote: > When CONFIG_SBI_CONSOLE is enabled and there is no uart defined in the > device tree kvm-unit-tests fails to start. > > Only abort when uart is not found in device tree if SBI_CONSOLE is false > > Signed-off-by: Jesse Taube > --- >

Re: [kvm-unit-tests PATCH v2] riscv: lib: sbi_shutdown add pass/fail exit code.

2025-07-02 Thread Andrew Jones
On Tue, Jun 24, 2025 at 12:23:17PM -0700, Jesse Taube wrote: > When exiting it may be useful for the sbi implementation to know if > kvm-unit-tests passed or failed. > Add exit code to sbi_shutdown, and use it in exit() to pass > success/failure (0/1) to sbi. > > Signed-off-by: Jesse Taube > ---

Re: [kvm-unit-tests PATCH v8] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-07-02 Thread Andrew Jones
On Tue, Jul 01, 2025 at 01:00:47PM -0700, Jesse Taube wrote: > Add tests for the DBTR SBI extension. > > Signed-off-by: Jesse Taube > Reviewed-by: Charlie Jenkins > Tested-by: Charlie Jenkins Merged. Thanks

Re: [kvm-unit-tests PATCH v8] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-07-02 Thread Andrew Jones
On Tue, Jul 01, 2025 at 01:00:47PM -0700, Jesse Taube wrote: > +#define SBI_DBTR_TDATA1_TYPE_SHIFT (__riscv_xlen - 4) I just double checked and see that this shift is 4 less than xlen, so... > +enum McontrolType { > + SBI_DBTR_TDATA1_TYPE_NONE = (0UL << > SBI_DBTR_TDATA

Re: [kvm-unit-tests PATCH v7] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-07-01 Thread Andrew Jones
On Mon, Jun 30, 2025 at 03:32:23PM -0700, Jesse Taube wrote: ... > +static unsigned long gen_tdata1(enum McontrolType type, enum Tdata1Value > value, enum Tdata1Mode mode) > +{ > + switch (type) { > + case SBI_DBTR_TDATA1_TYPE_MCONTROL: > + return gen_tdata1_mcontrol(mode, valu

Re: [kvm-unit-tests PATCH v6] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-06-28 Thread Andrew Jones
On Fri, Jun 27, 2025 at 12:06:02PM -0700, Jesse Taube wrote: > On Fri, Jun 27, 2025 at 6:02 AM Andrew Jones wrote: > > > > On Wed, Jun 18, 2025 at 08:44:52AM -0700, Jesse Taube wrote: ... > > > + report(shmem->data.tdata1 == tdata1, "tdata1 ex

Re: [kvm-unit-tests PATCH v6] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-06-27 Thread Andrew Jones
On Wed, Jun 18, 2025 at 08:44:52AM -0700, Jesse Taube wrote: > Add tests for the DBTR SBI extension. > > Signed-off-by: Jesse Taube > Reviewed-by: Charlie Jenkins > Tested-by: Charlie Jenkins > --- > V1 -> V2: > - Call report_prefix_pop before returning > - Disable compressed instructions in

Re: [kvm-unit-tests PATCH v2] riscv: lib: sbi_shutdown add pass/fail exit code.

2025-06-25 Thread Andrew Jones
On Wed, Jun 25, 2025 at 07:31:27AM -0700, Jesse Taube wrote: > On Wed, Jun 25, 2025 at 1:33 AM Andrew Jones wrote: > > > > On Tue, Jun 24, 2025 at 12:23:17PM -0700, Jesse Taube wrote: > > > When exiting it may be useful for the sbi implementation to know if > > >

Re: [kvm-unit-tests PATCH v2] riscv: lib: sbi_shutdown add pass/fail exit code.

2025-06-25 Thread Andrew Jones
On Tue, Jun 24, 2025 at 12:23:17PM -0700, Jesse Taube wrote: > When exiting it may be useful for the sbi implementation to know if > kvm-unit-tests passed or failed. > Add exit code to sbi_shutdown, and use it in exit() to pass > success/failure (0/1) to sbi. > > Signed-off-by: Jesse Taube > ---

Re: [kvm-unit-tests PATCH] riscv: lib: sbi_shutdown add exit code.

2025-06-24 Thread Andrew Jones
On Mon, Jun 23, 2025 at 03:46:31PM -0700, Jesse Taube wrote: > On Mon, Jun 23, 2025 at 10:01 AM Andrew Jones wrote: > > > > On Fri, Jun 20, 2025 at 08:50:51AM -0700, Jesse Taube wrote: > > > When exiting it may be useful for the sbi implementation to know the > > &g

Re: [kvm-unit-tests PATCH] riscv: lib: sbi_shutdown add exit code.

2025-06-23 Thread Andrew Jones
On Fri, Jun 20, 2025 at 08:50:51AM -0700, Jesse Taube wrote: > When exiting it may be useful for the sbi implementation to know the > exit code. > Add exit code to sbi_shutdown, and use it in exit(). > > Signed-off-by: Jesse Taube > --- > lib/riscv/asm/sbi.h | 2 +- > lib/riscv/io.c | 2 +-

Re: [kvm-unit-tests PATCH v2] riscv: Allow SBI_CONSOLE with no uart in device tree

2025-06-13 Thread Andrew Jones
On Fri, Jun 13, 2025 at 08:03:13AM -0700, Jesse Taube wrote: > When CONFIG_SBI_CONSOLE is enabled and there is no uart defined in the > device tree kvm-unit-tests fails to start. > > Only abort when uart is not found in device tree if SBI_CONSOLE is false > > Signed-off-by: Jesse Taube > --- >

Re: [kvm-unit-tests PATCH v5] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-06-13 Thread Andrew Jones
On Thu, Jun 12, 2025 at 11:17:23AM -0700, Jesse Taube wrote: > Add tests for the DBTR SBI extension. > > Signed-off-by: Jesse Taube > Reviewed-by: Charlie Jenkins > Tested-by: Charlie Jenkins > --- > V1 -> V2: > - Call report_prefix_pop before returning > - Disable compressed instructions in

Re: [kvm-unit-tests PATCH 1/2] riscv: Allow SBI_CONSOLE with no uart in device tree

2025-06-13 Thread Andrew Jones
On Fri, Jun 13, 2025 at 05:11:19AM -0700, Jesse Taube wrote: > On Fri, Jun 13, 2025 at 12:53 AM Andrew Jones wrote: > > > > On Thu, Jun 12, 2025 at 01:07:47PM -0700, Jesse Taube wrote: > > > When CONFIG_SBI_CONSOLE is enabled and there is no uart defined in the > >

Re: [kvm-unit-tests PATCH 1/2] riscv: Allow SBI_CONSOLE with no uart in device tree

2025-06-13 Thread Andrew Jones
On Thu, Jun 12, 2025 at 01:07:47PM -0700, Jesse Taube wrote: > When CONFIG_SBI_CONSOLE is enabled and there is no uart defined in the > device tree kvm-unit-tests fails to start. > > Only check if uart exists in device tree if SBI_CONSOLE is false. > > Signed-off-by: Jesse Taube > --- > lib/ris

Re: [PATCH v4] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-06-10 Thread Andrew Jones
On Fri, Jun 06, 2025 at 12:45:03PM -0700, Jesse Taube wrote: > Add tests for the DBTR SBI extension. > > Signed-off-by: Jesse Taube > --- > V1 -> V2: > - Call report_prefix_pop before returning > - Disable compressed instructions in exec_call, update related comment > - Remove extra "| 1" in d

Re: [kvm-unit-tests PATCH v3 2/2] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-06-06 Thread Andrew Jones
On Thu, Jun 05, 2025 at 09:18:06AM -0700, Jesse Taube wrote: > Add tests for the DBTR SBI extension. > > Signed-off-by: Jesse Taube > --- > V1 -> V2: > - Call report_prefix_pop before returning > - Disable compressed instructions in exec_call, update related comment > - Remove extra "| 1" in d

Re: [kvm-unit-tests PATCH v3 1/2] riscv: Add RV_INSN_LEN to processor.h

2025-06-06 Thread Andrew Jones
On Thu, Jun 05, 2025 at 09:18:05AM -0700, Jesse Taube wrote: > When handeling traps and faults it is offten necessary to know the size handling often > of the instruction at epc. Add RV_INSN_LEN to calculate the > instruction size. > > Signed-off-by: Jesse Taube > --- > lib/riscv/asm/processo

Re: [PATCH v2] riscv: sbi: Add SBI Debug Triggers Extension tests

2025-06-04 Thread Andrew Jones
Hi Jesse, Thanks for this patch, but please see the README of the repository, section "Patches", where we ask that a 'kvm-unit-tests' patch prefix is used. Also please see the RISCV section of the MAINTAINERS file for where to send the patches. You got the kvm-riscv list, but I'd appreciate a CC t

Re: [PATCH 2/2] KVM: selftests: arm64: Use generated defines for named system registers

2024-08-06 Thread Andrew Jones
On Fri, Aug 02, 2024 at 10:57:54PM GMT, Mark Brown wrote: > Currently the get-reg-list test uses directly specified numeric values to > define system registers to validate. Since we already have a macro which > allows us to use the generated system register definitions from the main > kernel easily

Re: [PATCH v5 12/13] selftests: riscv: Fix vector tests

2024-07-22 Thread Andrew Jones
On Mon, Jul 22, 2024 at 02:14:44PM GMT, Charlie Jenkins wrote: > On Mon, Jul 22, 2024 at 01:47:29PM -0500, Andrew Jones wrote: > > On Fri, Jul 19, 2024 at 09:19:07AM GMT, Charlie Jenkins wrote: > > > Overhaul the riscv vector tests to use kselftest_harness to help the > >

Re: [PATCH v5 12/13] selftests: riscv: Fix vector tests

2024-07-22 Thread Andrew Jones
On Fri, Jul 19, 2024 at 09:19:07AM GMT, Charlie Jenkins wrote: > Overhaul the riscv vector tests to use kselftest_harness to help the > test cases correctly report the results and decouple the individual test > cases from each other. With this refactoring, only run the test cases is > vector is rep

Re: [PATCH v5 4/4] KVM: riscv: selftests: Add Svade and Svadu Extension to get-reg-list test

2024-06-21 Thread Andrew Jones
eg_list *vcpu_configs[] = { > &config_smstateen, > &config_sscofpmf, > &config_sstc, > + &config_svade, > + &config_svadu, > &config_svinval, > &config_svnapot, > &config_svpbmt, > -- > 2.17.1 > Reviewed-by: Andrew Jones

Re: [RFC PATCH v4 5/5] KVM: riscv: selftests: Add Svadu Extension to get-reg-list testt

2024-05-27 Thread Andrew Jones
); > KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT); > @@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = { > &config_h, > &config_smstateen, > &config_sstc, > + &config_svadu, > &config_svinval, > &config_svnapot, > &config_svpbmt, > -- > 2.17.1 > Reviewed-by: Andrew Jones

Re: [PATCH v2 4/5] KVM: selftests: Add an interface to read the data of named vcpu stat

2024-05-02 Thread Andrew Jones
On Wed, May 01, 2024 at 02:54:32PM GMT, Manali Shukla wrote: > From: Manali Shukla > > The interface is used to read the data values of a specified vcpu stat > from the currenly available binary stats interface. > > Signed-off-by: Manali Shukla > --- > .../testing/selftests/kvm/include/kvm_uti

Re: [PATCH] KVM: selftests: Use TAP interface in the set_memory_region test

2024-04-26 Thread Andrew Jones
> - > - test_add_max_memory_regions(); > - > -#ifdef __x86_64__ > - if (kvm_has_cap(KVM_CAP_GUEST_MEMFD) && > - (kvm_check_cap(KVM_CAP_VM_TYPES) & BIT(KVM_X86_SW_PROTECTED_VM))) { > - test_add_private_memory_region(); > - test_add_overlapping_private_memory_regions(); > - } else { > - pr_info("Skipping tests for KVM_MEM_GUEST_MEMFD memory > regions\n"); > - } > - > if (argc > 1) > loops = atoi_positive("Number of iterations", argv[1]); > else > loops = 10; > > - pr_info("Testing MOVE of in-use region, %d loops\n", loops); > - for (i = 0; i < loops; i++) > - test_move_memory_region(); > - > - pr_info("Testing DELETE of in-use region, %d loops\n", loops); > - for (i = 0; i < loops; i++) > - test_delete_memory_region(); > -#endif > - > - return 0; > + return test_harness_run(argc, argv); > } > -- > 2.44.0 > Reviewed-by: Andrew Jones Thanks, drew

Re: [PATCH] riscv: selftests: Add hwprobe binaries to .gitignore

2024-04-25 Thread Andrew Jones
.gitignore which ignores everything except the code. See tools/testing/selftests/kvm/.gitignore But, until (if at all) we go that way, we can do what this patch does, Reviewed-by: Andrew Jones Thanks, drew

Re: [PATCH] KVM: selftests: Add 'malloc' failure check in test_vmx_nested_state

2024-04-24 Thread Andrew Jones
On Tue, Apr 23, 2024 at 12:15:47PM -0700, Sean Christopherson wrote: ... > I almost wonder if we should just pick a prefix that's less obviously > connected > to KVM and/or selftests, but unique and short. > How about kvmsft_ ? It's based on the ksft_ prefix of kselftest.h. Maybe it's too close t

Re: [PATCH] KVM: selftests: Add 'malloc' failure check in test_vmx_nested_state

2024-04-23 Thread Andrew Jones
On Tue, Apr 23, 2024 at 07:56:01AM -0700, Sean Christopherson wrote: > +others > > On Tue, Apr 23, 2024, Markus Elfring wrote: > > … > > > This patch will add the malloc failure checking > > … > > > > * Please use a corresponding imperative wording for the change description. > > > > * Would you

Re: [PATCH v8 24/24] KVM: riscv: selftests: Add commandline option for SBI PMU test

2024-04-23 Thread Andrew Jones
On Tue, Apr 23, 2024 at 02:03:29PM +0500, Muhammad Usama Anjum wrote: ... > > + pr_info("Usage: %s [-h] [-d ]\n", name); > A little weird that we have pr_info named helper to print logs when it is a > userspace application, not kernel code. I'll check it in the source who > added it to the KVM te

Re: [PATCH v6 07/24] RISC-V: Use the minor version mask while computing sbi version

2024-04-16 Thread Andrew Jones
On Tue, Apr 16, 2024 at 01:31:27AM -0700, Atish Patra wrote: > On 4/15/24 06:06, Andrew Jones wrote: > > On Wed, Apr 10, 2024 at 05:07:35PM -0700, Atish Patra wrote: > > > As per the SBI specification, minor version is encoded in the > > > lower 24 bits only. Make s

Re: [PATCH v6 24/24] KVM: riscv: selftests: Add commandline option for SBI PMU test

2024-04-15 Thread Andrew Jones
ll events or all ISA extensions. > > The commandline option allows user to disable particular test if they > want to. > > Suggested-by: Andrew Jones > Signed-off-by: Atish Patra > --- > .../selftests/kvm/riscv/sbi_pmu_test.c| 77 --- > 1 file

Re: [PATCH v6 23/24] KVM: riscv: selftests: Add a test for counter overflow

2024-04-15 Thread Andrew Jones
/kvm/riscv/sbi_pmu_test.c| 113 ++ > 1 file changed, 113 insertions(+) > Reviewed-by: Andrew Jones

Re: [PATCH v6 22/24] KVM: riscv: selftests: Add a test for PMU snapshot functionality

2024-04-15 Thread Andrew Jones
On Wed, Apr 10, 2024 at 05:07:50PM -0700, Atish Patra wrote: > Verify PMU snapshot functionality by setting up the shared memory > correctly and reading the counter values from the shared memory > instead of the CSR. > > Reviewed-by: Andrew Jones > Reviewed-by: Anup Patel >

Re: [PATCH v6 21/24] KVM: riscv: selftests: Add SBI PMU selftest

2024-04-15 Thread Andrew Jones
.../selftests/kvm/riscv/sbi_pmu_test.c| 369 ++ > 2 files changed, 370 insertions(+) > create mode 100644 tools/testing/selftests/kvm/riscv/sbi_pmu_test.c > Reviewed-by: Andrew Jones

Re: [PATCH v6 14/24] RISC-V: KVM: Add perf sampling support for guests

2024-04-15 Thread Andrew Jones
| 1 + > arch/riscv/kvm/aia.c | 5 ++ > arch/riscv/kvm/vcpu.c | 15 -- > arch/riscv/kvm/vcpu_onereg.c | 6 +++ > arch/riscv/kvm/vcpu_pmu.c | 68 +-- > 7 files changed, 93 insertions(+), 8 deletions(-) > Reviewed-by: Andrew Jones

Re: [PATCH v6 13/24] RISC-V: KVM: Implement SBI PMU Snapshot feature

2024-04-15 Thread Andrew Jones
ude/asm/kvm_vcpu_pmu.h | 7 ++ > arch/riscv/kvm/vcpu_pmu.c | 121 +- > arch/riscv/kvm/vcpu_sbi_pmu.c | 3 + > 3 files changed, 130 insertions(+), 1 deletion(-) > Reviewed-by: Andrew Jones

Re: [PATCH v6 08/24] drivers/perf: riscv: Implement SBI PMU snapshot function

2024-04-15 Thread Andrew Jones
ddr = page_to_virt(snapshot_page); > + cpu_hw_evt->snapshot_addr_phys = page_to_phys(snapshot_page); > + } > + > + return 0; > +} > + > +static int pmu_sbi_snapshot_disable(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM, -1, > + -1, 0, 0, 0, 0); The SBI_SHMEM_DISABLE patch got moved in front of this patch, but looks like it was forgotten to apply it. Otherwise, Reviewed-by: Andrew Jones Thanks, drew

Re: [PATCH v6 07/24] RISC-V: Use the minor version mask while computing sbi version

2024-04-15 Thread Andrew Jones
er have them around all the major bits before the OR. We don't need the parentheses around the major bits, since shift has higher precedence than OR, but I'd probably keep them. Otherwise, Reviewed-by: Andrew Jones > } > > int sbi_err_map_linux_errno(int err); > -- > 2.34.1 >

Re: [PATCH v6 01/24] RISC-V: Fix the typo in Scountovf CSR name

2024-04-15 Thread Andrew Jones
(CSR_SSCOUNTOVF),\ > + "csrr %0, " __stringify(CSR_SCOUNTOVF), \ > "csrr %0, " __stringify(THEAD_C9XX_CSR_SCOUNTEROF), \ > THEAD_VENDOR_ID, ERRATA_THEAD_PMU, \ > CONFIG_ERRATA_THEAD_PMU,\ > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 06/22] drivers/perf: riscv: Implement SBI PMU snapshot function

2024-04-11 Thread Andrew Jones
On Wed, Apr 10, 2024 at 03:29:21PM -0700, Atish Patra wrote: > On 4/4/24 04:52, Andrew Jones wrote: > > On Wed, Apr 03, 2024 at 01:04:35AM -0700, Atish Patra wrote: ... > > > +static int pmu_sbi_snapshot_disable(void) > > > +{ > > > + struct sbiret ret; > &g

Re: [PATCH v4 07/15] RISC-V: KVM: No need to exit to the user space if perf event failed

2024-04-11 Thread Andrew Jones
On Wed, Apr 10, 2024 at 03:44:32PM -0700, Atish Patra wrote: > On 4/4/24 05:16, Andrew Jones wrote: > > On Mon, Apr 01, 2024 at 03:37:01PM -0700, Atish Patra wrote: > > > On Sat, Mar 2, 2024 at 12:16 AM Andrew Jones > > > wrote: > > > > > > > &

Re: [PATCH v5 21/22] KVM: riscv: selftests: Add a test for PMU snapshot functionality

2024-04-10 Thread Andrew Jones
On Wed, Apr 10, 2024 at 12:28:08AM -0700, Atish Patra wrote: > > On 4/10/24 00:10, Andrew Jones wrote: > > On Tue, Apr 09, 2024 at 03:52:40PM -0700, Atish Patra wrote: > > > On 4/5/24 06:11, Andrew Jones wrote: > > > > On Wed, Apr 03, 2024 at 01

Re: [PATCH v4 09/15] RISC-V: KVM: Add perf sampling support for guests

2024-04-10 Thread Andrew Jones
On Tue, Apr 09, 2024 at 05:11:31PM -0700, Atish Patra wrote: > On 4/5/24 05:05, Andrew Jones wrote: > > On Tue, Apr 02, 2024 at 01:33:10AM -0700, Atish Patra wrote: > > ... > > > > but it should be possible for the VMM to disable this extension in the > > > >

Re: [PATCH v5 21/22] KVM: riscv: selftests: Add a test for PMU snapshot functionality

2024-04-10 Thread Andrew Jones
On Tue, Apr 09, 2024 at 03:52:40PM -0700, Atish Patra wrote: > On 4/5/24 06:11, Andrew Jones wrote: > > On Wed, Apr 03, 2024 at 01:04:50AM -0700, Atish Patra wrote: ... > > > + probe = guest_sbi_probe_extension(SBI_EXT_PMU, &out_val); > > > + GUEST_ASSERT(probe &

Re: [PATCH v5 20/22] KVM: riscv: selftests: Add SBI PMU selftest

2024-04-09 Thread Andrew Jones
On Mon, Apr 08, 2024 at 05:37:19PM -0700, Atish Patra wrote: > On 4/5/24 05:50, Andrew Jones wrote: > > On Wed, Apr 03, 2024 at 01:04:49AM -0700, Atish Patra wrote: > > ... > > > +static void test_pmu_basic_sanity(void) > > > +{ > > > + long out_val = 0;

Re: [PATCH 0/5] Add parsing for Zimop ISA extension

2024-04-08 Thread Andrew Jones
On Mon, Apr 08, 2024 at 01:19:39PM +0200, Clément Léger wrote: > > > On 08/04/2024 13:03, Andrew Jones wrote: > > On Mon, Apr 08, 2024 at 10:01:12AM +0200, Clément Léger wrote: > >> > >> > >> On 05/04/2024 19:33, Deepak Gupta wrote: > >>> On

Re: [PATCH 0/5] Add parsing for Zimop ISA extension

2024-04-08 Thread Andrew Jones
0 insertions(+) > > -- > 2.43.0 For the series, Reviewed-by: Andrew Jones

Re: [PATCH 0/5] Add parsing for Zimop ISA extension

2024-04-08 Thread Andrew Jones
On Mon, Apr 08, 2024 at 10:01:12AM +0200, Clément Léger wrote: > > > On 05/04/2024 19:33, Deepak Gupta wrote: > > On Fri, Apr 5, 2024 at 8:26 AM Andrew Jones wrote: > >> > >> On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote: > >>> The Zi

Re: [PATCH RFC 02/11] dt-bindings: riscv: Add Sdtrig optional CSRs existence on DT

2024-04-05 Thread Andrew Jones
On Fri, Mar 29, 2024 at 10:31:10AM +, Conor Dooley wrote: > On Fri, Mar 29, 2024 at 05:26:18PM +0800, Max Hsu wrote: > > The mcontext/hcontext/scontext CSRs are optional in the Sdtrig extension, > > to prevent RW operations to the missing CSRs, which will cause > > illegal instructions. > > >

Re: [PATCH 0/5] Add parsing for Zimop ISA extension

2024-04-05 Thread Andrew Jones
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote: > The Zimop ISA extension was ratified recently. This series adds support > for parsing it from riscv,isa, hwprobe export and kvm support for > Guest/VM. I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we ne

Re: [PATCH v5 22/22] KVM: riscv: selftests: Add a test for counter overflow

2024-04-05 Thread Andrew Jones
dler(vm, guest_irq_handler); > + > + vcpu_init_vector_tables(vcpu); > + /* Initialize guest timer frequency. */ > + vcpu_get_reg(vcpu, RISCV_TIMER_REG(frequency), &timer_freq); > + sync_global_to_guest(vm, timer_freq); > + > + run_vcpu(vcpu); > + > + test_vm_destroy(vm); > +} > + > int main(void) > { > pr_info("SBI PMU basic test : starting\n"); > @@ -463,5 +574,8 @@ int main(void) > test_vm_events_snapshot_test(test_pmu_events_snaphost); > pr_info("SBI PMU event verification with snapshot test : PASS\n"); > > + test_vm_events_overflow(test_pmu_events_overflow); > + pr_info("SBI PMU event verification with overflow test : PASS\n"); > + > return 0; > } > -- > 2.34.1 > Other than the command line option idea, Reviewed-by: Andrew Jones Thanks, drew

Re: [PATCH v5 21/22] KVM: riscv: selftests: Add a test for PMU snapshot functionality

2024-04-05 Thread Andrew Jones
sync_global_to_guest(vcpu->vm, snapshot_gva); > + sync_global_to_guest(vcpu->vm, snapshot_gpa); > +} > + > +static void test_vm_events_snapshot_test(void *guest_code) > +{ > + struct kvm_vm *vm = NULL; > + struct kvm_vcpu *vcpu; > + > + vm = vm_create_with_one_vcpu(&vcpu, guest_code); > + __TEST_REQUIRE(__vcpu_has_sbi_ext(vcpu, KVM_RISCV_SBI_EXT_PMU), > +"SBI PMU not available, skipping test"); > + > + test_vm_setup_snapshot_mem(vm, vcpu); > + > + run_vcpu(vcpu); > + > + test_vm_destroy(vm); > +} > + > int main(void) > { > + pr_info("SBI PMU basic test : starting\n"); > test_vm_basic_test(test_pmu_basic_sanity); > pr_info("SBI PMU basic test : PASS\n"); > > test_vm_events_test(test_pmu_events); > pr_info("SBI PMU event verification test : PASS\n"); > > + test_vm_events_snapshot_test(test_pmu_events_snaphost); > + pr_info("SBI PMU event verification with snapshot test : PASS\n"); > + > return 0; > } > -- > 2.34.1 > Since my comments are a bit out-of-scope for this patch, Reviewed-by: Andrew Jones Thanks, drew

Re: [PATCH v5 20/22] KVM: riscv: selftests: Add SBI PMU selftest

2024-04-05 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:49AM -0700, Atish Patra wrote: ... > +static void test_pmu_basic_sanity(void) > +{ > + long out_val = 0; > + bool probe; > + struct sbiret ret; > + int num_counters = 0, i; > + union sbi_pmu_ctr_info ctrinfo; > + > + probe = guest_sbi_probe_exte

Re: [PATCH v4 13/15] KVM: riscv: selftests: Add SBI PMU selftest

2024-04-05 Thread Andrew Jones
On Tue, Apr 02, 2024 at 01:34:54AM -0700, Atish Patra wrote: ... > > > +static void guest_illegal_exception_handler(struct ex_regs *regs) > > > +{ > > > + __GUEST_ASSERT(regs->cause == EXC_INST_ILLEGAL, > > > +"Unexpected exception handler %lx\n", regs->cause); > > > > Shoul

Re: [PATCH v5 19/22] KVM: riscv: selftests: Add SBI PMU extension definitions

2024-04-05 Thread Andrew Jones
> +/* Flags defined for counter stop function */ > +#define SBI_PMU_STOP_FLAG_RESET BIT(0) > +#define SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT BIT(1) > + > struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > unsigned long arg1, unsigned long arg2, > unsigned long arg3, unsigned long arg4, > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 17/22] KVM: riscv: selftests: Add helper functions for extension checks

2024-04-05 Thread Andrew Jones
RE(__vcpu_has_ext(vcpus[0], > RISCV_ISA_EXT_REG(KVM_RISCV_ISA_EXT_SSTC)), > + __TEST_REQUIRE(__vcpu_has_isa_ext(vcpus[0], KVM_RISCV_ISA_EXT_SSTC), > "SSTC not available, skipping test\n"); > > vm_init_vector_tables(vm); > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 16/22] KVM: riscv: selftests: Move sbi definitions to its own header file

2024-04-05 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:45AM -0700, Atish Patra wrote: > The SBI definitions will continue to grow. Move the sbi related > definitions to its own header file from processor.h > > Suggested-by: Andrew Jones > Signed-off-by: Atish Patra > --- > .../selftests/kvm/incl

Re: [PATCH v5 15/22] RISC-V: KVM: Improve firmware counter read function

2024-04-05 Thread Andrew Jones
tdata); > break; > case SBI_EXT_PMU_COUNTER_FW_READ: > - ret = kvm_riscv_vcpu_pmu_ctr_read(vcpu, cp->a0, retdata); > + ret = kvm_riscv_vcpu_pmu_fw_ctr_read(vcpu, cp->a0, retdata); > break; > case SBI_EXT_PMU_COUNTER_FW_READ_HI: > if (IS_ENABLED(CONFIG_32BIT)) > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 14/22] RISC-V: KVM: Support 64 bit firmware counters on RV32

2024-04-05 Thread Andrew Jones
andler(struct kvm_vcpu *vcpu, > struct kvm_run *run, > case SBI_EXT_PMU_COUNTER_FW_READ: > ret = kvm_riscv_vcpu_pmu_ctr_read(vcpu, cp->a0, retdata); > break; > + case SBI_EXT_PMU_COUNTER_FW_READ_HI: > + if (IS_ENABLED(CONFIG_32BIT)) > + ret = kvm_riscv_vcpu_pmu_fw_ctr_read_hi(vcpu, cp->a0, > retdata); > + else > + retdata->out_val = 0; > + break; > case SBI_EXT_PMU_SNAPSHOT_SET_SHMEM: > ret = kvm_riscv_vcpu_pmu_snapshot_set_shmem(vcpu, cp->a0, > cp->a1, cp->a2, retdata); > break; > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v4 09/15] RISC-V: KVM: Add perf sampling support for guests

2024-04-05 Thread Andrew Jones
On Tue, Apr 02, 2024 at 01:33:10AM -0700, Atish Patra wrote: ... > > but it should be possible for the VMM to disable this extension in the > > guest. We just need to change all the checks in KVM of the host's ISA > > for RISCV_ISA_EXT_SSCOFPMF to checking the guest's ISA instead. Maybe > > it's no

Re: [PATCH v5 13/22] RISC-V: KVM: Add perf sampling support for guests

2024-04-05 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:42AM -0700, Atish Patra wrote: > KVM enables perf for guest via counter virtualization. However, the > sampling can not be supported as there is no mechanism to enabled > trap/emulate scountovf in ISA yet. Rely on the SBI PMU snapshot > to provide the counter overflow

Re: [PATCH v5 12/22] RISC-V: KVM: Implement SBI PMU Snapshot feature

2024-04-05 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:41AM -0700, Atish Patra wrote: > PMU Snapshot function allows to minimize the number of traps when the > guest access configures/access the hpmcounters. If the snapshot feature > is enabled, the hypervisor updates the shared memory with counter > data and state of over

Re: [PATCH v4 08/15] RISC-V: KVM: Implement SBI PMU Snapshot feature

2024-04-04 Thread Andrew Jones
On Wed, Apr 03, 2024 at 12:36:41AM -0700, Atish Patra wrote: > On 4/1/24 15:36, Atish Patra wrote: > > On Sat, Mar 2, 2024 at 1:49 AM Andrew Jones wrote: > > > > > > On Wed, Feb 28, 2024 at 05:01:23PM -0800, Atish Patra wrote: ... > > >

Re: [PATCH v5 11/22] RISC-V: KVM: No need to exit to the user space if perf event failed

2024-04-04 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:40AM -0700, Atish Patra wrote: > Currently, we return a linux error code if creating a perf event failed > in kvm. That shouldn't be necessary as guest can continue to operate > without perf profiling or profiling with firmware counters. > > Return appropriate SBI err

Re: [PATCH v4 07/15] RISC-V: KVM: No need to exit to the user space if perf event failed

2024-04-04 Thread Andrew Jones
On Mon, Apr 01, 2024 at 03:37:01PM -0700, Atish Patra wrote: > On Sat, Mar 2, 2024 at 12:16 AM Andrew Jones wrote: > > > > On Wed, Feb 28, 2024 at 05:01:22PM -0800, Atish Patra wrote: > > > Currently, we return a linux error code if creating a perf event failed > &g

Re: [PATCH v5 06/22] drivers/perf: riscv: Implement SBI PMU snapshot function

2024-04-04 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:35AM -0700, Atish Patra wrote: ... > +static int pmu_sbi_snapshot_disable(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM, -1, > + -1, 0, 0, 0, 0); The "Rename the SBI_STA_SHMEM_DISABLE"

Re: [PATCH v5 09/22] RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic name

2024-04-04 Thread Andrew Jones
gt; > - if (shmem_phys_lo == SBI_STA_SHMEM_DISABLE && > - shmem_phys_hi == SBI_STA_SHMEM_DISABLE) { > + if (shmem_phys_lo == SBI_SHMEM_DISABLE && > + shmem_phys_hi == SBI_SHMEM_DISABLE) { > vcpu->arch.sta.shmem = INVALID_GPA; > return 0; > } > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 08/22] RISC-V: KVM: Fix the initial sample period value

2024-04-04 Thread Andrew Jones
sample_period = (-pmc->counter_val) & counter_val_mask; > > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 07/22] drivers/perf: riscv: Fix counter mask iteration for RV32

2024-04-04 Thread Andrew Jones
ctr_start_mask = cpu_hw_evt->used_hw_ctrs[i] & ~ctr_ovf_mask; > + /* Start all the counters that did not overflow in a single > shot */ > + sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, i * > BITS_PER_LONG, ctr_start_mask, > + 0, 0, 0, 0); > + } > > /* Reinitialize and start all the counter that overflowed */ > while (ctr_ovf_mask) { > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 06/22] drivers/perf: riscv: Implement SBI PMU snapshot function

2024-04-04 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:35AM -0700, Atish Patra wrote: > SBI v2.0 SBI introduced PMU snapshot feature which adds the following > features. > > 1. Read counter values directly from the shared memory instead of > csr read. > 2. Start multiple counters with initial values with one SBI call. >

Re: [PATCH v5 05/22] RISC-V: Add SBI PMU snapshot definitions

2024-04-04 Thread Andrew Jones
XT_DBCN_CONSOLE_WRITE = 0, > @@ -285,6 +295,7 @@ struct sbi_sta_struct { > #define SBI_ERR_ALREADY_AVAILABLE -6 > #define SBI_ERR_ALREADY_STARTED -7 > #define SBI_ERR_ALREADY_STOPPED -8 > +#define SBI_ERR_NO_SHMEM -9 > > extern unsigned long sbi_spec_version; > struct sbiret { > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 04/22] drivers/perf: riscv: Use BIT macro for shifting operations

2024-04-04 Thread Andrew Jones
erf_event *event) > cmask = 1; > } else if (event->attr.config == PERF_COUNT_HW_INSTRUCTIONS) { > cflags |= SBI_PMU_CFG_FLAG_SKIP_MATCH; > - cmask = 1UL << (CSR_INSTRET - CSR_CYCLE); > + cmask = BIT(CSR_INSTRET - CSR_CYCLE); > } > } > > -- > 2.34.1 > Other than the commit message, Reviewed-by: Andrew Jones Thanks, drew

Re: [PATCH v5 03/22] drivers/perf: riscv: Read upper bits of a firmware counter

2024-04-04 Thread Andrew Jones
On Wed, Apr 03, 2024 at 01:04:32AM -0700, Atish Patra wrote: > SBI v2.0 introduced a explicit function to read the upper 32 bits > for any firmware counter width that is longer than 32bits. > This is only applicable for RV32 where firmware counter can be > 64 bit. > > Reviewe

Re: [PATCH v5 02/22] RISC-V: Add FIRMWARE_READ_HI definition

2024-04-04 Thread Andrew Jones
/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -131,6 +131,7 @@ enum sbi_ext_pmu_fid { > SBI_EXT_PMU_COUNTER_START, > SBI_EXT_PMU_COUNTER_STOP, > SBI_EXT_PMU_COUNTER_FW_READ, > + SBI_EXT_PMU_COUNTER_FW_READ_HI, > }; > > union sbi_pmu_ctr_info { > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v5 01/22] RISC-V: Fix the typo in Scountovf CSR name

2024-04-04 Thread Andrew Jones
(CSR_SSCOUNTOVF),\ > + "csrr %0, " __stringify(CSR_SCOUNTOVF), \ > "csrr %0, " __stringify(THEAD_C9XX_CSR_SCOUNTEROF), \ > THEAD_VENDOR_ID, ERRATA_THEAD_PMU, \ > CONFIG_ERRATA_THEAD_PMU,\ > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH] KVM: riscv: selftests: Add SBI base extension test

2024-04-02 Thread Andrew Jones
On Mon, Apr 01, 2024 at 04:20:18PM +0800, Haibo Xu wrote: > This is the first patch to enable the base extension selftest > for the SBI implementation in KVM. Test for other extensions > will be added later. I'm not sure we want SBI tests in KVM selftests since we already plan to add them to kvm-u

Re: [PATCH v1 2/3] KVM: selftests: Change __vm_create() to create a vm without in-kernel APIC

2024-03-27 Thread Andrew Jones
On Wed, Mar 27, 2024 at 05:42:54AM +, Manali Shukla wrote: ... > diff --git a/tools/testing/selftests/kvm/include/kvm_util_base.h > b/tools/testing/selftests/kvm/include/kvm_util_base.h > index 4a40b332115d..00e37c376cf3 100644 > --- a/tools/testing/selftests/kvm/include/kvm_util_base.h > +++

Re: [PATCH v4 15/15] KVM: riscv: selftests: Add a test for counter overflow

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:30PM -0800, Atish Patra wrote: > Add a test for verifying overflow interrupt. Currently, it relies on > overflow support on cycle/instret events. This test works for cycle/ > instret events which support sampling via hpmcounters on the platform. > There are no ISA exte

Re: [PATCH v4 14/15] KVM: riscv: selftests: Add a test for PMU snapshot functionality

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:29PM -0800, Atish Patra wrote: > Verify PMU snapshot functionality by setting up the shared memory > correctly and reading the counter values from the shared memory > instead of the CSR. > > Signed-off-by: Atish Patra > --- > .../selftests/kvm/include/riscv/processo

Re: [PATCH v4 13/15] KVM: riscv: selftests: Add SBI PMU selftest

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:28PM -0800, Atish Patra wrote: > This test implements basic sanity test and cycle/instret event > counting tests. > > Signed-off-by: Atish Patra > --- > tools/testing/selftests/kvm/Makefile| 1 + > tools/testing/selftests/kvm/riscv/sbi_pmu.c | 340

Re: [PATCH v4 12/15] KVM: riscv: selftests: Add SBI PMU extension definitions

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:27PM -0800, Atish Patra wrote: > The SBI PMU extension definition is required for upcoming SBI PMU > selftests. > > Signed-off-by: Atish Patra > --- > .../selftests/kvm/include/riscv/processor.h | 67 +++ > 1 file changed, 67 insertions(+) > > dif

Re: [PATCH v4 11/15] KVM: riscv: selftests: Add Sscofpmf to get-reg-list test

2024-03-02 Thread Andrew Jones
ONFIG(svinval, SVINVAL); > KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT); > @@ -980,6 +983,7 @@ struct vcpu_reg_list *vcpu_configs[] = { > &config_fp_d, > &config_h, > &config_smstateen, > + &config_sscofpmf, > &config_sstc, > &config_svinval, > &config_svnapot, > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v4 10/15] RISC-V: KVM: Support 64 bit firmware counters on RV32

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:25PM -0800, Atish Patra wrote: > The SBI v2.0 introduced a fw_read_hi function to read 64 bit firmware > counters for RV32 based systems. > > Add infrastructure to support that. > > Reviewed-by: Anup Patel > Signed-off-by: Atish Patra > --- > arch/riscv/include/as

Re: [PATCH v4 09/15] RISC-V: KVM: Add perf sampling support for guests

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:24PM -0800, Atish Patra wrote: > KVM enables perf for guest via counter virtualization. However, the > sampling can not be supported as there is no mechanism to enabled > trap/emulate scountovf in ISA yet. Rely on the SBI PMU snapshot > to provide the counter overflow

Re: [PATCH v4 08/15] RISC-V: KVM: Implement SBI PMU Snapshot feature

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:23PM -0800, Atish Patra wrote: > PMU Snapshot function allows to minimize the number of traps when the > guest access configures/access the hpmcounters. If the snapshot feature > is enabled, the hypervisor updates the shared memory with counter > data and state of over

Re: [PATCH v4 07/15] RISC-V: KVM: No need to exit to the user space if perf event failed

2024-03-02 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:22PM -0800, Atish Patra wrote: > Currently, we return a linux error code if creating a perf event failed > in kvm. That shouldn't be necessary as guest can continue to operate > without perf profiling or profiling with firmware counters. > > Return appropriate SBI err

Re: [PATCH v4 06/15] RISC-V: KVM: No need to update the counter value during reset

2024-03-01 Thread Andrew Jones
kvm_pmu_release_perf_event(pmc); > - } > } else { > sbiret = SBI_ERR_INVALID_PARAM; > } > -- > 2.34.1 > Reviewed-by: Andrew Jones

Re: [PATCH v4 05/15] drivers/perf: riscv: Implement SBI PMU snapshot function

2024-03-01 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:20PM -0800, Atish Patra wrote: > SBI v2.0 SBI introduced PMU snapshot feature which adds the following > features. > > 1. Read counter values directly from the shared memory instead of > csr read. > 2. Start multiple counters with initial values with one SBI call. >

Re: [PATCH v4 04/15] RISC-V: Add SBI PMU snapshot definitions

2024-03-01 Thread Andrew Jones
On Wed, Feb 28, 2024 at 05:01:19PM -0800, Atish Patra wrote: > SBI PMU Snapshot function optimizes the number of traps to > higher privilege mode by leveraging a shared memory between the S/VS-mode > and the M/HS mode. Add the definitions for that extension and new error > codes. > > Reviewed-by:

Re: [PATCH v4 03/15] drivers/perf: riscv: Read upper bits of a firmware counter

2024-03-01 Thread Andrew Jones
eturn 0; > } > > + if (sbi_spec_version >= sbi_mk_version(2, 0)) > + sbi_v2_available = true; > + > ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING, > "perf/riscv/pmu:starting", > pmu_sbi_starting_cpu, pmu_sbi_dying_cpu); > -- > 2.34.1 > Either way, Reviewed-by: Andrew Jones

Re: [PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test

2024-02-28 Thread Andrew Jones
); > KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC); > @@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = { > &config_svinval, > &config_svnapot, > &config_svpbmt, > + &config_zacas, > &config_zba, > &config_zbb, > &config_zbc, > -- > 2.34.1 > Reviewed-by: Andrew Jones

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