- Add opcodes for octo I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octo read commands.
Signed-off-by: Vignesh R
Signed-off-b
Add support for octo mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octo mode flags and parsing of same in spi driver.
* Add parsing logic for spi-mem fr
Add support for octo mode I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Patch added in v2 version.
drivers/spi/spi-mem.c | 9 -
1 file c
Add octo read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new SPI_NOR_OCTO_READ
Add flags for Octo mode I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTO: transmit with 8 wires
SPI_RX_OCTO: receive with 8 wires
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Changes
Add support for octo mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octo transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Incorporated review comments of Boris.
Add octo mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports 8 lines Rx/Tx data transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- None
drivers/spi/spi-nxp-fspi.c | 4 ++--
1 file c
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- None
Changes fo
Hi Vignesh,
> -Original Message-
> From: Vignesh R [mailto:vigne...@ti.com]
> Sent: Tuesday, November 13, 2018 1:30 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va...@gmail.com; linux-.
; Han Xu
> Cc: dw...@infradead.org; computersforpe...@gmail.com; rich...@nod.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; linux-
> ker...@vger.kernel.org
> Subject: Re: [PATCH v6 3/9] spi: Add
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Thursday, November 29, 2018 5:24 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; linux-
> s...@vger.kernel.org; Marek
Hi Frieder,
With below patch on top of your v5, Read/Write/Erase on CS1 is working fine for
me.
I have tested with JFFS2 mounting and booting also for both CS0 and CS1.
diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c
index ce45e8e..4467983 100644
--- a/drivers/spi/spi-fsl-q
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Thursday, November 15, 2018 7:32 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Hi Boris,
Please apply this patch series [1] in the coming release.
--
Regards
Yogesh Gaur
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70384
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, October 23, 2018 3:31 PM
> To: 'Boris
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Friday, November 16, 2018 3:12 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e. Flex
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
Reviewed-by: Rob Herring
---
Changes for v5:
- None
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
.../devicetree
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- None
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI acts
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Add maintainers for binding file
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
inde
.at
> Cc: linux-...@lists.infradead.org; linux-kernel@vger.kernel.org; Yogesh
> Narayan Gaur ; cyrille.pitc...@wedev4u.fr;
> tudor.amba...@microchip.com
> Subject: [PATCH v2 1/5] mtd: spi-nor: don't drop sfdp data if optional
> parsers fail
>
> JESD216C states that just the Basic Flas
Hi Huijin,
I guess this is the v2 of previously send patch [1], please follow version
information in patch submission.
--
Regards
Yogesh Gaur
[1] https://patchwork.ozlabs.org/patch/961197/
> -Original Message-
> From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf O
Hi Frieder,
Thanks for review.
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Wednesday, November 7, 2018 9:52 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; marek.va...@gm
forpe...@gmail.com;
> marek.va...@gmail.com; rich...@nod.at; miquel.ray...@bootlin.com;
> broo...@kernel.org; David Wolfe ; Fabio Estevam
> ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; Han Xu ;
> shawn...@kernel.org; Frieder Schrempf ; linux-
> ker...@vger.kernel.org
> Subject:
Hi,
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, November 13, 2018 1:53 PM
> To: 'Frieder Schrempf' ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; linux-
> s...@vger.kernel.org
> Cc: dw...@infradead.org; computer
d.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; Schrempf Frieder
> ; linux-kernel@vger.kernel.org
> Subject: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP QuadSPI
> controller
>
&g
Hi Frieder,
[..]
> >
> > Ok, I will have a look at what could make the chip selection fail in
> > case of AHB read.
>
> Could you try with this change applied:
>
> @@ -503,7 +503,7 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct
> spi_device *spi)
> map_add
@nod.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; Schrempf Frieder
> ; linux-kernel@vger.kernel.org
> Subject: [PATCH v7 3/9] spi: Add a driver for the Freescale/NXP QuadSPI
> controller
>
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Wednesday, December 5, 2018 6:16 PM
> To: Vignesh R ; broo...@kernel.org
> Cc: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; linux-.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, December 6, 2018 12:16 PM
> To: Yogesh Narayan Gaur
> Cc: Vignesh R ; broo...@kernel.org; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; linux-.
; Han Xu
> Cc: dw...@infradead.org; computersforpe...@gmail.com; rich...@nod.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; Schrempf Frieder
> ; linux-kernel@vger.kernel.org
> Subject: [PATCH v7 3/9]
Add support for octal mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
C
Gaur
> -Original Message-
> From: Mark Brown [mailto:broo...@kernel.org]
> Sent: Friday, December 7, 2018 2:00 AM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ; Vignesh R
> ;
> linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vger.kernel.org; d
Add support for octal mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octal mode flags and parsing of same in spi driver.
* Add parsing logic for spi-mem
Add support for octal mode I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Patch added in v2
Add flags for Octal mode I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Chan
Add octal mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports 8 lines Rx/Tx data transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- None
Changes for v4:
- None
Changes fo
- Add opcodes for octal I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octal read commands.
Signed-off-by: Vignesh R
Signed-off
Add support for octal mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
C
Add octal read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new SPI_NOR_OCTAL_REA
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 3, 2018 1:35 PM
> To: Yogesh Narayan Gaur ;
> broo...@kernel.org
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linu
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Friday, June 15, 2018 7:26 PM
To: Yogesh Narayan Gaur ; Fabio Estevam
; David Wolfe ; dw...@infradead.org
Cc: rich...@nod.at; Prabhakar Kushwaha ; Han Xu
; linux-kernel@vger.kernel.org; linux
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Tuesday, June 19, 2018 12:46 AM
To: Yogesh Narayan Gaur
Cc: Fabio Estevam ; David Wolfe ;
dw...@infradead.org; rich...@nod.at; Prabhakar Kushwaha
; Han Xu ;
linux-kernel@vger.kernel.org
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, June 19, 2018 12:59 PM
> To: Yogesh Narayan Gaur ;
> marek.va...@gmail.com; Frieder Schrempf ;
> broo...@kernel.org
> Cc: Fabio Estevam ; David Wolfe
> ; d
avid Wolfe
; Fabio Estevam ; Prabhakar
Kushwaha ; Yogesh Narayan Gaur
; Han Xu ; Frieder Schrempf
; linux-kernel@vger.kernel.org
Subject: [PATCH 03/11] spi: Add a driver for the Freescale/NXP QuadSPI
controller
This driver is derived from the SPI NOR driver at mtd/spi-nor/fsl-quadspi.c. It
us
Hi Boris,
-Original Message-
From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf Of
Yogesh Narayan Gaur
Sent: Monday, June 11, 2018 3:51 PM
To: Boris Brezillon
Cc: rich...@nod.at; Prabhakar Kushwaha ; Han Xu
; linux-kernel@vger.kernel.org; linux-...@vger.kernel.org
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Tuesday, June 12, 2018 12:43 PM
To: Yogesh Narayan Gaur
Cc: rich...@nod.at; Prabhakar Kushwaha ; Han Xu
; linux-kernel@vger.kernel.org; linux-...@vger.kernel.org;
marek.va...@gmail.com
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Monday, June 11, 2018 3:19 PM
To: Yogesh Narayan Gaur
Cc: linux-...@lists.infradead.org; boris.brezil...@free-electrons.com;
frieder.schre...@exceet.de; computersforpe...@gmail.com; David
r that.
--
Regards
Yogesh Gaur
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Friday, June 15, 2018 6:20 PM
To: Yogesh Narayan Gaur
Cc: rich...@nod.at; Prabhakar Kushwaha ; Han Xu
; linux-kernel@vger.kernel.org; linux-...@vger.kernel.org;
Add flags for Octal mode I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Narayan Gaur
Reviewed-by: Boris Brezillon
SPI_NOR_OCTAL_READ flag.
Signed-off-by: Vignesh R
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Correct S-o-b tag with full author name as 'Yogesh Narayan Gaur'.
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified strin
l read flag for flash mt35xu512aba
mtd: m25p80: add support of octal mode I/O transfer
spi: nxp-fspi: add octal mode flag bit for octal support
arm64: dts: lx2160a: update fspi node
Changes for v6:
- Correct S-o-b tag with full author name as 'Yogesh Narayan Gaur'.
- Rebase on
Add support for octal mode I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Narayan Gaur
Reviewed-by: Boris Brezillon
---
Changes for v6:
- Correct S-o-b tag with full author name as 'Yogesh Narayan Gaur'.
Changes for v5:
- Modified string 'octo' with &#x
-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Correct S-o-b tag with full author name as 'Yogesh Narayan Gaur'.
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Add octal mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports 8 lines Rx/Tx data transfer.
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Correct S-o-b tag with full author name as 'Yogesh Narayan Gaur'.
Changes for v5:
- Modified string 'oc
Add support for octal mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Correct S-o-b tag with full author name as 'Yogesh Narayan Gaur'.
Changes for v5:
- Modified st
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Correct S-o-b tag with full
Hi Tudor,
> -Original Message-
> From: tudor.amba...@microchip.com [mailto:tudor.amba...@microchip.com]
> Sent: Tuesday, December 11, 2018 1:40 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va..
Hi Vignesh,
> -Original Message-
> From: Vignesh R [mailto:vigne...@ti.com]
> Sent: Wednesday, December 19, 2018 6:14 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va...@gmail.com; linux-.
Hi All,
> -Original Message-
> From: Vignesh R [mailto:vigne...@ti.com]
> Sent: Thursday, December 20, 2018 12:03 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va...@gmail.com; linux-.
Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 10, 2018 1:52 PM
> To: Yogesh Narayan Gaur
> Cc: Mark Brown ; Vignesh R ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; linux-...@vger.kernel.org;
> devicet...@vger.kernel.org; r...@kernel.org;
Hi Frieder,
Thanks for the review. Please find my comments inline.
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Thursday, December 6, 2018 2:53 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil
Hi Boris, Frieder,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 10, 2018 3:49 PM
> To: Yogesh Narayan Gaur
> Cc: Schrempf Frieder ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; broo...@kern
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 10, 2018 4:20 PM
> To: Yogesh Narayan Gaur
> Cc: Schrempf Frieder ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; broo...@kern
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 10, 2018 4:27 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; broo...@kernel.org;
> marek.va...@gmail.com; vigne...@ti.com; linux-.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 10, 2018 4:39 PM
> To: Yogesh Narayan Gaur
> Cc: Schrempf Frieder ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; broo...@kern
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 10, 2018 4:57 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; broo...@kernel.org;
> marek.va...@gmail.com; vigne...@ti.com; linux-.
Hi Tudor,
> -Original Message-
> From: tudor.amba...@microchip.com [mailto:tudor.amba...@microchip.com]
> Sent: Monday, December 10, 2018 4:15 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va..
- 1/2/4 bit mode]
[1] https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf
[2] https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=182097
Yogesh Narayan Gaur (5):
spi: spi-mem: Add driver for NXP FlexSPI controller
dt-bindings: spi: add binding file for NXP FlexSPI
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- None
Changes for v5:
- Add maintainers for binding file
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff
).
Verified this driver on following SPI NOR flashes:
Micron, mt35xu512ab, [Read - 1 bit mode]
Cypress, s25fl512s, [Read - 1/2/4 bit mode]
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Rebase on top of v5.0-rc1
- Updated as per Frieder review comments and perform code cleanup
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Narayan Gaur
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 3ef443cfbab6..fe7f35824a79 100644
--- a/arch/arm64/configs
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Narayan Gaur
Reviewed-by: Rob Herring
---
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorp
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Narayan Gaur
---
Changes for
Hi Tudor,
This patch is breaking the 1-4-4 Read protocol for the spansion flash
"s25fl512s".
Without this patch read request command for Quad mode, 4-byte enable, is coming
as 0xEC i.e. SPINOR_OP_READ_1_4_4_4B.
But after applying this patch, read request command for Quad mode is coming as
0x6C
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 16, 2018 5:48 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmail.com; rich...@nod.
Hi Tudor,
> -Original Message-
> From: Cyrille Pitchen [mailto:cyrille.pitc...@wedev4u.fr]
> Sent: Tuesday, October 16, 2018 10:04 PM
> To: Tudor Ambarus ; Yogesh Narayan Gaur
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.
Hi Tudor,
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Wednesday, October 17, 2018 7:38 AM
> To: 'Cyrille Pitchen' ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@bootlin.com; ri
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Wednesday, October 17, 2018 1:00 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersfor
Hi Tudor,
> -Original Message-
> From: Tudor Ambarus [mailto:tudor.amba...@microchip.com]
> Sent: Wednesday, October 17, 2018 1:31 PM
> To: Yogesh Narayan Gaur ; Boris Brezillon
>
> Cc: Cyrille Pitchen ; marek.va...@gmail.com;
> dw...@infradead.org; computersfor
Some MICRON related macros in spi-nor domain were ST.
Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
Added entry of MFR Id for Micron flashes, 0x002C.
Signed-off-by: Yogesh Gaur
Reviewed-by: Tudor Ambarus
---
Changes for v2:
- None
drivers/mtd/spi-nor/spi-nor.c | 9
Add entry for mt35xu512aba Micron NOR flash.
This flash is having uniform sector erase size of 128KB, have
support of FSR(flag status register), flash size is 64MB and
supports 4-byte commands.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
- Removed checkpatch warning, 80 character limit.
driv
Add MFR_ID information, 0x002C, related to the Micron flash.
Currently, MFR_ID 0x0020 is being specified as Micron flash ID but
these are actually CFI ID of STMicro flashes.
Rename SNOR_MFR_MICRON to SNOR_MFR_ST and add entry for
SNOR_MFR_MICRON having CFI ID value of Micron flash.
Add entry of mt
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI acts
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- Inco
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9d5eeff..2696898 100644
--- a/MAINTAINERS
+++ b/MA
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
.../devicetree/bindings/spi/spi-nxp-fspi.txt | 39 ++
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e. Flex
Add MFR_ID information, 0x002C, related to the Micron flash.
Currently, MFR_ID 0x0020 is being specified as Micron flash ID but
these are actually CFI ID of STMicro flashes.
Rename SNOR_MFR_MICRON to SNOR_MFR_ST and add entry for
SNOR_MFR_MICRON having CFI ID value of Micron flash.
Add entry of mt
Add entry for mt35xu512aba Micron NOR flash.
This flash is having uniform sector erase size of 128KB, have
support of FSR(flag status register), flash size is 64MB and
supports 4-byte commands.
Signed-off-by: Yogesh Gaur
Reviewed-by: Tudor Ambarus
---
Changes for v3:
- Modified flash node style
Some MICRON related macros in spi-nor domain were ST.
Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
Added entry of MFR Id for Micron flashes, 0x002C.
Signed-off-by: Yogesh Gaur
Reviewed-by: Tudor Ambarus
---
Changes for v3:
- None
Changes for v2:
- None
drivers/mtd/spi
Hi Tudor,
> -Original Message-
> From: Tudor Ambarus [mailto:tudor.amba...@microchip.com]
> Sent: Thursday, October 11, 2018 9:33 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; linux-...@vger.kernel.org
> Cc: marek.va...@gmail.com; cyrille.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Friday, October 12, 2018 11:38 AM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; linux-...@vger.kernel.org;
> tudor.amba...@microchip.com; mar
- Add opcodes for octal I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octal read commands.
Signed-off-by: Vignesh R
Signed-off
Add support for octal mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octal mode flags and parsing of same in spi driver.
* Add opcodes for octal I/O comm
Add flags for Octal I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Incorporated review co
Add octal read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new SPI_NOR_OCTAL_REA
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