On Wed, Oct 09, 2013 at 09:48:14PM +0100, Stefano Stabellini wrote:
> IOMMU_HELPER is needed because SWIOTLB calls iommu_is_span_boundary,
> provided by lib/iommu_helper.c.
>
> Signed-off-by: Stefano Stabellini
> Reviewed-by: Konrad Rzeszutek Wilk
> CC: will.dea...@arm.com
> CC: li...@arm.linux.
On Wed, Oct 09, 2013 at 09:48:15PM +0100, Stefano Stabellini wrote:
> Signed-off-by: Stefano Stabellini
> Acked-by: Catalin Marinas
> CC: will.dea...@arm.com
> ---
> arch/arm64/include/asm/dma-mapping.h |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm64/inc
On Thu, Oct 10, 2013 at 06:16:05AM +0100, Wang, Yalin wrote:
> Dear all,
Hello,
> We encounter a crash in ipt_do_table( ) function
> During our stability test .
>
> The CPU is qcom msm8960 / dual core , linux kernel version is 3.4
I appreciate that this is a mammoth task, but can you reprod
On Thu, Oct 10, 2013 at 03:34:02AM +0100, Chen Gang wrote:
> In current kernel wide source, for arm, only s390 scsi drivers use
> atomic_clear_mask(), now, s390 itself need use 'unsigned int' and
> 'atomic_t', so need match s390's atomic_clear_mask().
>
>
> Signed-off-by: Chen Gang
> ---
> arch
On Thu, Oct 10, 2013 at 03:35:21AM +0100, Chen Gang wrote:
> In current kernel wide source, for arm64, only s390 scsi drivers use
> atomic_clear_mask(), now, s390 itself need use 'unsigned int' and
> 'atomic_t', so need match s390's atomic_clear_mask().
>
>
> Signed-off-by: Chen Gang
> ---
> ar
On Thu, Oct 10, 2013 at 11:22:21AM +0100, Wang, Yalin wrote:
> Thanks for your reply .
No problem.
> I have compare our kernel with 3.12 ,
> Ip_tables.c x_tables.c is the same ,
> So the BUG should can also be reproduce on 3.12 (just my guess).
[...]
> /--
On Thu, Oct 10, 2013 at 12:26:38PM +0100, Wang, Yalin wrote:
> Hi Will ,
Hello,
> Seems your patch is better than mine,
> It make sure newinfo->initial_entries update is
> Seen by others .
>
> I will test by your patches , and update to you ASAP .
Thanks.
> I have another questions about t
On Thu, Oct 10, 2013 at 12:03:52PM +0100, Chen Gang wrote:
> On 10/10/2013 06:07 PM, Will Deacon wrote:
> > On Thu, Oct 10, 2013 at 03:35:21AM +0100, Chen Gang wrote:
> >> In current kernel wide source, for arm64, only s390 scsi drivers use
> >> atomic_clear_mask()
Hi Christoph,
Sorry for the delay in looking at this, I've been on holiday for a week.
Comments inline.
On Wed, Aug 28, 2013 at 08:48:23PM +0100, Christoph Lameter wrote:
> Transformations done to __get_cpu_var()
>
>
> 1. Determine the address of the percpu instance of the current processor.
>
lue.
> > >
> > Hi Russell,
> >
> > Can you have a look at this series ?
> > If you are OK, can I have your ACK on arm specific changes(PATCH 2/5) ?
>
> I think it would be more value to have someone from ARM Ltd ack it,
> because they will kno
moves the lockless lockref code over to the new
cmpxchg64_relaxed operation, which doesn't provide barrier semantics.
Cc: Waiman Long
Signed-off-by: Will Deacon
---
So here's a quick stab at allowing the memory barrier semantics to be
avoided on weakly ordered architectures. This help
probably be improved by removing the half barrier associated with the
default cmpxchg64 macro.
Cc: Tony Luck
Signed-off-by: Will Deacon
---
arch/ia64/include/uapi/asm/cmpxchg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/ia64/include/uapi/asm/cmpxchg.h
b/arch/ia64/include/uapi/asm
memory
ordering issues aren't a concern for this architecture.
Cc:
Signed-off-by: Will Deacon
---
arch/x86/include/asm/cmpxchg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index d47786a..aacb99a0 100644
--- a/arc
cmpxchg64_relaxed can be used to provide barrier-less semantics for a
64-bit cmpxchg operation in cases where the strong memory ordering is
not required.
This patch implements a dummy implementation for asm-generic, falling
back to the usual cmpxchg64 code.
Cc: Arnd Bergmann
Signed-off-by: Will
On Thu, Sep 26, 2013 at 04:34:04PM +0100, Linus Torvalds wrote:
> On Thu, Sep 26, 2013 at 8:13 AM, Will Deacon wrote:
> >
> > This patch implements a dummy implementation for asm-generic, falling
> > back to the usual cmpxchg64 code.
>
> I don't like the "let
moves the lockless lockref code over to a cmpxchg64_relaxed
operation, which doesn't provide barrier semantics. If the operation
isn't defined, we simply #define it as the usual 64-bit cmpxchg macro.
Cc: Waiman Long
Signed-off-by: Will Deacon
---
lib/lockref.c | 13 +++--
1 fi
Hi Chris,
On Thu, Sep 26, 2013 at 06:24:53PM +0100, Chris Metcalf wrote:
> It turns out the kernel relies on barrier() to force a reload of the
> percpu offset value. Since we can't easily modify the definition of
> barrier() to include "tp" as an output register, we instead provide a
> definitio
On Fri, Sep 27, 2013 at 09:04:46AM +0100, Jiang Liu wrote:
> From: Jiang Liu
>
> Use PF_USED_MATH flag to mark whether the thread has accessed any FPSIMD
> registers, so we could avoid saving and restroing FPSIMD registers until
> threads access them. This may improve performance when lazy FPSIMD
On Fri, Sep 27, 2013 at 11:50:46AM +0100, Catalin Marinas wrote:
> On Fri, Sep 27, 2013 at 09:04:40AM +0100, Jiang Liu wrote:
> > From: Jiang Liu
> >
> > This patchset enables FPSIMD lazy save and restore for ARM64, you could
> > apply it against v3.12-rc2.
> >
> > We have done basic functional
On Fri, Sep 27, 2013 at 03:20:10PM +0100, Jiang Liu wrote:
> On 09/27/2013 06:59 PM, Will Deacon wrote:
> > On Fri, Sep 27, 2013 at 09:04:46AM +0100, Jiang Liu wrote:
> >> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
> >> index 267e54a..a81af5f 1
On Fri, Sep 27, 2013 at 09:13:15PM +0100, Chris Metcalf wrote:
> On 9/26/2013 1:57 PM, Will Deacon wrote:
> > Hi Chris,
> >
> > On Thu, Sep 26, 2013 at 06:24:53PM +0100, Chris Metcalf wrote:
> >> [...]
> >> +static inline unsigned long __my_cpu_offset
Hi Arnaldo,
On Tue, Sep 24, 2013 at 06:12:20PM +0100, Arnaldo Carvalho de Melo wrote:
> Em Tue, Sep 17, 2013 at 11:29:04AM +0100, Will Deacon escreveu:
> > Arnaldo, Ingo,
> >
> > On Mon, Sep 16, 2013 at 10:17:32AM +0100, Jean Pihet wrote:
> > > The newly ad
On Sun, Sep 22, 2013 at 06:04:23AM +0100, Wei Yongjun wrote:
> From: Wei Yongjun
>
> This patch fix the error handle of function cci_pmu_probe():
> - using IS_ERR() instead of NULL test for the return value of
> devm_ioremap_resource() since it nerver return NULL.
> - remove kfree() for devm_kz
On Tue, Sep 24, 2013 at 10:34:50AM +0100, Jiri Olsa wrote:
> On Tue, Sep 24, 2013 at 10:55:32AM +0200, Jean Pihet wrote:
> > Ping on the series. The two patches above (3/4 and 4/4) are generic
> > while the two others are impacting ARM only.
> > Is it possible to get an Ack for the generic ones?
>
/kernel/git/will/linux.git;a=shortlog;h=refs/heads/io
but since I've been dragging my feet on that series, you can also have my
ack:
Acked-by: Will Deacon
I should get round to sending another version of that lot soon.
Will
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On Mon, Dec 03, 2012 at 04:44:11PM +, Armando Visconti wrote:
> On 11/29/2012 12:04 PM, Armando VISCONTI wrote:
> > This patch keeps disabled the strict alignment CP15 bit for
> > all armv6 and armv7 processor without the mmu. This behaviour
> > is now same as in the mmu case.
> >
> > Signed-of
On Mon, Dec 03, 2012 at 05:25:53PM +, Russell King - ARM Linux wrote:
> On Mon, Dec 03, 2012 at 05:44:11PM +0100, Armando Visconti wrote:
> > On 11/29/2012 12:04 PM, Armando VISCONTI wrote:
> >> This patch keeps disabled the strict alignment CP15 bit for
> >> all armv6 and armv7 processor witho
sures that virtual addresses for virtio queue descriptors
are converted to physical addresses using kmap_to_page, which handles
high memory correctly.
Cc: Rusty Russell
Cc: Sasha Levin
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
---
drivers/virtio/virtio_ring.c |4 +++-
n
Hi Andrew,
On Tue, Oct 02, 2012 at 11:01:04PM +0100, Andrew Morton wrote:
> On Tue, 2 Oct 2012 17:59:11 +0100
> Will Deacon wrote:
>
> > On x86 memory accesses to pages without the ACCESSED flag set result in the
> > ACCESSED flag being set automatically. With the AR
Cc: Ben Herrenschmidt
Signed-off-by: Will Deacon
---
drivers/mmc/host/mmci.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index edc3e9b..4f125b4 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
ic IO
header as they have no place in a new architecture port.
Cc: Arnd Bergmann
Cc: Mike Frysinger
Cc: Ben Herrenschmidt
Signed-off-by: Will Deacon
---
include/asm-generic/io.h | 30 --
1 files changed, 0 insertions(+), 30 deletions(-)
diff --git a/include/asm-ge
the
endian-correcting accessors.
Cc: Mike Frysinger
Cc: Ben Herrenschmidt
Acked-by: Arnd Bergmann
Signed-off-by: Will Deacon
---
include/asm-generic/io.h | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index
nts welcome,
Will
Big endian is not dead -- it just smells funny.
Will Deacon (4):
asm-generic: io: remove {read,write} string functions
asm-generic: io: don't perform swab during {in,out} string functions
mmc: mmci: use io{read,write}*_rep accessors instead of string
functions
n
architectures.
Cc: Arnd Bergmann
Cc: Ben Herrenschmidt
Signed-off-by: Will Deacon
---
drivers/net/ethernet/smsc/smc91x.h | 20 ++--
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/smsc/smc91x.h
b/drivers/net/ethernet/smsc/smc91x.h
index 5f53fbb
On Wed, Oct 17, 2012 at 04:26:20PM +0100, David Miller wrote:
> From: Will Deacon
> Date: Wed, 17 Oct 2012 14:01:25 +0100
>
> > + update_mmu_cache(vma, address, pmd);
>
> This won't build, use update_mmu_cache_pmd().
Good catch. They're both empty ma
On Wed, Oct 17, 2012 at 05:05:00PM +0100, Sasha Levin wrote:
> On Wed, Oct 17, 2012 at 6:14 AM, Will Deacon wrote:
> > When using a virtio transport, the 9p net device allocates pages to back
> > the descriptors inserted into the virtqueue. These allocations may be
> >
Hi Rusty,
On Thu, Oct 18, 2012 at 03:19:06AM +0100, Rusty Russell wrote:
> Will Deacon writes:
> > When using a virtio transport, the 9p net device allocates pages to back
> > the descriptors inserted into the virtqueue. These allocations may be
> > performed from atom
On Thu, Oct 18, 2012 at 11:05:02PM +0100, Andrew Morton wrote:
> On Wed, 17 Oct 2012 16:54:02 +0100
> Will Deacon wrote:
>
> > On x86 memory accesses to pages without the ACCESSED flag set result in the
> > ACCESSED flag being set automatically. With the ARM architectu
On Fri, Oct 19, 2012 at 07:19:27AM +0100, Alexander Holler wrote:
> Hello,
>
> Am 18.10.2012 14:16, schrieb Thomas Meyer:
>
> > ERROR: "read_current_timer" [drivers/gpu/drm/udl/udl.ko] undefined!
> > ERROR: "read_current_timer" [crypto/tcrypt.ko] undefined!
>
> There is already a long thread abo
On Fri, Oct 19, 2012 at 09:25:48AM +0100, James Hogan wrote:
> On 17/10/12 16:45, Will Deacon wrote:
> > The {read,write}s{b,w,l} operations are not defined by all architectures
> > and are being removed from the asm-generic/io.h interface.
> >
> > This patch replace
On Thu, Oct 18, 2012 at 06:48:16AM +0100, Geert Uytterhoeven wrote:
> On Thu, Oct 18, 2012 at 2:04 AM, Benjamin Herrenschmidt
> wrote:
> > The sort story is that endianness is not a property of the IO port but
> > of the information that transit through it. If you're just going to copy
> > it into
scatterlist with junk.
This patch uses kmap_to_page when populating the page array for a kernel
buffer.
Cc: Rusty Russell
Cc: Sasha Levin
Signed-off-by: Will Deacon
---
net/9p/trans_virtio.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/net/9p/trans_virtio.c b/net/9p
Some virtio device drivers (9p) need to translate high virtual addresses
to physical addresses, which are inserted into the virtqueue for
processing by userspace.
This patch exports the kmap_to_page symbol, so that the affected drivers
can be compiled as modules.
Signed-off-by: Will Deacon
Levin
Signed-off-by: Will Deacon
---
drivers/virtio/virtio_ring.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index e639584..286c30c 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio
On Fri, Oct 19, 2012 at 07:49:55PM +0100, Andrew Morton wrote:
> On Fri, 19 Oct 2012 10:10:16 +0100
> Will Deacon wrote:
>
> > On Thu, Oct 18, 2012 at 11:05:02PM +0100, Andrew Morton wrote:
> > > On Wed, 17 Oct 2012 16:54:02 +0100
> > > Will Deacon wrote:
>
includes linux/compiler.h in rbtree_augmented.h so that the
__always_inline macro is resolved correctly.
Cc: Pekka Enberg
Cc: Michel Lespinasse
Cc: Ingo Molnar
Signed-off-by: Will Deacon
---
include/linux/rbtree_augmented.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a
On Wed, Dec 05, 2012 at 07:51:34PM +, Uwe Kleine-König wrote:
> Hello,
Hi Uwe,
> On Mon, Dec 03, 2012 at 05:46:17PM +, Will Deacon wrote:
> > I think Uwe also requires some of the stuff there for his M3 port.
> I didn't check more context than available in the patch
Hi Steve,
On Fri, Dec 07, 2012 at 06:43:25PM +, Steven Rostedt wrote:
> On Fri, 2012-12-07 at 18:13 +, Russell King - ARM Linux wrote:
> > Even changing it to a breakpoint is potentially problematical. So we'd
> > need to ensure that no other CPU was executing the code while we modify
> >
Hi Jon,
Back-pedalling a bit here, but I'm confused by one of your points below:
On Fri, Dec 07, 2012 at 05:45:47PM +, Jon Medhurst (Tixy) wrote:
> On Fri, 2012-12-07 at 12:13 -0500, Steven Rostedt wrote:
> > I'll make my question more general:
> >
> > If I have a nop, that is a size of a ca
Hi guys,
On Mon, Dec 10, 2012 at 08:01:39AM +, Stephen Rothwell wrote:
> Today's linux-next merge of the akpm tree got a conflict in mm/memory.c
> between changes in commits from the tip tree and commit "mm: thp: set the
> accessed flag for old pages on access fault" from the akpm tree.
>
> I
On Mon, Dec 10, 2012 at 11:04:05AM +, Jon Medhurst (Tixy) wrote:
> On Fri, 2012-12-07 at 19:02 +0000, Will Deacon wrote:
> > For ARMv7, there are small subsets of instructions for ARM and Thumb which
> > are guaranteed to be atomic wrt concurrent modification and execu
On Mon, Dec 10, 2012 at 01:02:17PM +, Steven Rostedt wrote:
> On Mon, 2012-12-10 at 10:04 +0000, Will Deacon wrote:
> > Hi Jon,
> >
> > Back-pedalling a bit here, but I'm confused by one of your points below:
> >
> > On Fri, Dec 07, 2012 at 05:45
Hi Jamie,
Thanks for summarising the thread so far.
On Mon, Dec 10, 2012 at 01:40:01PM +, Jamie Lokier wrote:
> On Fri, 2012-12-07 at 19:02 +0000, Will Deacon wrote:
> > For ARMv7, there are small subsets of instructions for ARM and Thumb which
> > are guaranteed to be atomic
musb: tusb6010: use io{read,write}*_rep accessors
usb: musb: use io{read,write}*_rep accessors
Will Deacon (4):
asm-generic: io: don't perform swab during {in,out} string functions
mmc: mmci: use io{read,write}*_rep accessors instead of string
functions
net: smc91x: use io{read,write}*_rep
Balbi
Cc: Arnd Bergmann
Cc: Ben Herrenschmidt
Cc: linux-...@vger.kernel.org
Signed-off-by: Matthew Leach
Signed-off-by: Will Deacon
---
drivers/usb/musb/tusb6010.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
required as the dm9000 driver is in use by the blackfin
architecture which uses the asm-generic io accessors.
Cc: Arnd Bergmann
Cc: Ben Herrenschmidt
Cc: David Miller
Cc: net...@vger.kernel.org
Signed-off-by: Matthew Leach
Signed-off-by: Will Deacon
---
drivers/net/ethernet/davicom/dm9000.c
Bergmann
Cc: Ben Herrenschmidt
Cc: David Woodhouse
Cc: linux-...@lists.infradead.org
Signed-off-by: Matthew Leach
Signed-off-by: Will Deacon
---
drivers/mtd/nand/gpio.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
: Arnd Bergmann
Cc: Davide Ciminaghi
Cc: Ben Herrenschmidt
Signed-off-by: Will Deacon
---
I believe Davide is pushing an identical patch to this one via rmk, but
I'm including it here for completeness.
drivers/mmc/host/mmci.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
the
endian-correcting accessors.
Cc: Mike Frysinger
Acked-by: Arnd Bergmann
Acked-by: Ben Herrenschmidt
Signed-off-by: Will Deacon
---
include/asm-generic/io.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
ic IO
header as they have no place in a new architecture port.
Cc: Mike Frysinger
Cc: Ben Herrenschmidt
Acked-by: Arnd Bergmann
Signed-off-by: Will Deacon
---
include/asm-generic/io.h | 30 --
1 file changed, 30 deletions(-)
diff --git a/include/asm-generic/io.h b/in
Cc: Arnd Bergmann
Cc: Ben Herrenschmidt
Cc: linux-...@vger.kernel.org
Signed-off-by: Matthew Leach
Signed-off-by: Will Deacon
---
drivers/usb/musb/musb_core.c | 12 ++--
drivers/usb/musb/musb_io.h | 21 -
2 files changed, 6 insertions(+), 27 deletions(-)
diff
Bergmann
Cc: Ben Herrenschmidt
Cc: David Miller
Cc: net...@vger.kernel.org
Signed-off-by: Matthew Leach
Signed-off-by: Will Deacon
---
drivers/net/ethernet/8390/ax88796.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/8390/ax88796.c
b
architectures.
Cc: Arnd Bergmann
Cc: Ben Herrenschmidt
Cc: Nicolas Pitre
Cc: net...@vger.kernel.org
Signed-off-by: Will Deacon
---
drivers/net/ethernet/smsc/smc91x.h | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/smsc/smc91x.h
b
Bergmann
Cc: Ben Herrenschmidt
Cc: net...@vger.kernel.org
Signed-off-by: Matthew Leach
Signed-off-by: Will Deacon
---
drivers/net/ethernet/smsc/smc911x.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/smsc/smc911x.h
b/drivers/net/ethernet
Hi David,
On Mon, Dec 10, 2012 at 08:47:05PM +, David Miller wrote:
> From: Will Deacon
> Date: Mon, 10 Dec 2012 19:12:36 +
>
> > From: Matthew Leach
> >
> > The {read,write}s{b,w,l} operations are not defined by all
> > architectures and are being
On Fri, Nov 09, 2012 at 09:17:33PM +, Rob Clark wrote:
> From: Rob Clark
>
> A new atomic modeset/pageflip ioctl being developed in DRM requires
> get_user() to work for 64bit types (in addition to just put_user()).
>
> Signed-off-by: Rob Clark
> ---
> arch/arm/include/asm/uaccess.h | 25 +
On Mon, Nov 12, 2012 at 06:45:47AM +, Shiraz Hashim wrote:
> On Fri, Nov 09, 2012 at 09:54:01AM +0000, Will Deacon wrote:
> > On Fri, Nov 09, 2012 at 04:01:52AM +, Shiraz Hashim wrote:
> > > From: Catalin Marinas
> > >
> > > Clearing bit 22 in the PL31
On Mon, Nov 12, 2012 at 01:46:57PM +, Rob Clark wrote:
> On Mon, Nov 12, 2012 at 4:46 AM, Will Deacon wrote:
> > On Fri, Nov 09, 2012 at 09:17:33PM +, Rob Clark wrote:
> >> @@ -122,22 +124,35 @@ extern int
look ok now from
an ARM point-of-view:
Reviewed-by: Will Deacon
These should probably go via Russell (who will put them into -next), so
please send them to the patch system.
Will
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the body of a message
One really minor nit...
On Thu, Nov 08, 2012 at 08:59:31PM +, Kees Cook wrote:
> There is very little difference in the TIF_SECCOMP and TIF_SYSCALL_WORK
> path in entry-common.S, so merge TIF_SECCOMP into TIF_SYSCALL_WORK and
> move seccomp into the syscall_trace_enter() handler.
>
> Expanded
On Fri, Dec 21, 2012 at 10:18:28PM +, Pratik Patel wrote:
> What user interface do you plan to provide for the CTI? Maybe
> something consistent with other CoreSight components in sysfs to
> allow users to enable, disable, map and unmap ???
>
> Please let me know your thoughts.
Rather than ha
On Thu, Nov 15, 2012 at 08:23:48PM +, Kees Cook wrote:
> On Thu, Nov 15, 2012 at 5:25 AM, Will Deacon wrote:
> > On Wed, Nov 14, 2012 at 07:07:13PM +, Kees Cook wrote:
> >> Hi, any more thoughts on this series? I'd really like to get it into
> >> -next.
On Tue, Nov 20, 2012 at 12:17:47PM +, Robert Richter wrote:
> Will,
>
> On 05.11.12 11:31:03, Will Deacon wrote:
> > > diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
> > > index 99c63d4b..ec10db1 100644
> > > --- a/arch/arm/oprofile/co
On Tue, Nov 20, 2012 at 04:31:58PM +, Robert Richter wrote:
> On 20.11.12 15:57:17, Will Deacon wrote:
> > On Tue, Nov 20, 2012 at 12:17:47PM +, Robert Richter wrote:
> > >
> > > since this is just an update of cpu detection I would be willing to
> > >
On Tue, Nov 20, 2012 at 05:06:01PM +, Robert Richter wrote:
> On 20.11.12 16:55:17, Will Deacon wrote:
> > On Tue, Nov 20, 2012 at 04:31:58PM +, Robert Richter wrote:
> > > I am thinking of the following:
> > >
> > > # cat /root/cpu_type
> > &
and using
the correct output modifiers in the __put_{user,kernel}_asm64 macros
so that GCC will allocate the right registers without the need to
extract the two words explicitly.
Cc: Helge Deller
Signed-off-by: Will Deacon
---
arch/parisc/include/asm/uaccess.h | 18 ++
1 file
Hello,
On Thu, Apr 18, 2013 at 09:48:49AM +0100, Pranavkumar Sawargaonkar wrote:
> Actually i thought adding a config register will be easier to add a
> code than writing entire emulation as 8250 emulation will require to
> deal with dealing with more registers and more code.
kvmtool already has
On Fri, Apr 19, 2013 at 10:25:35AM +0100, Pranavkumar Sawargaonkar wrote:
> On 19 April 2013 14:35, Will Deacon wrote:
> > On Thu, Apr 18, 2013 at 09:48:49AM +0100, Pranavkumar Sawargaonkar wrote:
> >> Actually i thought adding a config register will be easier to add a
>
On Fri, Apr 19, 2013 at 10:30:40AM +0100, Peter Maydell wrote:
> On 19 April 2013 10:27, Will Deacon wrote:
> > On Fri, Apr 19, 2013 at 10:25:35AM +0100, Pranavkumar Sawargaonkar wrote:
> >> I am not against using 8250 emulation (as far as it solves printk
> >> iss
On Fri, Apr 19, 2013 at 10:34:56AM +0100, Pranavkumar Sawargaonkar wrote:
> On 19 April 2013 15:00, Peter Maydell wrote:
> > On 19 April 2013 10:27, Will Deacon wrote:
> >> On Fri, Apr 19, 2013 at 10:25:35AM +0100, Pranavkumar Sawargaonkar wrote:
> >>> I am not ag
On Fri, Apr 19, 2013 at 07:07:15PM +0100, Sebastian Gottschall wrote:
> introduced in kernel 3.9 CONFIG_ARM_VIRT_EXT is default for all V7 arm
> cpu's. this is wrong and breaks smp support on BCM4708 for example.
> so keep it optional since no all v7 cpu's seem to support it. BCM4708
> for instan
Hi Stephen,
On Sat, Apr 20, 2013 at 01:29:05AM +0100, Stephen Boyd wrote:
> The arm architected system counter has at least 56 bits of
> useable bits. Add support to ARM's sched_clock implementation for
> counters with more than 32 bits so we can avoid the complexity of
> dealing with wraparound o
and using
the correct output modifiers in the __put_{user,kernel}_asm64 macros
so that GCC will allocate the right registers without the need to
extract the two words explicitly.
Cc: Helge Deller
Signed-off-by: Will Deacon
---
v1->v2: Put the output modifier on the correct word, so 64
On Mon, Apr 22, 2013 at 03:36:16PM +0100, Russell King - ARM Linux wrote:
> On Fri, Apr 19, 2013 at 05:54:35PM +0200, André Hentschel wrote:
> > From: =?UTF-8?q?Andr=C3=A9=20Hentschel?=
> >
> > There are more and more applications coming to WinRT, Wine could support
> > them,
> > but mostly they
On Mon, Apr 22, 2013 at 10:07:35PM +0100, André Hentschel wrote:
> Am 22.04.2013 17:18, schrieb Will Deacon:
> > On Mon, Apr 22, 2013 at 03:36:16PM +0100, Russell King - ARM Linux wrote:
> >> On Fri, Apr 19, 2013 at 05:54:35PM +0200, André Hentschel wrote:
> >>&
Hi Jacob,
On Tue, Apr 23, 2013 at 08:57:02AM +0100, Jacob Shin wrote:
> Some architectures (for us, AMD Family 16h) allow for "don't care" bit
> mask to further qualify a hardware breakpoint address, in order to
> trap on range of addresses. Update perf uapi to add bp_addr_mask field.
arm and arm
On Tue, Apr 23, 2013 at 03:40:57PM +0100, Jacob Shin wrote:
> On Tue, Apr 23, 2013 at 09:34:23AM -0500, Jacob Shin wrote:
> > On Tue, Apr 23, 2013 at 10:54:37AM +0100, Will Deacon wrote:
> > > Can you see a problem if I simply invert the mask?
> >
> > That's
On Tue, Jun 04, 2013 at 06:33:20AM +0100, Wang, Yalin wrote:
> Hi Will,
Hello,
> Could I know what's your git branch is mainly used for ?
>
> https://git.kernel.org/cgit/linux/kernel/git/will/linux.git
>
>
> I mean if the branch is used for ARM arch maintenance ?
I send most of my patches
On Tue, Jun 04, 2013 at 10:30:04AM +0100, Wang, Yalin wrote:
> Hi Will,
>
> Thanks for your reply,
> I see your meaning ,
> But it seems my apply for joining into 'linux-arm-ker...@lists.infradead.org'
> Is not approved ,
> How to join in this mail-list ?
There's a mailman frontend here:
htt
three patches, although I'd like to get some acks from arm
> folks on at least the first two, just so no one is surprised with it
> going through the -tip tree.
The first two patches are pretty simple so, FWIW, you can add my ack on those:
Acked-by: Will Deacon
Will
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On Wed, Jun 05, 2013 at 01:44:55PM +0100, Arnd Bergmann wrote:
> On Wednesday 05 June 2013 13:15:29 Stefano Stabellini wrote:
> > diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
> > index c95c5cb..79dd13d 100644
> > --- a/arch/arm64/Makefile
> > +++ b/arch/arm64/Makefile
> > @@ -37,6 +37,7 @
On Mon, May 27, 2013 at 08:11:07AM +0100, Andy Shevchenko wrote:
> On Fri, 2013-05-24 at 23:55 +0200, Guennadi Liakhovetski wrote:
> > On Thu, 23 May 2013, Andy Shevchenko wrote:
> >
> > > When user interrupts ongoing transfers the dmatest may end up with console
> > > lockup, oops, or data misma
On Fri, Jun 07, 2013 at 01:45:25AM +0100, Vinod Koul wrote:
> On Wed, Jun 05, 2013 at 06:10:01PM +0100, Will Deacon wrote:
> > On Mon, May 27, 2013 at 08:11:07AM +0100, Andy Shevchenko wrote:
> > > On Fri, 2013-05-24 at 23:55 +0200, Guennadi Liakhovetski wrote:
> > >
ated from userspace so needs careful treatment in the case that we
> modify TPIDRURW and call fork(). To avoid this we must always read
> TPIDRURW in copy_thread.
>
> Signed-off-by: André Hentschel
> Signed-off-by: Will Deacon
> Signed-off-by: Jonathan Au
On Fri, Jun 14, 2013 at 12:21:11AM +0100, Jed Davis wrote:
> With this change, we no longer lose the innermost entry in the user-mode
> part of the call chain. See also the x86 port, which includes the ip.
>
> It's possible to partially work around this problem by post-processing
> the data to us
On Sun, Jun 16, 2013 at 08:32:44PM +0100, Kyle McMartin wrote:
> Provide a vdso_install target in the arm64 Makefile, as other architectures
> with a vdso do.
Thanks Kyle.
Acked-by: Will Deacon
Will
> Signed-off-by: Kyle McMartin
>
> --- a/arch/arm64/Makefile
> +++ b/a
On Tue, Jun 18, 2013 at 07:58:27PM +0100, André Hentschel wrote:
> On 18.06.2013 12:07, Will Deacon wrote:
> > On Mon, Jun 17, 2013 at 11:13:48PM +0100, André Hentschel wrote:
> >> From: André Hentschel
> >>
> >> Since commit 6a1c53124aa1 the user writeable TLS
On Thu, Jun 20, 2013 at 04:17:06AM +0100, Jed Davis wrote:
> On Tue, Jun 18, 2013 at 02:13:19PM +0100, Will Deacon wrote:
> > On Fri, Jun 14, 2013 at 12:21:11AM +0100, Jed Davis wrote:
> > > With this change, we no longer lose the innermost entry in the user-mode
> > > p
callchain_store(entry, regs->pc);
> > tail = (struct frame_tail __user *)regs->regs[29];
> >
> > while (entry->nr < PERF_MAX_STACK_DEPTH &&
>
> Acked-by: Ingo Molnar
>
> I suspect this goes to v3.10 via the ARM64 tree?
Yup, we'll take this via the
the CPU clock speed.
Signed-off-by: Will Deacon
---
init/calibrate.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/init/calibrate.c b/init/calibrate.c
index fda0a7b..cf48068 100644
--- a/init/calibrate.c
+++ b/init/calibrate.c
@@ -135,13 +135,13 @@ static unsigned
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