This adds Qualcomm PRNG driver device tree binding documentation
to use as an example in dts trees.
Signed-off-by: Stanimir Varbanov
---
Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 +
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree
This patch set adds hardware RNG driver wich is used to control the
Qualcomm's PRNG hardware block.
The first patch document the DT bindings needed to sucessfuly probe
the driver and the second patch adds the driver.
Comments are welecome!
Stanimir Varbanov (2):
ARM: DT: msm: Add Qualc
This adds a driver for hardware random number generator present
on Qualcomm MSM SoC's.
Signed-off-by: Stanimir Varbanov
---
drivers/char/hw_random/Kconfig | 12 +++
drivers/char/hw_random/Makefile | 1 +
drivers/char/hw_random/msm-rng.c | 211 +
Hi Ted,
On 10/03/2013 07:51 PM, Theodore Ts'o wrote:
> On Thu, Oct 03, 2013 at 05:52:33PM +0300, Stanimir Varbanov wrote:
>> This patch set adds hardware RNG driver wich is used to control the
>> Qualcomm's PRNG hardware block.
>> The first patch document the D
Hi Stephen,
Thanks for the quick review!
On 10/03/2013 10:25 PM, Stephen Boyd wrote:
> On 10/03/13 07:52, Stanimir Varbanov wrote:
>> +#define PRNG_CONFIG_MASK0x0002
>> +#define PRNG_CONFIG_HW_ENABLE BIT(1)
>
> These two are the same so please drop the PRNG_C
Hi Ivan,
Few comments below.
On 10/07/2013 10:44 AM, Ivan T. Ivanov wrote:
> From: "Ivan T. Ivanov"
>
> These drivers handles control and configuration of the HS
> and SS USB PHY transceivers. They are part of the driver
> which manage Synopsys DesignWare USB3 controller stack
> inside Qualcomm
Hi Ivan,
Minor comments below.
On 10/07/2013 10:44 AM, Ivan T. Ivanov wrote:
> From: "Ivan T. Ivanov"
>
> DWC3 glue layer is hardware layer around Synopsys DesignWare
> USB3 core. Its purpose is to supply Synopsys IP with required
> clocks, voltages and interface it with the rest of the SoC.
>
Hi Georgi,
Thanks for the patch.
I have some commnets below.
On 09/16/2013 05:23 PM, Georgi Djakov wrote:
> This platform driver adds the support of Secure Digital Host Controller
> Interface compliant controller found in Qualcomm MSM chipsets.
>
> CC: Asutosh Das
> CC: Venkat Gopalakrishnan
Hi Suman,
Thanks for the patch.
On 09/03/2013 08:52 PM, Suman Anna wrote:
> HwSpinlock IP is present only on OMAP4 and other newer SoCs,
> which are all device-tree boot only. This patch adds the
> base support for parsing the DT nodes, and removes the code
> dealing with the traditional platform
Hi Stephen,
On 10/04/2013 07:37 PM, Stephen Boyd wrote:
> On 10/04/13 09:31, Stanimir Varbanov wrote:
>>
>>>> +static int msm_rng_probe(struct platform_device *pdev)
>>>> +{
>>>> + struct msm_rng *rng;
>>>> + struct devi
Hi Ted,
On 10/04/2013 09:10 PM, Theodore Ts'o wrote:
> On Fri, Oct 04, 2013 at 07:23:50PM +0300, Stanimir Varbanov wrote:
>> I guess that it should follow NIST 800-90 recommendation, but I'm not
>> aware what DRBG mechanism is used.
>>
>> To be ho
Hi Ted, Peter,
On 10/09/2013 06:07 PM, H. Peter Anvin wrote:
> On 10/09/2013 07:46 AM, Stanimir Varbanov wrote:
>>
>> No, there is no public documentation for the block. Here is the driver
>> documentation which I used as a base [1].
>>
>> My guess was that -
Hi, Rohit
Thanks for the patch!
On 05/21/2013 09:32 PM, Rohit Vaswani wrote:
> This cleans up the gpio-msm-v2 driver of all the global define usage.
> The number of gpios are now defined in the device tree. This enables
> adding irqdomain support as well.
>
> Signed-off-by: Rohit Vaswani
> ---
Hi Rohit,
Thanks for the new version!
I have few more comments below.
On 05/23/2013 03:29 AM, Rohit Vaswani wrote:
> This cleans up the gpio-msm-v2 driver of all the global define usage.
> The number of gpios are now defined in the device tree. This enables
> adding irqdomain support as well.
>
Hi Rob,
Thanks for the review!
On 09/16/2016 05:19 PM, Rob Herring wrote:
> On Wed, Sep 07, 2016 at 02:37:02PM +0300, Stanimir Varbanov wrote:
>> Adds binding document for vidc video encoder/decoder driver
>>
>> Cc: Rob Herring
>> Cc: Mark Rutland
>> Cc: dev
Hi Hans,
On 09/05/2016 05:47 PM, Hans Verkuil wrote:
> On 08/22/2016 03:13 PM, Stanimir Varbanov wrote:
>> This patchset introduces a basic support for Qualcomm video
>> acceleration hardware used for video stream decoding/encoding.
>> The video IP can found on various q
This consists of video decoder implementation plus decoder
controls.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/vidc/vdec.c | 1091 +
drivers/media/platform/qcom/vidc/vdec.h | 29 +
drivers/media/platform/qcom/vidc/vdec_ctrls.c | 200
count of instances and
resolutions it selects the best clock rate for the video
core.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/vidc/core.c| 559 ++
drivers/media/platform/qcom/vidc/core.h| 207 ++
drivers/media/platform/qcom
This adds changes in v4l2 platform directory to include the
vidc driver and show it in kernel config.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/Kconfig | 1 +
drivers/media/platform/Makefile | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/media/platform/Kconfig
This adds encoder part of the driver plus encoder controls.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/vidc/venc.c | 1252 +
drivers/media/platform/qcom/vidc/venc.h | 29 +
drivers/media/platform/qcom/vidc/venc_ctrls.c | 396
Here is the implementation of Venus video accelerator low-level
functionality. It contanins code which setup the registers and
startup uthe processor, allocate and manipulates with the shared
memory used for sending commands and receiving messages.
Signed-off-by: Stanimir Varbanov
---
drivers
session and core initialisation.
- hfi_cmds has packetization operations which preparing
packets to be send from host to firmware.
- hfi_msgs takes care of messages sent from firmware to the
host.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/vidc/hfi.c| 617
Adds binding document for vidc video encoder/decoder driver
Cc: Rob Herring
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/media/qcom,vidc.txt| 61 ++
1 file changed, 61 insertions(+)
create mode 100644
Makefile and Kconfig files to build the video codec driver.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/Kconfig | 8
drivers/media/platform/qcom/Makefile | 6 ++
drivers/media/platform/qcom/vidc/Makefile | 15 +++
3 files changed, 29
ted)
Buffer ioctls:
test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
test VIDIOC_EXPBUF: OK
Test input 0:
Total: 43, Succeeded: 43, Failed: 0, Warnings: 0
Stanimir Varbanov (8):
doc: DT: vidc: binding document for Qualcomm video driver
media: vidc: adding core p
Hi Bjorn,
On 09/02/2016 11:12 PM, Bjorn Andersson wrote:
> On Fri 02 Sep 04:52 PDT 2016, Marek Szyprowski wrote:
>
>> Hi,
>>
>>
>> On 2016-09-01 16:58, Stanimir Varbanov wrote:
>>> Hi,
>>>
>>> Cc: Marek
>>>
>>
>> ...
Hi Iaroslav,
On 09/03/2016 07:45 PM, Iaroslav Gridin wrote:
> Without that, QCE performance is about 2x less.
On which platform? The clock rates are per SoC.
>
> Signed-off-by: Iaroslav Gridin
> ---
> drivers/crypto/qce/core.c | 18 +-
> drivers/crypto/qce/core.h | 2 +-
> 2
Hi Iaroslav,
On 08/30/2016 06:37 PM, Iaroslav Gridin wrote:
> From: Voker57
>
> Add device tree definitions for Qualcomm Cryptography engine and its BAM
> Signed-off-by: Iaroslav Gridin
> ---
> arch/arm/boot/dts/qcom-msm8974.dtsi | 42
> +
> 1 file changed,
Hi Iaroslav,
Could you Cc linux-arm-msm ML next time.
Cc: Stephen and linux-arm-msm
Andy, Stephen probably we don't have conclusion about adding those two
clocks in bam driver but do you have some better ideas?
On 08/30/2016 06:42 PM, Iaroslav Gridin wrote:
> From: Voker57
>
> These initializ
Hi,
Cc: Marek
On 08/30/2016 08:17 PM, Bjorn Andersson wrote:
> On Mon 29 Aug 04:48 PDT 2016, Stanimir Varbanov wrote:
>
> [..]
>>> Trying to wrap my head around how the iommu part works here. The
>>> downstream code seems to indicate that this is a "generic"
Hi Rob,
On 08/23/2016 08:32 PM, Rob Herring wrote:
> On Fri, Aug 19, 2016 at 06:53:19PM +0300, Stanimir Varbanov wrote:
>> Add devicetree binding document for Venus remote processor.
>>
>> Signed-off-by: Stanimir Varbanov
>> ---
>> .../devicetree/binding
Hi Puja,
On 08/24/2016 09:35 PM, Gupta, Puja wrote:
> On 8/19/2016 8:53 AM, Stanimir Varbanov wrote:
>> Those two scm calls are used to get the size of secure iommu
>> page table and to pass physical memory address for this page
>> table. The calls are used by remoteproc
Hi Bjorn,
On 08/25/2016 03:05 AM, Bjorn Andersson wrote:
> On Wed 24 Aug 08:36 PDT 2016, Stanimir Varbanov wrote:
>
>> Hi Rob,
>>
>> On 08/23/2016 08:32 PM, Rob Herring wrote:
>>> On Fri, Aug 19, 2016 at 06:53:19PM +0300, Stanimir Varbanov wrote:
>>>&
Hi Bjorn,
Thanks for the review and comments!
On 08/23/2016 05:50 AM, Bjorn Andersson wrote:
> On Mon 22 Aug 06:13 PDT 2016, Stanimir Varbanov wrote:
>
> Hi Stan,
>
>> This adds core part of the vidc driver common helper functions
>> used by encoder and decoder specif
Hi Bjorn,
Thanks for the comments!
On 08/23/2016 06:25 AM, Bjorn Andersson wrote:
> On Mon 22 Aug 06:13 PDT 2016, Stanimir Varbanov wrote:
>
>> This is the implementation of HFI. It is loaded with the
>> responsibility to comunicate with the firmware through an
>>
Hi Hans,
On 08/15/2017 01:04 PM, Hans Verkuil wrote:
> On 08/14/17 10:41, Stanimir Varbanov wrote:
>> Hi,
>>
>> This RFC patch is intended to give to the drivers a choice to change
>> the default behavior of the v4l2-core DMA mapping direction from
>> DMA_TO/FRO
Hi Varada,
Thanks for the patch!
On 08/17/2017 10:43 AM, Varadarajan Narayanan wrote:
> Add support for the IPQ8074 PCIe controller. IPQ8074 supports
> Gen 1/2, one lane, two PCIe root complex with support for MSI and
> legacy interrupts, and it conforms to PCI Express Base 2.1
> specification.
gt; ---
> drivers/pci/dwc/pcie-qcom.c | 132
> +++-
> 1 file changed, 68 insertions(+), 64 deletions(-)
The patch cannot be applied on todays linux-next so you have to rebase
the patches on top of Bjorn's pci.git tree.
Otherwise you have
208 insertions(+)
This patch will need re-basing too.
With both comments below addressed:
Acked-by: Stanimir Varbanov
>
> diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c
> index c4cd039..1cb03dd 100644
> --- a/drivers/pci/dwc/pcie-qcom.c
> +++ b/drivers/p
Hi Laurent,
On 08/16/2017 03:28 PM, Laurent Pinchart wrote:
> Hi Stan,
>
> On Wednesday 16 Aug 2017 14:46:50 Stanimir Varbanov wrote:
>> On 08/15/2017 01:04 PM, Hans Verkuil wrote:
>>> On 08/14/17 10:41, Stanimir Varbanov wrote:
>>>> Hi,
>>>>
Hi,
On 07/17/2017 02:18 PM, Smitha T Murthy wrote:
> On Fri, 2017-07-07 at 17:59 +0300, Stanimir Varbanov wrote:
>> Hi,
>>
>> On 06/19/2017 08:10 AM, Smitha T Murthy wrote:
>>> Added V4l2 controls for HEVC encoder
>>>
>>> Signed-off-by: Smitha T M
Hi Gustavo,
On 08/18/2017 02:12 AM, Gustavo A. R. Silva wrote:
> Refactor code in order to avoid identical code for different branches.
>
> This issue was detected with the help of Coccinelle.
>
> Addresses-Coverity-ID: 1415317
> Signed-off-by: Gustavo A. R. Silva
> ---
> This code was reported
Hi Bjorn,
On 06/20/2017 12:00 AM, Bjorn Andersson wrote:
> On Mon 19 Jun 05:19 PDT 2017, Stanimir Varbanov wrote:
>
>> Hi Olof,
>>
>> On 06/19/2017 02:25 PM, Stanimir Varbanov wrote:
>>> Hi Olof,
>>>
>>> On 06/19/2017 08:35 AM, Olof Johansson wr
We want all media drivers to build with COMPILE_TEST, as the
Coverity instance we use on Kernel works only for x86. Also,
our test workflow relies on it, in order to identify git
bisect breakages.
Signed-off-by: Mauro Carvalho Chehab
Signed-off-by: Stanimir Varbanov
---
Changes since v1
Hi Stephen,
On 06/21/2017 04:25 AM, Stephen Rothwell wrote:
> Hi Mauro,
>
> After merging the v4l-dvb tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> ERROR: "qcom_scm_is_available"
> [drivers/media/platform/qcom/venus/venus-core.ko] undefined!
> ERROR: "qcom_scm_pas
olas,
>>>>
>>>> On Tue, Oct 10, 2017 at 11:40:10AM -0400, Nicolas Dufresne wrote:
>>>>> Le mardi 29 août 2017 à 14:26 +0300, Stanimir Varbanov a écrit :
>>>>>> Currently videobuf2-dma-sg checks for dma direction for
>>>>>&g
On 08/27/2015 08:37 PM, Bjorn Andersson wrote:
> This documents a device tree binding for exposing the Qualcomm Shared
> Memory State Machine as a set of gpio- and interrupt-controllers.
>
> Signed-off-by: Bjorn Andersson
> ---
> .../devicetree/bindings/gpio/qcom,smsm.txt | 114
> ++
Hi Vikash,
On 07/04/2018 10:06 PM, Vikash Garodia wrote:
> Add routine to reset the ARM9 and brings it out of reset. Also
> abstract the Venus CPU state handling with a new function. This
> is in preparation to add PIL functionality in venus driver.
>
> Signed-off-by: Vikash Garodia
> ---
> dri
Hi Vikash,
On 07/04/2018 10:06 PM, Vikash Garodia wrote:
> Video hardware is mainly comprised of vcodec subsystem and video
> control subsystem. Video control has ARM9 which executes the video
> firmware instructions whereas vcodec does the video frame processing.
> This change adds support to loa
Hi Vikash,
On 07/04/2018 10:06 PM, Vikash Garodia wrote:
> Separate firmware loading part into a new function.
I cannot apply this patch in order to test the series.
>
> Signed-off-by: Vikash Garodia
> ---
> drivers/media/platform/qcom/venus/core.c | 4 +-
> drivers/media/platform/qcom/v
Hi,
On 07/04/2018 10:06 PM, Vikash Garodia wrote:
> Add routine to reset the ARM9 and brings it out of reset. Also
> abstract the Venus CPU state handling with a new function. This
> is in preparation to add PIL functionality in venus driver.
>
> Signed-off-by: Vikash Garodia
> ---
> drivers/me
Hey Srini,
As there are no comments I'd propose to change the endpoint supplies to
more generic names.
On 12/08/2017 11:20 AM, srinivas.kandaga...@linaro.org wrote:
> From: Srinivas Kandagatla
>
> This patch adds supplies that are required for msm8996. Two of them vdda
> and vdda-1p8 are analog
Hi,
On 01/23/2018 11:46 AM, Srinivas Kandagatla wrote:
>
>
> On 23/01/18 09:23, Stanimir Varbanov wrote:
>> Hey Srini,
>>
>> As there are no comments I'd propose to change the endpoint supplies to
>> more generic names.
>>
> Sure, I will respin thi
Hi Hans,
Could you take this patch it not too late.
On 20.03.2018 15:42, Stanimir Varbanov wrote:
Hi Alex,
Thanks!
On 03/19/2018 11:32 AM, Alexandre Courbot wrote:
find_format_by_index() stops enumerating formats as soon as the index
matches, and returns NULL if venus_helper_check_codec
Hi,
On 4.04.2018 20:30, risha...@codeaurora.org wrote:
Hi Stanimir,
We incorporated all your comments except the following:
1. Removing the driver that maintains the SCT (system cache table)
per chipset. As responded earlier the data is expected to change
from chipset to chipset and would clutt
---
> Documentation/devicetree/bindings/pci/qcom,pcie.txt | 1 +
> drivers/pci/dwc/pcie-qcom.c | 21
> -
> 2 files changed, 21 insertions(+), 1 deletion(-)
Acked-by: Stanimir Varbanov
--
regards,
Stan
rted codecs
>
> Signed-off-by: Alexandre Courbot
> ---
> drivers/media/platform/qcom/venus/vdec.c | 13 +++--
> drivers/media/platform/qcom/venus/venc.c | 13 +++--
> 2 files changed, 14 insertions(+), 12 deletions(-)
Acked-by: Stanimir Varbanov
--
regards,
Stan
Hi Hans,
On 11/29/18 9:40 PM, Tomasz Figa wrote:
> On Thu, Nov 29, 2018 at 3:10 AM wrote:
>>
>>
>> Hi Stan,
>>
>> On 2018-11-29 16:01, Stanimir Varbanov wrote:
>>> Hi Tomasz,
>>>
>>> On 11/3/18 5:01 AM, Tomasz Figa wrote:
>>>
egments.
> So, initialize the max segment size properly to weed out this warning.
>
> Based on a similar patch sent by Sean Paul for mdss:
> https://patchwork.kernel.org/patch/10671457/
>
> Signed-off-by: Vivek Gautam
> ---
> drivers/media/platform/qcom/venus/core.c | 8
> 1 file changed, 8 insertions(+)
Acked-by: Stanimir Varbanov
--
regards,
Stan
This adds suspend (power collapse) functionality by reusing
the suspend function for Venus 3xx and also enables idle indicator
property for Venus 4xx (where it is disabled by default).
Signed-off-by: Stanimir Varbanov
Reviewed-by: Tomasz Figa
---
drivers/media/platform/qcom/venus/hfi_venus.c
;
> @@ -1217,6 +1213,7 @@ static int qcom_pcie_probe(struct platform_device *pdev)
> return -ENOMEM;
>
> pm_runtime_enable(dev);
> + pm_runtime_get_sync(dev);
pm_runtime_get_sync could fail, please check for errors.
With those changes addressed:
Acked-by: Stanimir Varbanov
--
regards,
Stan
Hi Tomasz,
On 05/24/2018 09:11 AM, Tomasz Figa wrote:
> Hi Stanimir,
>
> On Tue, May 15, 2018 at 5:10 PM Stanimir Varbanov <
> stanimir.varba...@linaro.org> wrote:
>
>> This extends the clocks number to support suspend and resume
>> on Venus version 4xx.
>
Hi Tomasz,
Thanks for the review!
On 05/18/2018 11:33 AM, Tomasz Figa wrote:
> Hi Stanimir,
>
> Thanks for the series. I'll be gradually reviewing subsequent patches. Stay
> tuned. :)
>
Please consider that there is a v2 of this patchset. :)
>
> Reviewed-by: Tomasz Figa
>
Thanks!
--
reg
give them to the firmware.
The other decoder output (we called it OPB) format will be NV12
linear format and with the same resolution (or smaller in case
the user wants to downscale).
Signed-off-by: Stanimir Varbanov
---
Hi Hans, I have updated patch description a bit. Is it now clearer?
If you
Hi Andy,
On 12/8/18 7:13 AM, Andy Gross wrote:
> The following changes since commit b601f73130a375c912d9f2ec93c5f3cea5d6a3da:
>
> drm: msm: Check cmd_db_read_aux_data() for failure (2018-11-29 17:41:53
> -0600)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/li
On 10.12.18 г. 21:05 ч., Andy Gross wrote:
On Mon, Dec 10, 2018 at 02:20:47PM +0200, Stanimir Varbanov wrote:
Hi Andy,
On 12/8/18 7:13 AM, Andy Gross wrote:
The following changes since commit b601f73130a375c912d9f2ec93c5f3cea5d6a3da:
drm: msm: Check cmd_db_read_aux_data() for failure
Hi Sibi,
On 10/26/2018 03:25 PM, Sibi Sankar wrote:
> Add SCM DT node to enable SCM functionality on SDM845.
>
> Signed-off-by: Sibi Sankar
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch
Hi Alex,
On 10/11/2018 09:50 AM, Alexandre Courbot wrote:
> Please ignore this patch - I did not notice that a similar one has
> been sent before.
The difference is that you made it for decoder as well. Do you need
userptr for decoder?
--
regards,
Stan
Hi Will,
On 10/10/2018 08:08 PM, Will Deacon wrote:
> On Wed, Oct 10, 2018 at 05:44:07PM +0300, Stanimir Varbanov wrote:
>> Call iommu client translation fault handler(s).
>>
>> Signed-off-by: Stanimir Varbanov
>> ---
>> drivers/iommu/arm-smmu.c | 3 +++
Hi Joe,
On 10/18/2018 04:42 AM, Joe Perches wrote:
> On Wed, 2018-10-17 at 11:49 +0300, Stanimir Varbanov wrote:
>> On 10/08/2018 04:32 PM, Vikash Garodia wrote:
>>> Add routine to reset the ARM9 and brings it out of reset. Also
>>> abstract the Venus CPU state handlin
On 2/9/21 1:05 PM, Hans Verkuil wrote:
> On 09/02/2021 10:45, Stanimir Varbanov wrote:
>> Add decoder v4l2 control to set conceal color.
>>
>> Signed-off-by: Stanimir Varbanov
>> ---
>> .../media/v4l/ext-ctrls-codec.rst | 20 +++
On 2/15/21 1:57 PM, Hans Verkuil wrote:
> On 15/02/2021 12:32, Stanimir Varbanov wrote:
>>
>>
>> On 2/9/21 1:05 PM, Hans Verkuil wrote:
>>> On 09/02/2021 10:45, Stanimir Varbanov wrote:
>>>> Add decoder v4l2 control to set conceal color.
The commit 646cafc6 (clk: Change clk_ops->determine_rate to
return a clk_hw as the best parent) opens a possibility for
null pointer dereference, fix this.
Signed-off-by: Stanimir Varbanov
---
drivers/clk/clk.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/driv
Hi Andy,
On 09/07/2014 08:55 PM, Stanimir Varbanov wrote:
> The BAM is tightly coupled with the peripheral to which it
> belongs. In that sprit to access the BAM configuration
> registers the driver needs to enable some peripheral
> clocks. Currently the DT node enables bamclk whic
Hi Arnd,
Thanks for the comments!
On 12/12/2014 07:33 PM, Arnd Bergmann wrote:
> On Friday 12 December 2014 19:14:01 Stanimir Varbanov wrote:
>> +config ARCH_APQ8084
>> + bool "Enable support for APQ8084"
>> + select HAVE_ARM_ARCH_TIMER
>>
Hi Gilad,
On 01/20/2015 03:10 AM, Gilad Avidov wrote:
> Qualcomm PMIC Arbiter version-2 changes from version-1 are:
>
> - Some diffrent register offsets.
> - New channel register space, one per PMIC peripheral (ppid).
> All tx tarffic uses these channels.
> - New observer register space. All rx
Hi Gilad,
>>
>>> -/* Non-data command */
>>> -static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid)
>>> +static int
>>> +pmic_arb_non_data_cmd_v1(struct spmi_controller *ctrl, u8 opc, u8 sid)
>>> {
>>> struct spmi_pmic_arb_dev *pmic_arb =
>>> spmi_controller_get_drvdata
Hi Gilad,
>> /* Interrupt Controller */
>> #define SPMI_PIC_OWNER_ACC_STATUS(M, N) (0x + ((32 * (M)) + (4 *
>> (N
>
> It looks like these macros would change too, but nothing has been done
> here. Interrupts haven't been tested?
Stephen is right, the irq related operations are n
Enables generic pinconf support and add handling for 'input-enable'
pinconf property.
Signed-off-by: Stanimir Varbanov
---
drivers/pinctrl/qcom/pinctrl-msm.c | 17 -
1 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
for register addresses
pinctrl: qcom: Add msm8916 pinctrl driver
Stanimir Varbanov (1):
DT: pinctrl: Document Qualcomm MSM8916 pinctrl binding
.../bindings/pinctrl/qcom,msm8916-pinctrl.txt | 186 +++
drivers/pinctrl/qcom/Kconfig |8 +
drivers/pinctrl/qcom
From: Joonwoo Park
Newer MSM SoCs have TLMM hardware block upper than 16 bit. Increase to
32 bit registers to hold addresses correctly.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
---
drivers/pinctrl/qcom/pinctrl-msm.h | 10 +-
1 files changed, 5 insertions(+), 5
From: Joonwoo Park
Add initial pinctrl driver to support pin configuration with
pinctrl framework for msm8916.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
---
drivers/pinctrl/qcom/Kconfig |8 +
drivers/pinctrl/qcom/Makefile |1 +
drivers/pinctrl
Adds devicetree binding documentation.
Signed-off-by: Stanimir Varbanov
---
.../bindings/pinctrl/qcom,msm8916-pinctrl.txt | 186
1 files changed, 186 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt
Hi Stephen,
Thanks for the comments!
On 01/27/2015 03:18 AM, Stephen Boyd wrote:
> On 01/26/15 08:24, Stanimir Varbanov wrote:
>> Enables generic pinconf support and add handling for 'input-enable'
>> pinconf property.
>>
>> Signed-off-by: Stanimir Varb
On 01/27/2015 03:23 AM, Stephen Boyd wrote:
> On 01/26/15 17:18, Stephen Boyd wrote:
>> On 01/26/15 08:24, Stanimir Varbanov wrote:
>>
>>> return -ENOTSUPP;
>>> }
>>>
>>> @@ -208,14 +208,12 @@ st
Hi Andy,
On 01/28/2015 12:10 AM, Andy Gross wrote:
> This patch adds automatic configuration for the ADM CRCI muxing required to
> support DMA operations for GSBI clients. The GSBI mode and instance determine
> the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
> works pr
pinctrl driver
Stanimir Varbanov (1):
DT: pinctrl: Document Qualcomm MSM8916 pinctrl binding
.../bindings/pinctrl/qcom,msm8916-pinctrl.txt | 186 +++
drivers/pinctrl/qcom/Kconfig |8 +
drivers/pinctrl/qcom/Makefile |1 +
drivers/pinctrl
From: Joonwoo Park
On newer TLMM hardware blocks the registers are spread and
we need an offsets upper than 16 bits to address them. Increase
the register offset variables to 32 bits size.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
Reviewed-by: Bjorn Andersson
---
drivers
From: Joonwoo Park
Add initial pinctrl driver to support pin configuration with
pinctrl framework for msm8916.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
Reviewed-by: Bjorn Andersson
---
drivers/pinctrl/qcom/Kconfig |8 +
drivers/pinctrl/qcom/Makefile
Adds devicetree binding documentation.
Signed-off-by: Stanimir Varbanov
Reviewed-by: Bjorn Andersson
---
.../bindings/pinctrl/qcom,msm8916-pinctrl.txt | 186
1 files changed, 186 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings
Hi Vikash,
On 05/17/2018 02:32 PM, Vikash Garodia wrote:
> This adds support to load the video firmware
> and bring ARM9 out of reset. This is useful
> for platforms which does not have trustzone
> to reset the ARM9.
>
> Signed-off-by: Vikash Garodia
> ---
> .../devicetree/bindings/media/qcom,v
Hi Vikash,
On 05/17/2018 02:32 PM, Vikash Garodia wrote:
> In order to invoke scm calls, ensure that the platform
> has the required support to invoke the scm calls in
> secure world. This code is in preparation to add PIL
> functionality in venus driver.
>
> Signed-off-by: Vikash Garodia
> ---
Hi,
On 05/22/2018 04:02 PM, Stanimir Varbanov wrote:
> Hi Vikash,
>
> On 05/17/2018 02:32 PM, Vikash Garodia wrote:
>> This adds support to load the video firmware
>> and bring ARM9 out of reset. This is useful
>> for platforms which does not have trustzone
>> to
Hi Jordan,
On 22.05.2018 22:50, Jordan Crouse wrote:
On Tue, May 22, 2018 at 04:04:51PM +0300, Stanimir Varbanov wrote:
Hi Vikash,
On 05/17/2018 02:32 PM, Vikash Garodia wrote:
In order to invoke scm calls, ensure that the platform
has the required support to invoke the scm calls in
secure
sertions(+), 1 deletion(-)
Acked-by: Stanimir Varbanov
--
regards,
Stan
Hi,
On 03/27/2018 09:52 PM, Rishabh Bhatnagar wrote:
> LLCC (Last Level Cache Controller) provides additional cache memory
> in the system. LLCC is partitioned into muliple slices and each
> slice getting its own priority, size, ID and other config parameters.
> LLCC driver programs these paramete
Hi,
On 03/27/2018 09:52 PM, Rishabh Bhatnagar wrote:
> Documentation for last level cache controller device tree bindings,
> client bindings usage examples.
>
> Signed-off-by: Channagoud Kadabi
> Signed-off-by: Rishabh Bhatnagar
> ---
> .../devicetree/bindings/arm/msm/qcom,llcc.txt | 70
Hi Vikash,
Please write the comments for the chunk of code for which they are refer to.
On 2.05.2018 10:40, Vikash Garodia wrote:
Hello Stanimir,
On 2018-04-24 18:14, Stanimir Varbanov wrote:
This is implementing a multi-stream decoder support. The multi
stream gives an option to use the
This makes possible to handle session_continue for 4xx as well.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/venus/hfi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/qcom/venus/hfi.c
b/drivers/media/platform/qcom/venus/hfi.c
Data pointer should be incremented by size of the structure not
the size of a pointer, correct the mistake.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/venus/hfi_msgs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/qcom/venus
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