[PATCH] clk: divider: Introduce CLK_DIVIDER_ALLOW_ZERO flag

n the clk-divider model. Signed-off-by: Soren Brinkmann --- drivers/clk/clk-divider.c| 5 +++-- include/linux/clk-provider.h | 8 +++- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 68b4021..6d96741 100644 --- a/dr

[PATCH] clk: Properly handle notifier return values

passes this value back to the caller. clk_set_parent() compares this return value against NOTIFY_STOP only, ignoring NOTIFY_BAD returns. Use NOTIFY_STOP_MASK to detect a negative notifier return value and document all four return value options. Signed-off-by: Soren Brinkmann --- drivers/clk

[PATCH] clk: divider: Use DIV_ROUND_CLOSEST

Use the DIV_ROUND_CLOSEST macro to calculate divider values and minimize rounding errors. Cc: linux-arm-ker...@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Soren Brinkmann --- Hi, I just came across this behavior: I'm using the clk-divider as cpuclock which can be s

[PATCH RFC 3/3] arm: dt: zynq: Mark TTC input clock as unstable

On Zynq the TTC's input clock is directly derived from the CPU clock. I.e. the input clock is not constant but scales with the CPU frequency. Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/zynq-7000.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/zynq

[PATCH RFC 2/3] clocksource/cadence_ttc: Make clocksource optional

flag - 'input-clock-unstable' - is added to the DT bindings for this driver. In case the flag is present the driver does not register the timer as clocksource. Signed-off-by: Soren Brinkmann --- Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt | 4 driv

[PATCH RFC 0/3] clocksource/cadence_ttc: Handle frequency changes

eply to this cover letter. I have both series listed below. Both are based on tip/timers/core. Thanks, Sören Approach 1, don't register as clocksource: Soren Brinkmann (3): clocksource/cadence_ttc: Remove clocksource clock notifier clocksource/cadence_ttc: Make clocksource

[PATCH RFC] clocksource/cadence_ttc: Overhaul clocksource frequency adjustment

nstant, so that sleep() & co keep working as expected, while supporting cpufreq and suspend. Signed-off-by: Soren Brinkmann --- The notifiers do always trigger, even when the TTC is not the current clocksource. Is there a good way to prevent this? drivers/clocksource/cadence_ttc

[PATCH RFC 1/3] clocksource/cadence_ttc: Remove clocksource clock notifier

ailable HR clocksource. Signed-off-by: Soren Brinkmann --- drivers/clocksource/cadence_ttc_timer.c | 44 - 1 file changed, 44 deletions(-) diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index b2bb3a4b..99ec898 10

[PATCH v2 2/2] clocksource/cadence_ttc: Reuse clocksource as sched_clock

Reuse the TTC clocksource timer as sched clock provider. Signed-off-by: Soren Brinkmann --- v2: - #include linux/sched_clock.h instead of asm/sched_clock.h - remove Kconfig options and #ifdefs around sched_clock related code The reasons for having those are obsolete, since ARM deprecated

[PATCH v2 0/2] clocksource/cadence_ttc: Add sched_clock functionality

instead of asm/sched_clock.h - remove Kconfig options and #ifdefs around sched_clock related code The reasons for having those are obsolete, since ARM deprecated its custom sched_clock framework and migrated to the common one. Soren Brinkmann (2): clocksource/cadence_ttc: Remove unused

[PATCH v2 1/2] clocksource/cadence_ttc: Remove unused header

The clk-provider.h header is not required by this driver. Signed-off-by: Soren Brinkmann --- drivers/clocksource/cadence_ttc_timer.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index 4cbe28c..0eefc8d

[PATCH v2 0/4] arm: zynq: Enable global timer

oposal - introduce new CLOCK_EVT_FEAT_PERCPU flag - set the flag for the arm_global_timer - filter per cpu devices based on this flag when choosing the broadcast device - rename DT node to avoid '_'s Soren Brinkmann (4): clockchips: Add FEAT_PERCPU clockevent flag clocksource/arm

[PATCH v2 2/4] clocksource/arm_global_timer: Set FEAT_PERCPU flag

The arm_global_timer is a per cpu device. Set the appropriate flag. Signed-off-by: Soren Brinkmann --- drivers/clocksource/arm_global_timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/arm_global_timer.c b/drivers/clocksource/arm_global_timer.c

[PATCH v2 4/4] arm: zynq: Enable arm_global_timer

Zynq is based on an ARM Cortex-A9 MPCore, which features the arm_global_timer in its SCU. Therefore enable the timer for Zynq. Signed-off-by: Soren Brinkmann Acked-by: Daniel Lezcano --- v2: - rename DT node: global_timer@... => timer@... - add Daniel's ACK --- arch/arm/boot/dts/z

[PATCH v2 3/4] tick: broadcast: Deny per-cpu clockevents from being broadcast sources

broadcast source but so far we haven't needed this and supporting it is rather complicated. Let's just deny the possibility for now until this becomes a reality (let's hope it never does!). Signed-off-by: Soren Brinkmann --- kernel/time/tick-broadcast.c | 1 + 1 file changed, 1 i

[PATCH v2 1/4] clockchips: Add FEAT_PERCPU clockevent flag

Add the flag CLOCK_EVT_FEAT_PERCPU which is supposed to be set for per cpu clockevent devices. Signed-off-by: Soren Brinkmann --- include/linux/clockchips.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/clockchips.h b/include/linux/clockchips.h index 0857922..493aa02 100644

[PATCH v2] clk: si570: Add a driver for SI570 oscillators

Add a driver for SILabs 570, 571, 598, 599 programmable oscillators. The devices generate low-jitter clock signals and are reprogrammable via an I2C interface. Cc: Guenter Roeck Signed-off-by: Soren Brinkmann --- v2: - document clock-output-names in bindings documentation - don'

[PATCH v2] clk: si570: Add a driver for SI570 oscillators

Add a driver for SILabs 570, 571, 598, 599 programmable oscillators. The devices generate low-jitter clock signals and are reprogrammable via an I2C interface. Cc: Guenter Roeck Signed-off-by: Soren Brinkmann --- v2: - document clock-output-names in bindings documentation - don'

[PATCH v3] clk: si570: Add a driver for SI570 oscillators

Add a driver for SILabs 570, 571, 598, 599 programmable oscillators. The devices generate low-jitter clock signals and are reprogrammable via an I2C interface. Cc: Guenter Roeck Signed-off-by: Soren Brinkmann --- v3: - add delay in the path for small frequency changes, which can take up to

[PATCH v4] clk: si570: Add a driver for SI570 oscillators

Add a driver for SILabs 570, 571, 598, 599 programmable oscillators. The devices generate low-jitter clock signals and are reprogrammable via an I2C interface. Cc: Guenter Roeck Signed-off-by: Soren Brinkmann --- v4: - actually check and handle error on clk_set_rate() call v3: - add delay in

[PATCH 1/2] tick: broadcast: Deny per-cpu clockevents from being broadcast sources

From: Stephen Boyd On most ARM systems the per-cpu clockevents are truly per-cpu in the sense that they can't be controlled on any other CPU besides the CPU that they interrupt. If one of these clockevents were to become a broadcast source we will run into a lot of trouble because the broadcast s

[PATCH 2/2] arm: zynq: Enable arm_global_timer

Zynq is based on an ARM Cortex-A9 MPCore, which features the arm_global_timer in its SCU. Therefore enable the timer for Zynq. Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/zynq-7000.dtsi | 8 arch/arm/mach-zynq/Kconfig | 1 + 2 files changed, 9 insertions(+) diff --git a

[PATCH 0/2] arm: zynq: Enable global timer

ml/2013/7/22/649 and required to prevent the global_timer from becoming the broadcast device, since the system will hang otherwise. Soren Brinkmann (1): arm: zynq: Enable arm_global_timer Stephen Boyd (1): tick: broadcast: Deny per-cpu clockevents from being broadcast sources arch/arm/boot/dt

[PATCH] SI570 clock driver

ested. Thanks, Sören Soren Brinkmann (1): clk: si570: Add a driver for SI570 oscillators .../devicetree/bindings/clock/silabs,si570.txt | 31 ++ drivers/clk/Kconfig| 10 + drivers/clk/Makefile | 1 + drivers/cl

[PATCH] clk: si570: Add a driver for SI570 oscillators

Add a driver for SILabs 570, 571, 598, 599 programmable oscillators. The devices generate low-jitter clock signals and are reprogrammable via an I2C interface. Cc: Guenter Roeck Signed-off-by: Soren Brinkmann --- .../devicetree/bindings/clock/silabs,si570.txt | 31 ++ drivers/clk/Kconfig

[PATCH 1/2] clk/zynq/clkc: Add 'fclk-enable' feature

g. The default value for 'fclk-enable' is '0xf' (all FCLK's enabled by the bootloader are enabled through the clkc. Signed-off-by: Soren Brinkmann --- .../devicetree/bindings/clock/zynq-7000.txt | 4 drivers/clk/zynq/clkc.c

[PATCH 2/2] arm: dt: zynq: Add fclk-enable property to clkc node

Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/zynq-7000.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index e32b92b949d2..b48d0403537b 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq

[PATCH v2 1/2] clk/zynq/clkc: Add 'fclk-enable' feature

can enable and control it through the CCF as usual. If an FCLK is enabled by bootloaders AND the corresponding bit in the 'fclk-enable' DT property is set, that FCLK will be enabled by the clkc, resulting in an off by one reference count for that clock. Ensuring it will always be runni

[PATCH v2 2/2] arm: dt: zynq: Add fclk-enable property to clkc node

Signed-off-by: Soren Brinkmann --- This is kind of optional since it does not have any effect due to the changed default in 1/2. v2: - no change arch/arm/boot/dts/zynq-7000.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000

[PATCH v5] clk: si570: Add a driver for SI570 oscillators

Add a driver for SILabs 570, 571, 598, 599 programmable oscillators. The devices generate low-jitter clock signals and are reprogrammable via an I2C interface. Cc: Guenter Roeck Signed-off-by: Soren Brinkmann --- v5: - fix typo in bindings documentation - mention the unit for the 'temper

Re: [PATCH v2 2/5] clk: Add support for fundamental zynq clks

One note below: On Wed, Oct 31, 2012 at 12:58:52PM -0600, Josh Cartwright wrote: > Provide simplified models for the necessary clocks on the zynq-7000 > platform. Currently, the PLLs, the CPU clock network, and the basic > peripheral clock networks (for SDIO, SMC, SPI, QSPI, UART) are modelled. >

Re: [PATCH v2 0/5] zynq clk support

Hi Josh, did you also have a look at what is available in the Xilinx git repository? There are also quite some patches to support common clock and port drivers over to using it. It would be great if we could combine our efforts instead of ending up with competing solutions. Thanks, Soren -- To

[PATCH 2/7] arm: zynq: timer: Remove unnecessary register write

Acknowedging an interrupt requires to read the interrupt register only. The write was only required to work around a bug in the QEMU implementation of the TTC, which is fixed. Signed-off-by: Soren Brinkmann Acked-by: Peter Crosthwaite --- @Peter: I took over your ACK, since it's the same c

[PATCH 5/7] arm: zynq: timer: Remove redundant #includes

Some #includes are implicitly included through others, some are just not needed. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/timer.c | 8 1 file changed, 8 deletions(-) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 4b81ae1..2b23d0f 100644 --- a

[PATCH 0/7] Updates for Zynq's timer driver

took over 'Ackec-by' lines from those commits. Soren Soren Brinkmann (7): arm: zynq: timer: Replace PSS through PS arm: zynq: timer: Remove unnecessary register write arm: zynq: timer: Remove unused #defines arm: zynq: timer: Align columns arm: zynq: timer: Remove

[PATCH 6/7] arm: zynq: timer: Fix comment style

Fixing multi line comment style at two locations. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/timer.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 2b23d0f..7b2e047 100644 --- a/arch/arm/mach

[PATCH 3/7] arm: zynq: timer: Remove unused #defines

Signed-off-by: Soren Brinkmann Acked-by: Michal Simek Acked-by: John Linn --- Michal/John: I took over you ACKs since we applied the same change to the Xilinx tree recently. Let me know if I should remove them. arch/arm/mach-zynq/timer.c | 3 --- 1 file changed, 3 deletions(-) diff --git a

[PATCH 7/7] arm: zynq: timer: Set clock_event cpumask

The timers are common to both A9 cores, so let's set the clock event struct's cpumask accordingly, to all possible CPUs. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/timer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zy

[PATCH 4/7] arm: zynq: timer: Align columns

Aligning the columns in a block of #defines, so that the values are starting in the same colum on every line. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/timer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq

[PATCH 1/7] arm: zynq: timer: Replace PSS through PS

The acronym PSS is deprecated by Xilinx. The correct term, which is also used in Xilinx documentation is PS (processing system). This is just a search and replace: - s/PSS/PS/g - s/pss/ps/g Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/common.c | 6 +- arch/arm/mach-zynq/common.h

Re: [PATCH 1/7] arm: zynq: timer: Replace PSS through PS

Hi Josh, On Tue, Dec 18, 2012 at 08:31:20PM -0600, Josh Cartwright wrote: > On Tue, Dec 18, 2012 at 04:16:33PM -0800, Soren Brinkmann wrote: > > The acronym PSS is deprecated by Xilinx. The correct term, which is > > also used in Xilinx documentation is PS (processing system). >

Re: [PATCH 0/7] Updates for Zynq's timer driver

Hi Josh, On Tue, Dec 18, 2012 at 08:59:45PM -0600, Josh Cartwright wrote: > On Tue, Dec 18, 2012 at 04:16:32PM -0800, Soren Brinkmann wrote: > > I started to put some effort on syncing the Xilinx Linux tree with mainline > > and > > the timer driver is my first victim.

[PATCH v2 0/7] Updates for Zynq's timer driver

by' line though. v2: - extend receipient list - adding reviewed by lines to commit messages Soren Soren Brinkmann (7): arm: zynq: timer: Replace PSS through PS arm: zynq: timer: Remove unnecessary register write arm: zynq: timer: Remove unused #defines arm: zynq: timer: Align c

[PATCH v2 3/7] arm: zynq: timer: Remove unused #defines

Signed-off-by: Soren Brinkmann Acked-by: Michal Simek Acked-by: John Linn Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq/timer.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index f1d224b..80bf474 100644 --- a/arch/arm/mach

[PATCH v2 4/7] arm: zynq: timer: Align columns

Aligning the columns in a block of #defines, so that the values are starting in the same colum on every line. Signed-off-by: Soren Brinkmann Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq/timer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-zynq

[PATCH v2 5/7] arm: zynq: timer: Remove redundant #includes

Some #includes are implicitly included through others, some are just not needed. Signed-off-by: Soren Brinkmann Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq/timer.c | 8 1 file changed, 8 deletions(-) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index

[PATCH v2 7/7] arm: zynq: timer: Set clock_event cpumask

The timers are common to both A9 cores, so let's set the clock event struct's cpumask accordingly, to all possible CPUs. Signed-off-by: Soren Brinkmann Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq/timer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-zynq

[PATCH v2 1/7] arm: zynq: timer: Replace PSS through PS

The acronym PSS is deprecated by Xilinx. The correct term, which is also used in Xilinx documentation is PS (processing system). This is just a search and replace: - s/PSS/PS/g - s/pss/ps/g Signed-off-by: Soren Brinkmann Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq/common.c | 6

[PATCH v2 6/7] arm: zynq: timer: Fix comment style

Fixing multi line comment style at two locations. Signed-off-by: Soren Brinkmann Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq/timer.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 2b23d0f

[PATCH v2 2/7] arm: zynq: timer: Remove unnecessary register write

Acknowedging an interrupt requires to read the interrupt register only. The write was only required to work around a bug in the QEMU implementation of the TTC, which is fixed. Signed-off-by: Soren Brinkmann Acked-by: Peter Crosthwaite Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq

Re: [PATCH 4/4] clk: zynq: Use of_init_clk_data()

Hi Stephen, I guess Josh is the better person to talk about this, since he created the patches regarding common clock for mainline, but I tried running your series and ran into this: Unable to handle kernel NULL pointer dereference at virtual address 002a pgd = c0004000 [002a] *pgd=00

Re: [PATCH 4/4] clk: zynq: Use of_init_clk_data()

On Wed, Dec 19, 2012 at 12:30:21PM -0800, Stephen Boyd wrote: > On 12/19/12 11:22, Soren Brinkmann wrote: > > Hi Stephen, > > > > I guess Josh is the better person to talk about this, since he created the > > patches regarding common clock for mainline, but I tried runn

[PATCH v2 0/3] Zynq: Support more boards

ed support Soren Brinkmann (3): arm: zynq: Remove board specific compatibility string arm: dt: zynq: Add support for the zc706 platform arm: dt: zynq: Add support for the zed platform arch/arm/boot/dts/Makefile | 4 +++- arch/arm/boot/dts/zynq-zc706.dts | 31 +++

[PATCH v2 3/3] arm: dt: zynq: Add support for the zed platform

Add a DT fragment for the Zed Zynq platform and a corresponding target to the Makefile Signed-off-by: Soren Brinkmann --- I used the 'xlnx,...' compat strings since it seems this is what is used in the Xilinx and Digilent vendor trees. Sören arch/arm/boot/dts/Makefil

[PATCH v2 2/3] arm: dt: zynq: Add support for the zc706 platform

Add a DT fragment for the zc706 Zynq platform and a corresponding target to the Makefile. Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/Makefile | 3 ++- arch/arm/boot/dts/zynq-zc706.dts | 31 +++ 2 files changed, 33 insertions(+), 1 deletion(-) create

[PATCH v2 1/3] arm: zynq: Remove board specific compatibility string

It is not necessary to have board specific compatibility strings in the platform code. The board dts files can use the more generic 'xlnx,zynq-7000' string. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/common.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm

[PATCH v3 3/4] arm: dt: zynq: Add support for the zc706 platform

Add a DT fragment for the zc706 Zynq platform and a corresponding target to the Makefile. Signed-off-by: Soren Brinkmann --- v3: - adding the 'status' override for the UART node - changing the console device to ttyPS0 arch/arm/boot/dts/Makefile | 3 ++- arch/arm/boot/dts/

[PATCH v3 2/4] arm: dt: zynq: Use 'status' property for UART nodes

Set the default status for UARTs to disabled in the zynq-7000.dtsi file and let board dts files enable the UARTs on demand. Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/zynq-7000.dtsi | 2 ++ arch/arm/boot/dts/zynq-zc702.dts | 6 +- 2 files changed, 7 insertions(+), 1 deletion

[PATCH v3 1/4] arm: zynq: Remove board specific compatibility string

It is not necessary to have board specific compatibility strings in the platform code. The board dts files can use the more generic 'xlnx,zynq-7000' string. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/common.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm

[PATCH v3 0/4] Zynq: Support more boards

ed support Soren Brinkmann (4): arm: zynq: Remove board specific compatibility string arm: dt: zynq: Use 'status' property for UART nodes arm: dt: zynq: Add support for the zc706 platform arm: dt: zynq: Add support for the zed platform arch/arm/boot/dts/Makefile | 4 +++

[PATCH v3 4/4] arm: dt: zynq: Add support for the zed platform

Add a DT fragment for the Zed Zynq platform and a corresponding target to the Makefile Signed-off-by: Soren Brinkmann --- v3: - adding the 'status' override for the UART node - changing the console device to ttyPS0 - dropped 'xlnx,zynq-zed' compat string arch/arm/boot/d

[PATCH] clk/zynq/clkc: Add dedicated spinlock for the SWDT

The clk_mux for the system watchdog timer reused the register lock dedicated to the Ethernet module - for no apparent reason. Add a lock dedicated to the SWDT's clock register to remove this wrong dependency. Signed-off-by: Soren Brinkmann --- I don't know how this slipped in... Anywa

[PATCH] clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxes

ch is required to achieve this. Signed-off-by: Soren Brinkmann --- drivers/clk/zynq/clkc.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c index 515a573..089d3e3 100644 --- a/drivers/clk/zynq/clkc.c +++ b/drivers/clk/zynq

[PATCH RFC 0/2] Extend multi_v7_defconfig

Hi all, I don't know how much a defconfig is supposed to provide, hence as RFC. This patches are needed for booting Zynq into a minimum ramfs based system with a serial console. Thanks, Sören Soren Brinkmann (2): arm: multi_v7_defconfig: Enable Zynq UART driver

[PATCH RFC 2/2] arm: multi_v7_defconfig: Enable initrd/initramfs support

Add CONFIG_BLK_DEV_INITRD to the defconfig to support initramfs and initrd. Signed-off-by: Soren Brinkmann --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index d5f0d76

[PATCH RFC 1/2] arm: multi_v7_defconfig: Enable Zynq UART driver

Signed-off-by: Soren Brinkmann --- arch/arm/configs/multi_v7_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 2e67a27..d5f0d76 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs

[PATCH] arm: dt: zynq: Add support for the zc706 platform

Add a DT fragment for the zc706 Zynq platform. Also, adding a corresponding target to the Makefile and adding an appropriate compatibility string in the BSP. Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/Makefile | 3 ++- arch/arm/boot/dts/zynq-zc706.dts | 31

[PATCH] clocksource/cadence_ttc: Reuse clocksource as sched_clock

Reuse the TTC clocksource timer as sched clock, too. Since only a single sched clock is supported in Linux, this feature optional and can be selected through Kconfig. Signed-off-by: Soren Brinkmann --- drivers/clocksource/Kconfig | 7 +++ drivers/clocksource/cadence_ttc_timer.c

[PATCH 0/3] arm: zynq: SLCR clean up

These are just a few patches cleaning up the driver - well at least I find it cleaner this way. 3/3 though adds correct read-modify-write for some register accesses. The current implementation doesn't seem to do any harm, but this looks better, IMHO. Sören Soren Brinkmann (3):

[PATCH 2/3] arm: zynq: slcr: Clean up #defines

Use a common naming scheme for register offset #defines: Some of those used a '_OFFSET' suffix to distinguish them from others. This scheme is used for all register offsets now. Separate the register offset #defines from others and sort them in increasing order. Signed-off-by: Soren

[PATCH 3/3] arm: zynq: slcr: Use read-modify-write for register writes

zynq_slcr_cpu_start/stop() ignored the current register state when writing to a register. Fixing this by implementing proper read-modify-write. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/slcr.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch

[PATCH 1/3] arm: zynq: slcr: Remove redundant header #includes

Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/slcr.c | 10 -- 1 file changed, 10 deletions(-) diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index 50d008d..232c275 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -14,18 +14,8

[PATCH] arm: zynq: dt: Set correct L2 ram latencies

Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/zynq-7000.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 6f54a64..e32b92b 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot

[PATCH] arm: zynq: hotplug: Remove unreachable code

zynq_platform_do_lowpower() does never return. Hence remove all code which relies on that function returning and consolidate the remains. Signed-off-by: Soren Brinkmann --- arch/arm/mach-zynq/hotplug.c | 55 1 file changed, 5 insertions(+), 50

[PATCH 2/2] clk/zynq/pll: Use #defines for fbdiv min/max values

Use more descriptive #defines for the minimum and maximum PLL feedback divider. Signed-off-by: Soren Brinkmann --- drivers/clk/zynq/pll.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c index 67f1b5e..26a8d8b 100644

[PATCH 1/2] clk/zynq/pll: Fix documentation for PLL register function

Signed-off-by: Soren Brinkmann --- drivers/clk/zynq/pll.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c index 47e307c..67f1b5e 100644 --- a/drivers/clk/zynq/pll.c +++ b/drivers/clk/zynq/pll.c @@ -182,7 +182,12 @@ static

[PATCH RFC] arm: l2x0: Leverage power saving features

Enable the 'dynamic clock stop' and 'standby mode' features in the l2x0 disable path. Signed-off-by: Soren Brinkmann --- Hi, we are currently implementing a suspend to RAM like low power mode for Zynq. The code for entering suspend looks like this:

[PATCH v2 1/5] tty: xuartps: Remove suspend/resume functions

Currently Zynq does not support suspend/resume. The driver callbacks are never used or tested, broken and using the old PM interface. Signed-off-by: Soren Brinkmann Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-ser...@vger.kernel.org --- drivers/tty/serial/xilinx_uartps.c | 30

[PATCH v2 2/5] clk: zynq: Factor out PLL driver

Refactor the PLL driver so it works with the clock controller driver. Signed-off-by: Soren Brinkmann --- drivers/clk/zynq/pll.c | 235 + 1 file changed, 235 insertions(+) create mode 100644 drivers/clk/zynq/pll.c diff --git a/drivers/clk/zynq

[PATCH v2 4/5] arm: zynq: Migrate platform to clock controller

Migrate the Zynq platform and its drivers to use the new clock controller driver. Signed-off-by: Soren Brinkmann Cc: John Stultz Cc: Thomas Gleixner Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-ser...@vger.kernel.org --- arch/arm/boot/dts/zynq-7000.dtsi| 71

[PATCH v2 5/5] clk: zynq: Remove deprecated clock code

Signed-off-by: Soren Brinkmann Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: devicetree-disc...@lists.ozlabs.org Cc: linux-...@vger.kernel.org --- .../devicetree/bindings/clock/zynq-7000.txt| 49 --- drivers/clk/clk-zynq.c | 378

[PATCH v2 3/5] clk: zynq: Add clock controller driver

Add a clock controller driver and documentation. Signed-off-by: Soren Brinkmann Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: devicetree-disc...@lists.ozlabs.org Cc: linux-...@vger.kernel.org --- .../devicetree/bindings/clock/zynq-7000.txt| 98 drivers/clk/zynq/clkc.c

[PATCH v2 0/5] Zynq: revised CCF code

I rebased this series on v3.10-rc1 eliminating all dependencies and incorporated Greg's feedback. I'll push this also to my github repository. https://github.com/sorenb-xlnx/linux-xlnx/tree/zynq/clkc v2: - dropped the 'sort #includes' patches Sören Soren Brinkmann

[PATCH 0/7] Zynq: revised CCF code

tmail went through fine though. Sören Soren Brinkmann (7): tty: xuartps: Sort #includes alphabetically tty: xuartps: Remove suspend/resume functions clocksource/cadence_ttc: Sort #includes alphabetically clk: zynq: Factor out PLL driver clk: zynq: Add clock controller driver arm:

[PATCH 2/7] tty: xuartps: Remove suspend/resume functions

Currently Zynq does not support suspend/resume. The driver callbacks are never used or tested, broken and using the old PM interface. Signed-off-by: Soren Brinkmann Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-ser...@vger.kernel.org --- drivers/tty/serial/xilinx_uartps.c | 30

[PATCH 3/7] clocksource/cadence_ttc: Sort #includes alphabetically

Signed-off-by: Soren Brinkmann Cc: John Stultz Cc: Thomas Gleixner --- drivers/clocksource/cadence_ttc_timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index 685bc60..ab8fc2c

[PATCH 5/7] clk: zynq: Add clock controller driver

Add a clock controller driver and documentation. Signed-off-by: Soren Brinkmann Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: devicetree-disc...@lists.ozlabs.org Cc: linux-...@vger.kernel.org --- .../devicetree/bindings/clock/zynq-7000.txt| 98 drivers/clk/zynq/clkc.c

[PATCH 6/7] arm: zynq: Migrate platform to clock controller

Migrate the Zynq platform and its drivers to use the new clock controller driver. Signed-off-by: Soren Brinkmann Cc: John Stultz Cc: Thomas Gleixner Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-ser...@vger.kernel.org --- arch/arm/boot/dts/zynq-7000.dtsi| 71

[PATCH 7/7] clk: zynq: Remove deprecated clock code

Signed-off-by: Soren Brinkmann Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: devicetree-disc...@lists.ozlabs.org (moderated list:OPEN FIRMWARE AND...) Cc: linux-...@vger.kernel.org (open list:DOCUMENTATION) --- .../devicetree/bindings/clock/zynq-7000.txt| 49 --- drivers/clk

[PATCH 1/7] tty: xuartps: Sort #includes alphabetically

Signed-off-by: Soren Brinkmann CC: Greg Kroah-Hartman CC: Jiri Slaby CC: linux-ser...@vger.kernel.org --- drivers/tty/serial/xilinx_uartps.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c

[PATCH 4/7] clk: zynq: Factor out PLL driver

Refactor the PLL driver so it works with the clock controller driver. Signed-off-by: Soren Brinkmann --- drivers/clk/zynq/pll.c | 235 + 1 file changed, 235 insertions(+) create mode 100644 drivers/clk/zynq/pll.c diff --git a/drivers/clk/zynq

[PATCH RFC] User space clock driver

feedback on the implementation. I suspect there are better/other ways to do this. Thanks, Sören Soren Brinkmann (1): clk: Introduce userspace clock driver .../devicetree/bindings/clock/clk-userspace.txt| 7 + drivers/clk/Kconfig| 9

[PATCH RFC] clk: Introduce userspace clock driver

The userspace clock driver can be used to expose clock controls through sysfs to userspace. The driver creates entries in /sys/class/clk. Signed-off-by: Soren Brinkmann --- .../devicetree/bindings/clock/clk-userspace.txt| 7 + drivers/clk/Kconfig| 9

[PATCH] clk: Always notify whole subtree when reparenting

tions during a reparent operation. Signed-off-by: Soren Brinkmann --- This should probably be considered an RFC. There may be smarter ways to resolve this issue. E.g. forward notifier counts upstream the way it is done with enable counts. Sören drivers/clk/clk.c | 3 +-- 1 file chang

[PATCH RFC] clk: divider: Tolerate 0 divider for one based dividers

Handle a zero divider value as one/bypass for dividers which have the CLK_DIVIDER_ONE_BASED flag set. Signed-off-by: Soren Brinkmann --- In Zynq we have a lot of dividers which are one based, but at the same time zero is a valid value which is handled as one/bypass. Also, the reset value of some

[PATCH] gpio: xilinx: Drop architecture dependencies

The driver does not have any real architecture dependencies. To avoid listing each architecture that might use this driver on some FPGA-enabled platform, drop these dependencies. Signed-off-by: Soren Brinkmann --- drivers/gpio/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[PATCH v2] gpio: xilinx: Drop architecture dependencies

The driver does not have any real architecture dependencies. To avoid listing each architecture that might use this driver on some FPGA-enabled platform, drop these dependencies. Signed-off-by: Soren Brinkmann Acked-by: Moritz Fischer --- v2: - rebased --- drivers/gpio/Kconfig | 2 +- 1 file

[PATCH] gpio: zynq: Implement irq_(request|release)_resources

The driver uses runtime PM to leverage low power techniques. For use-cases using GPIO as interrupt the device needs to be in an appropriate state. Reported-by: John Linn Signed-off-by: Soren Brinkmann Tested-by: John Linn --- drivers/gpio/gpio-zynq.c | 20 1 file changed

[PATCH 1/3] DT binding: gpio-zynq: Document interrupt-controller

HW and driver support the GPIO as interrupt-controller. Document that in the DT binding. Signed-off-by: Soren Brinkmann --- Documentation/devicetree/bindings/gpio/gpio-zynq.txt | 9 + 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/gpio-zynq.txt b

[PATCH 3/3] ARM64: zynqmp: DT: Add interrupt-controller property to GPIO

GPIO can be used as interrupt-controller. Add the missing properties to the GPIO node. Signed-off-by: Soren Brinkmann --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi

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