Introduce custom dump function and private data per remoteproc dump
segment. The dump function is responsible for filling the device memory
segment associated with coredump
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 16 ++--
include/linux/remoteproc.h
This patch adds a mechanism for assigning each rproc dump segment with
a custom dump function and private data. The dump function is to be
called for each rproc segment during coredump if assigned.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 39
Register the MDT segments, custom dumpfn and private data with the
remoteproc core dump functionality.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 43 ++
1 file changed, 43 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b
The per segment dump function is responsible for loading the mba
before device memory segments associated with coredump can be populated
and for cleaning up the resources post coredump.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 25 +
1 file
Refactor re-useable parts of mba load/unload sequence into mba_load and
mba_reclaim respectively. This is done in order to prevent code duplication
for modem coredump, which requires the mba to be loaded before dumping
the segments. No change in functionality is intended.
Signed-off-by: Sibi
?
I'm not sure exactly, but FWIW I'm running some form of ATF on SDM845
and I'm running with 'needs_memory_protection' (hence, this patch).
AFAIK ATF will eventually support the hyp assign calls even though they
are just stubs as of now.
Regards,
Brian
--
-- Sibi San
Hi Stan,
Thanks for the review!
On 2018-10-29 15:02, Stanimir Varbanov wrote:
Hi Sibi,
On 10/26/2018 03:25 PM, Sibi Sankar wrote:
Add SCM DT node to enable SCM functionality on SDM845.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++
1 file changed, 6
Hi Doug,
Thanks for the review!
I noticed both the quirks just after sending it out :(, will fix them.
On 2018-10-30 00:07, Doug Anderson wrote:
Hi,
On Fri, Oct 26, 2018 at 5:28 AM Sibi Sankar
wrote:
Add reserve-memory nodes for mpss and mba required for
remoteproc mss pil.
Signed-off
Add reserve-memory nodes for mpss and mba required for
remoteproc mss pil.
Reviewed-by: Bjorn Andersson
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot
Introduce RMTFS qmi lookup client to synchronize bring up/down modem
with the REMOTE FS QMI service.
Signed-off-by: Sibi Sankar
---
The currently implemented workaround in the Linaro QCOMLT releases is to
blacklist the qcom_q6v5_pil kernel module and load this explicitly after rmtfs
has been
Hi Bjorn,
Thanks for the review!
On 2018-10-22 01:46, Bjorn Andersson wrote:
On Sun 30 Sep 08:56 PDT 2018, Sibi Sankar wrote:
From: Bjorn Andersson
rmtfs_mem provides access to physical storage and is crucial for the
operation of the Qualcomm modem subsystem.
The rmtfs_mem implementation
Hi Brian,
Thanks for the review!
On 2018-10-18 06:24, Brian Norris wrote:
Hi Sibi,
On Sun, Sep 30, 2018 at 09:26:46PM +0530, Sibi Sankar wrote:
From: Bjorn Andersson
rmtfs_mem provides access to physical storage and is crucial for the
operation of the Qualcomm modem subsystem.
The
more generalised per segment
dump function
V2:
Introduce prepare/unprepare ops for rproc coredump
Sibi Sankar (5):
remoteproc: Introduce custom dump function for each remoteproc segment
remoteproc: Add mechanism for custom dump function assignment
remoteproc: qcom: q6v5-mss: Refactor mba
software bypass to avoid high MX current in mpss error path.
* Remove the proxy votes of clk/regs only after the active/reset clks/regs.
* Reclaim MBA memory after mpss_load failure in mba_reclaim func.
* Set/Unset the dump_mba_loaded flag on mba_load/mba_reclaim respectively.
Signed-off-by: Sibi Sankar
The per segment dump function is responsible for loading the mba
before device memory segments associated with coredump can be populated
and for cleaning up the resources post coredump.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 33 ++
1 file
Introduce custom dump function and private data per remoteproc dump
segment. The dump function is responsible for filling the device memory
segment associated with coredump
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 16 ++--
include/linux/remoteproc.h
Register the MDT segments, custom dumpfn and private data with the
remoteproc core dump functionality.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 42 ++
1 file changed, 42 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b
This patch adds a mechanism for assigning each rproc dump segment with
a custom dump function and private data. The dump function is to be
called for each rproc segment during coredump if assigned.
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/remoteproc_core.c | 39
Hey Phillip,
Will the PDC driver make the cut for reset/next this time for the
4.20rc?
On 09/04/2018 01:06 AM, Bjorn Andersson wrote:
On Wed 29 Aug 12:12 PDT 2018, Sibi Sankar wrote:
This patch series add support for PDC Global (Power Domain Controller)
on SDM845 SoCs and adds pdc reset
Add SCM DT node to enable SCM functionality on SDM845.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index b72bdb0a31a5..fad22acfda4d
This patch adds the node to support PDC Global reset driver on
SDM845 SoCs
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index
Add reserve-memory nodes for mpss and mba required for
remoteproc mss pil.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index
On 1/31/24 15:00, Abel Vesa wrote:
On 24-01-29 17:17:28, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 15:35, Abel Vesa wrote:
From: Sibi Sankar
The UEFI loads a lite variant of the ADSP firmware to support charging
use cases. The kernel needs to unload and reload it with the firmware
A log extraction
support")
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_mss.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
b/drivers/remoteproc/qcom_q6v5_mss.c
index 2a42215ce8e0..32c3531b20c7 100644
--- a/drivers/
On 2021-02-12 01:06, Georgi Djakov wrote:
The unit address of the epss_l3 node is incorrect and does not match
the address of its "reg" property. Let's fix it.
Signed-off-by: Georgi Djakov
Thanks for catching it :)
Reviewed-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/
gt;;
Sorry for the late comments. Can you
please do the same for sc7180-idp
as well?
Reviewed-by: Sibi Sankar
};
/ {
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 1ea3344ab62c..ac956488908f 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
i, fw_name);
+ ret = -EINVAL;
+ break;
seg_fw has to be released on error condition as well.
With ^^ fixed you can have my R-b.
Reviewed-by: Sibi Sankar
+ }
+
release_firmware(seg_fw);
filesz > phdr->p_memsz) {
+ dev_err(dev,
+ "refusing to load segment %d with p_filesz >
p_memsz\n",
+ i);
+ ret = -EINVAL;
+ break;
+
Add all the necessary dt nodes to support SMEM driver
on SDM845. It also adds the required memory carveouts
so that the kernel does not access memory that is in
use.
Signed-off-by: Sibi Sankar
---
This patch depends on:
https://patchwork.kernel.org/patch/10276419/
https://patchwork.kernel.org
Add new compatible string for Qualcomm SDM845 SoCs
Reviewed-by: Rob Herring
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation
This patch add the node to support APSS shared
mailbox on SDM845
Signed-off-by: Sibi Sankar
---
This patch depends on https://patchwork.kernel.org/patch/10276419/
arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845
Add the corresponding APSS shared offset for SDM845 SoC
Signed-off-by: Sibi Sankar
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
index 57bde0dfd12f..75da44d25fac
Include SDM845 APSS shared to the list of possible bindings
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt| 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
b/Documentation
Add all the necessary dt nodes to support SMEM driver
on SDM845. It also adds the required memory carveouts
so that the kernel does not access memory that is in
use.
Signed-off-by: Sibi Sankar
---
This patch depends on:
https://patchwork.kernel.org/patch/10276419/
https://patchwork.kernel.org
Introduce interrupt handler for smp2p ready interrupt and
handle start completion. Remove the proxy votes for clocks
and regulators in the handover interrupt context. Disable
wdog and fatal interrupts on remoteproc device stop and
re-enable them on remoteproc device start.
Signed-off-by: Sibi
separate patches
Corrected few typos and replaced misconfigured author name
V2:
Addressed reset-qcom-aoss review suggestions and reworked
re-ordering of the active clk and reset sequence in
qcom_q6v5_pil
Depends on:
https://patchwork.kernel.org/patch/10363397/
Sibi Sankar (5):
dt
Add SDM845 AOSS (always on subsystem) reset controller binding
Signed-off-by: Sibi Sankar
---
.../bindings/reset/qcom,aoss-reset.txt| 52 +++
include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 ++
2 files changed, 69 insertions(+)
create mode 100644 Documentation
>From SDM845, the Q6SS reset sequence on software side has been
simplified with the introduction of boot FSM which assists in
bringing the Q6 out of reset
Add GLINK subdevice to allow definition of GLINK edge as a
child of modem-pil
Signed-off-by: Sibi Sankar
---
drivers/remotep
Add reset controller driver for Qualcomm SDM845 SoC to
control reset signals provided by AOSS for Modem, Venus
ADSP, GPU, Camera, Wireless, Display subsystem
Signed-off-by: Sibi Sankar
---
drivers/reset/Kconfig | 9 +++
drivers/reset/Makefile | 1 +
drivers/reset/reset
functions to handle SoC specific reset sequences
Signed-off-by: Sibi Sankar
---
drivers/remoteproc/qcom_q6v5_pil.c | 81 --
1 file changed, 76 insertions(+), 5 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index
Add new compatible string for Qualcomm SDM845 SoCs
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings
Hey Doug,
On 2019-02-28 02:33, Doug Anderson wrote:
Hi,
On Tue, Feb 26, 2019 at 3:54 PM Doug Anderson
wrote:
Hi,
On Tue, Feb 5, 2019 at 9:13 PM Bjorn Andersson
wrote:
>
> From: Sibi Sankar
>
> This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
>
> Signed-o
| 35 +++
drivers/soc/qcom/rpmpd.c | 63
+--
include/dt-bindings/power/qcom-rpmpd.h| 9 +++
4 files changed, 88 insertions(+), 20 deletions(-)
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Found
Hey Georgi,
On 4/23/19 6:58 PM, Georgi Djakov wrote:
In addition to frequency and voltage, some devices may have bandwidth
requirements for their interconnect throughput - for example a CPU
or GPU may also need to increase or decrease their bandwidth to DDR
memory based on the current operating
Hey Viresh,
On 4/24/19 12:19 PM, Viresh Kumar wrote:
On 24-04-19, 12:16, Rajendra Nayak wrote:
On 4/23/2019 6:58 PM, Georgi Djakov wrote:
In addition to frequency and voltage, some devices may have bandwidth
requirements for their interconnect throughput - for example a CPU
or GPU may also n
Hey Georgi,
On 4/23/19 6:58 PM, Georgi Djakov wrote:
If the OPP bandwidth values are populated, we want to switch also the
interconnect bandwidth in addition to frequency and voltage.
Signed-off-by: Georgi Djakov
---
drivers/opp/core.c | 9 -
1 file changed, 8 insertions(+), 1 delet
On 2019-03-12 12:47, MyungJoo Ham wrote:
From: Saravana Kannan
If the new governor fails to start, switch back to old governor so
that the
devfreq state is not left in some weird limbo.
[Mjungjoo: assume fatal on revert failure and set df->governor to
NULL]
Signed-off-by: Sibi San
};
+
+ slpi_mem: memory@9670 {
+ reg = <0 0x9670 0 0x140>;
+ no-map;
+ };
+
+ spss_mem: memory@97b0 {
+ reg = <0 0x97b0 0 0x10>;
+ no
CLK>,
+<&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
+ clock-names = "core", "bus";
+ power-domains = <&videocc VCODEC1_GDSC>;
+ };
+ video-firmware {
+ iommus = <&apps_smmu 0x10b2 0x0>;
+ };
+ };
};
};
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Bjorn Andersson (4):
soc: qcom: rpmpd: Modify corner defining macros
dt-bindings: power: Add rpm power domain bindings for qcs404
soc: qcom: rpmpd: Add QCS404 power-domains
arm64: dts: qcom: qcs404: Add rpmpd node
Sibi Sankar (5):
soc: qcom: rpmpd: fixup rpmpd set performance state
soc
state() and
.opp_to_performance_state()")
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c
index 005326050c23..235d01870dd8 100644
--- a/drivers/soc/qcom/rpmpd.c
+++
rpmpd max state varies across SoCs and SoC families, add support
in the driver to make it SoC/SoC family specific
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom
From: Bjorn Andersson
Add the shared cx/mx and the low-power-island's cx and mx power-domains
found on QCS404.
Signed-off-by: Bjorn Andersson
[sibi: Fixup corner/vfc with vlfl/vfl]
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 52 +++-
1
From: Bjorn Andersson
QCS404 uses individual resource type magic for each power-domain, so
adjust the macros slightly to make them reusable for this.
Signed-off-by: Bjorn Andersson
[sibi: Extend rpmpd corner pair to a generic rpmpd pair]
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom
From: Bjorn Andersson
Add the rpmpd node on the qcs404 and define the available levels.
Signed-off-by: Bjorn Andersson
[sibis: fixup available levels]
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 55
1 file changed, 55 insertions(+)
diff
Add the shared cx/mx and sensor sub-system's cx and mx
power-domains found on MSM8998.
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 36
1 file changed, 36 insertions(+)
diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c
From: Bjorn Andersson
Add RPM power domain bindings for the qcs404 family of SoC
Signed-off-by: Bjorn Andersson
[sibis: Add supported rpmpd states for qcs404]
Signed-off-by: Sibi Sankar
---
skip adding Rob's R-b due to some additional changes
https://lore.kernel.org/lkml/201903252
Add the rpmpd node on the msm8998 and define the available levels.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 51 +++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
Add RPM power domain bindings for the msm8998 family of SoC
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/power/qcom,rpmpd.txt | 1 +
include/dt-bindings/power/qcom-rpmpd.h | 12
2 files changed, 13 insertions(+)
diff --git a/Documentation
On 2019-03-25 09:51, Rajendra Nayak wrote:
On 3/24/2019 11:20 PM, Sibi Sankar wrote:
From: Bjorn Andersson
Add RPM Power domain bindings for the qcs404 family of SoC
[sibis: Add supported rpmpd states for qcs404]
Signed-off-by: Sibi Sankar
SoB ordering seems wrong.
will re-order them in
On 2019-03-25 09:33, Rajendra Nayak wrote:
On 3/24/2019 11:19 PM, Sibi Sankar wrote:
Fixup rpmpd state to max if the required state is greater than all the
supported states.
This should also say why, 'so the clients which just want to vote on
whatever
is the max state supported can do
On 2019-03-25 09:36, Rajendra Nayak wrote:
On 3/24/2019 11:20 PM, Sibi Sankar wrote:
Add support to set rpmpd state to max across SoCs.
Changelog could be better, 'rpmpd max state varies across SoCs
and SoC families, add support in the driver to make it SoC/SoC
family specific'
On 2019-03-25 09:37, Rajendra Nayak wrote:
On 3/24/2019 11:20 PM, Sibi Sankar wrote:
From: Bjorn Andersson
QCS404 uses individual resource type magic for each power-domain, so
adjust the macros slightly to make them reusable for this.
[sibi: Extend rpmpd corner pair to a generic rpmpd pair
On 2019-03-27 18:08, Sibi Sankar wrote:
From: Bjorn Andersson
Add the rpmpd node on the qcs404 and define the available levels.
Signed-off-by: Bjorn Andersson
[sibis: fixup available levels]
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 55
On 2019-03-27 18:08, Sibi Sankar wrote:
Add the rpmpd node on the msm8998 and define the available levels.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 51 +++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998
On 2019-04-05 20:38, Marc Gonzalez wrote:
On 27/03/2019 13:38, Sibi Sankar wrote:
Add the shared cx/mx and sensor sub-system's cx and mx
power-domains found on MSM8998.
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/rpmpd.c | 36
1 file change
Hey Marc,
Thanks for the review!
On 2019-04-08 14:24, Marc Gonzalez wrote:
On 08/04/2019 10:30, Sibi Sankar wrote:
On 2019-04-05 20:38, Marc Gonzalez wrote:
On 27/03/2019 13:38, Sibi Sankar wrote:
Add the shared cx/mx and sensor sub-system's cx and mx
power-domains found on MSM8998.
S
Hey Viresh,
Thanks for the review!
On 2019-04-10 15:54, Viresh Kumar wrote:
On 28-03-19, 20:58, Sibi Sankar wrote:
Add and export 'dev_pm_opp_update_voltage' to find and update voltage
of an opp for a given frequency. This will be useful to update the
opps
with voltages read
On 2019-04-10 16:03, Viresh Kumar wrote:
On 28-03-19, 20:58, Sibi Sankar wrote:
Add support to parse and update OPP tables attached to the cpu nodes.
Signed-off-by: Sibi Sankar
---
drivers/cpufreq/qcom-cpufreq-hw.c | 29 +++--
1 file changed, 27 insertions(+), 2
On 2019-03-28 20:58, Sibi Sankar wrote:
This RFC series aims to add cpu based scaling support to the passive
governor and scale DDR with a generic interconnect bandwidth based
devfreq driver on SDM845 SoC. This series achieves similar
functionality
to Georgi's Patch series (
On 2020-06-01 09:37, Viresh Kumar wrote:
On 29-05-20, 19:47, Sibi Sankar wrote:
opp_np needs to be subjected
to NULL check as well.
No, it isn't. It should already be valid and is set by the OPP core.
Actually we don't need to do of_node_get(opp_table->np) and just use
np, I di
On 2020-06-01 12:43, Viresh Kumar wrote:
On 01-06-20, 12:09, Sibi Sankar wrote:
On 2020-06-01 09:37, Viresh Kumar wrote:
> On 29-05-20, 19:47, Sibi Sankar wrote:
> > opp_np needs to be subjected
> > to NULL check as well.
>
> No, it isn't. It should already be valid
On 2020-06-01 15:45, Viresh Kumar wrote:
On 01-06-20, 15:30, Sibi Sankar wrote:
Yeah dev_pm_opp_add/dev_pm_opp_set_clkname
or pretty much any api doing a
dev_pm_opp_get_opp_table without
a opp_table node associated with
it will run into this issue.
Not sure if what you wrote now is correct
Hey Rakesh,
On 2020-05-20 00:23, Rakesh Pillai wrote:
Add device node for the ath10k SNOC platform driver probe
and add resources required for WCN3990 on sc7180 soc.
Signed-off-by: Rakesh Pillai
---
Changes from v9:
- Place the wlan_fw_mem under reserved-memory node
---
arch/arm64/boot/dts/qc
reserved memory, since
its already added as reserved memory in board DT file.
Reviewed-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sc7180-idp.dts | 7 +++
arch/arm64/boot/dts/qcom/sc7180.dtsi| 22 ++
2 files changed, 29 insertions(+)
diff --git a/arch/arm64/boot
On 2020-05-20 01:27, Saravana Kannan wrote:
On Tue, May 19, 2020 at 11:58 AM Rob Herring wrote:
On Tue, May 12, 2020 at 03:53:26PM +0300, Georgi Djakov wrote:
> From: Sibi Sankar
>
> Add interconnect-tags bindings to enable passing of optional
> tag information to the interconne
On 2020-05-21 06:33, Stephen Boyd wrote:
The modem node has an address of 408 and thus should come after
tlmm
and before gpu. Move the node to the right place to maintainer proper
address sort order.
Cc: Evan Green
Cc: Sibi Sankar
Fixes: e14a15eba89a ("arm64: dts: qcom: sc7180: Add
on remote processor crash/shutdown.
Signed-off-by: Sibi Sankar
---
drivers/base/power/domain.c | 3 ++-
include/linux/pm_domain.h | 5 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 2cb5e04cf86cd
: Sibi Sankar
---
drivers/soc/qcom/qcom_aoss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c
index ed2c687c16b31..5a5b4bf928147 100644
--- a/drivers/soc/qcom/qcom_aoss.c
+++ b/drivers/soc/qcom/qcom_aoss.c
@@ -366,6 +366,7 @@ static int
Hey Stephen,
Thanks for taking time to review the
series!
On 2020-08-12 03:08, Stephen Boyd wrote:
Quoting Sibi Sankar (2020-08-11 12:02:51)
diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
index ee11502a575b0..3002a2d68936a 100644
--- a/include/linux/pm_domain.h
+++ b
Kevin,
Thanks for taking time to review the
series!
On 2020-08-12 05:49, Kevin Hilman wrote:
Sibi Sankar writes:
This is for power domains which needs to stay powered on for suspend
but can be powered on/off as part of runtime PM. This flag is aimed at
power domains coupled to remote
Uffe,
Thanks for taking time to review the
series!
On 2020-08-12 15:15, Ulf Hansson wrote:
On Tue, 11 Aug 2020 at 21:03, Sibi Sankar wrote:
This is for power domains which needs to stay powered on for suspend
but can be powered on/off as part of runtime PM. This flag is aimed at
power
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SM8250
SoCs.
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
include/dt-bindings/interconnect/qcom,osm-l3.h | 3 +++
2 files changed, 4 insertions(+)
diff --git a
Add Operation State Manager (OSM) L3 interconnect provider support on
SM8150 SoCs.
Signed-off-by: Sibi Sankar
---
drivers/interconnect/qcom/osm-l3.c | 15 +++
drivers/interconnect/qcom/sm8150.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/drivers/interconnect/qcom/osm-l3
Add Epoch Subsystem (EPSS) L3 interconnect provider support on
SM8250 SoCs.
Signed-off-by: Sibi Sankar
---
drivers/interconnect/qcom/osm-l3.c | 23 +++
drivers/interconnect/qcom/sm8250.h | 2 ++
2 files changed, 25 insertions(+)
diff --git a/drivers/interconnect/qcom/osm
Add Operation State Manager (OSM) L3 provider support on SM8150 and Epoch
Subsystem (EPSS) L3 provider support on SM8250 SoCs.
Depends on: https://patchwork.kernel.org/cover/11687925/
Sibi Sankar (7):
dt-bindings: interconnect: Add OSM L3 DT binding on SM8150
interconnect: qcom: Add OSM L3
Add Operation State Manager (OSM) L3 interconnect provider node on
SM8150 SoCs.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index
Add Operation State Manager (OSM) L3 interconnect provider binding on
SM8150 SoCs.
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
Add Epoch Subsystem (EPSS) L3 interconnect provider node on SM8250
SoCs.
Signed-off-by: Sibi Sankar
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index
Lay the groundwork for adding Epoch Subsystem (EPSS) L3 support on
SM8250.
Signed-off-by: Sibi Sankar
---
drivers/interconnect/qcom/osm-l3.c | 37 +-
1 file changed, 26 insertions(+), 11 deletions(-)
diff --git a/drivers/interconnect/qcom/osm-l3.c
b/drivers
On 2020-08-06 22:40, Doug Anderson wrote:
Hi,
On Thu, Aug 6, 2020 at 7:36 AM Sibi Sankar
wrote:
On 2020-08-06 04:32, Stephen Boyd wrote:
> +Sibi who wrote the code
>
> Quoting Doug Anderson (2020-08-05 13:24:06)
>>
>> On Wed, Aug 5, 2020 at 10:36 AM Stephen Boyd
>&
On 2020-08-06 04:32, Stephen Boyd wrote:
+Sibi who wrote the code
Quoting Doug Anderson (2020-08-05 13:24:06)
On Wed, Aug 5, 2020 at 10:36 AM Stephen Boyd
wrote:
>
> Why is the genpd being powered off at all? It looks like the driver is
> written in a way that it doesn't expect this to happ
da Bhanu
Signed-off-by: Rajendra Nayak
Reviewed-by: Sibi Sankar
---
drivers/opp/core.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index 0c8c74a..a994f30 100644
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
@@
On 2020-08-18 14:01, Ulf Hansson wrote:
On Mon, 17 Aug 2020 at 18:49, Sibi Sankar wrote:
On 2020-08-17 14:14, Ulf Hansson wrote:
> On Thu, 13 Aug 2020 at 19:26, Sibi Sankar wrote:
>>
>> On 2020-08-13 18:04, Ulf Hansson wrote:
>> > On Wed, 12 Aug 2020 at 1
On 2021-03-24 03:36, Stephen Boyd wrote:
Quoting Bjorn Andersson (2021-03-13 20:16:39)
On Sat 13 Mar 15:46 CST 2021, Stephen Boyd wrote:
> Quoting Sibi Sankar (2021-03-08 21:51:51)
> > Add miscellaneous nodes to boot the Wireless Processor Subsystem on
>
> Maybe add (WPSS) after
On 2021-03-23 09:08, Stephen Boyd wrote:
Quoting Sibi Sankar (2021-03-08 21:58:21)
On 2021-02-27 19:26, Sai Prakash Ranjan wrote:
> On 2021-02-27 00:16, Stephen Boyd wrote:
>> Quoting Sai Prakash Ranjan (2021-02-25 23:51:00)
>>> On 2021-02-26 01:11, Stephen Boyd wrote:
>>
and replace them with generic qmp_send
interface instead.
https://lore.kernel.org/lkml/20200913034603.GV3715@yoga/
Previous dicussion on dropping power-domain support from AOSS QMP driver
https://lore.kernel.org/lkml/1617943188-23278-2-git-send-email-dee...@qti.qualcomm.com/
Depends on ^^
Sibi
Add Qualcomm Mailbox Protocol (QMP) binding to replace the power domains
exposed by the AOSS QMP node.
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/Documentation
Drop power-domain bindings exposed by AOSS QMP node.
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
b
by replacing load state resource control through the generic
qmp message send interface instead.
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/qcom_aoss.c | 109 ++-
1 file changed, 3 insertions(+), 106 deletions(-)
diff --git a/drivers/soc/qcom
101 - 200 of 519 matches
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