> On Tue, Jun 21, 2016 at 04:19:38PM +0000, Punnaiah Choudary Kalluri wrote:
> > > > > > > > mode Earlier In the driver this configuration is read from the
> > > > > > > > device-tree But as per lars and your suggestion move
aurora.org; Michal Simek
> ; Soren Brinkmann ;
> dan.j.willi...@intel.com; moritz.fisc...@ettus.com;
> laurent.pinch...@ideasonboard.com; l...@debethencourt.com; Srikanth
> Vemula ; Anirudha Sarangi ;
> Punnaiah Choudary Kalluri ;
> devicet...@vger.kernel.org; linux-arm-ker.
hu, Aug 27, 2015 at 01:11:30PM +0530, punnaiah choudary kalluri
>> > > wrote:
>> > > > Hi,
>> > > >
>> > > > On Thu, Aug 27, 2015 at 10:03 AM, Peter Chen
>> > > > wrote:
>> > > > > On Thu, Aug 27, 2015 at 10:59:
On Tue, Aug 25, 2015 at 12:16 PM, punnaiah choudary kalluri
wrote:
> Hi Rob,
>
> On Tue, Aug 25, 2015 at 12:23 AM, Rob Herring wrote:
>> On Wed, Aug 5, 2015 at 10:19 PM, Punnaiah Choudary Kalluri
>> wrote:
>>> Device-tree binding documentation for Xilinx zynq
Added EDAC support for reporting the ecc errors of synopsys ddr controller.
The ddr ecc controller corrects single bit errors and detects double bit
errors.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes for v7:
- Fixed indentation and removed insignificant comments
- I have not taken care
On Fri, Jan 2, 2015 at 4:20 PM, Borislav Petkov wrote:
> On Fri, Jan 02, 2015 at 09:52:20AM +0530, Punnaiah Choudary Kalluri wrote:
>> +/**
>> + * synps_edac_handle_error - Handle controller error types CE and UE
>> + * @mci: Pointer to the edac memory controll
On Mon, Jan 5, 2015 at 3:45 PM, Borislav Petkov wrote:
> On Sat, Jan 03, 2015 at 08:01:29AM +0530, punnaiah choudary kalluri wrote:
>> p is pointing to the stack memory.
>
> So you could go and allocate all that memory at driver init time and
> reuse it each time you handle an e
Hi,
Please ignore this patch. I will resend this patch with modification history.
Regards,
Punnaiah
On Tue, Jan 6, 2015 at 11:05 PM, Punnaiah Choudary Kalluri
wrote:
> Added EDAC support for reporting the ecc errors of synopsys ddr controller.
> The ddr ecc controller corrects sing
Added EDAC support for reporting the ecc errors of synopsys ddr controller.
The ddr ecc controller corrects single bit errors and detects double bit
errors.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes for v8:
- Fixed the review comments that are missed in v7
- Added comment for ECC
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- Removed timing properties
Changes in v4:
- none
Changes in v3:
- none
Changes in v2:
- modified timing binding info as per onfi timing parameters
- add suffix
Added EDAC support for reporting the ecc errors of synopsys ddr controller.
The ddr ecc controller corrects single bit errors and detects double bit
errors.
Signed-off-by: Punnaiah Choudary Kalluri
---
MAINTAINERS |1 +
drivers/edac/Kconfig |7 +
drivers/edac
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files changed, 92 insertions(+), 0 deletions(-)
create
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- None
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164 +
1 files changed, 164 insertions(+), 0
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- Added pl353_smc_get_clkrate function, made pl353_smc_set_cycles as public
API
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- Configure the nand timing parameters as per the onfi spec
Changes
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (3):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
Hi,
I have the following confusions regarding the nand ecc algorithms:
Haming and BCH
Request your help to clarify the below concerns.
Hamming Mode:
What will happen if the data has more than two bit errors for codeword?
Will the nand_correct_data() function returns uncorrectable ecc er
en much review? I was looking at the MTD portions when I noticed an
> obvious issue below:
>
> On Tue, Jan 06, 2015 at 11:19:17PM +0530, Punnaiah Choudary Kalluri wrote:
>> Add driver for arm pl353 static memory controller. This controller is
>> used in xilinx zynq soc for interfaci
On Thu, Apr 23, 2015 at 6:19 PM, Michal Simek wrote:
> On 04/16/2015 03:56 PM, Punnaiah Choudary Kalluri wrote:
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
>> correction.
>>
Hi Josh,
> -Original Message-
> From: Josh Cartwright [mailto:jo...@ni.com]
> Sent: Friday, April 24, 2015 1:21 AM
> To: Punnaiah Choudary Kalluri
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org
Hi Paul Bolle
On Tue, Apr 14, 2015 at 12:19 AM, Paul Bolle wrote:
> On Mon, 2015-04-13 at 21:41 +0530, Punnaiah Choudary Kalluri wrote:
>> --- a/drivers/memory/Kconfig
>> +++ b/drivers/memory/Kconfig
>
>> +config PL353_SMC
>> + bool "ARM PL353 St
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/mtd/nand/Kconfig |7 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/arasan_nfc.c
Pitchen; Alexandre
> Belloni; Michal Simek; Punnaiah Choudary Kalluri; Nicolas Ferre
> Subject: [PATCH v2 8/8] net/macb: unify peripheral version testing
>
> As we need to check peripheral version from the hardware during probe, I
> introduce a little helper to unify these tests. It woul
Pitchen; Alexandre
> Belloni; Michal Simek; Punnaiah Choudary Kalluri; Nicolas Ferre;
> sta...@vger.kernel.org
> Subject: [PATCH v2 7/8] net/macb: fix the peripheral version test
>
> We currently need two checks of the peripheral version in MACB_MID
> register.
> One of the
On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
wrote:
> On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard Weinberger wrote:
>> Am 27.04.2015 um 23:35 schrieb Ben Shelton:
>> > I tested this against the latest version of the PL353 NAND driver that
>> > Punnaiah
>> > has been working to upstream (co
On Wed, Mar 25, 2015 at 7:32 PM, Richard Weinberger wrote:
> Some Micron NAND chips offer an on-die ECC (AKA internal ECC)
> feature. It is useful when the host-platform does not offer
> multi-bit ECC and software ECC is not feasible.
>
> Based on original work by David Mosberger
>
> Signed-off-b
On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris
wrote:
> On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wrote:
>> On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
>> wrote:
>> > On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard Weinberger wrote:
>>
Hi Ben,
I will take care of the boundary conditions for both lower and upper
limits and update the patches accordingly.
Thanks,
Punnaiah
On Tue, Apr 28, 2015 at 8:41 PM, Ben Shelton wrote:
> Hi Punnaiah,
>
>> +/**
>> + * pl353_smc_set_cycles - Set memory timing parameters
>> + * @dev: Poi
On Tue, Apr 28, 2015 at 7:33 PM, Josh Cartwright wrote:
> On Tue, Apr 28, 2015 at 09:14:26AM +0530, punnaiah choudary kalluri wrote:
>> On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris
>> wrote:
>> > On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wro
Ping
On Tue, Mar 24, 2015 at 8:04 AM, punnaiah choudary kalluri
wrote:
> On Fri, Mar 20, 2015 at 4:51 AM, Jeff Lauruhn (jlauruhn)
> wrote:
>> This device has a Page size x8: 17,600 bytes (16,384 + 1216 bytes) and
>> minimum required ECC 24-bit ECC per 1100 bytes of data.
On Tue, Apr 28, 2015 at 9:08 PM, Ben Shelton wrote:
> Hi Punnaiah,
>
> On 04/13, Punnaiah Choudary Kalluri wrote:
>> Add driver for arm pl353 static memory controller nand interface with
>> HW ECC support. This controller is used in xilinx zynq soc for interfacing
>
From: Punnaiah Choudary Kalluri
Under heavy Rx load, observed that the Hw is updating the USED bit
and it is not updating the received frame status to the BD control
field. This could be lack of resources for processing the BDs at high
data rates. Driver drops the frame associated with this BD
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v6:
- None
Changes in v5:
- Removed timing properties
Changes in v4:
- none
Changes in v3:
- none
Changes in v2:
- modified timing binding info as per onfi timing
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v6:
- Fixed the checkpatch.pl reported warnings
- Using the address
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files changed, 92 insertions
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (3):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164 +
1 files changed, 164
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v6:
- Fixed checkpatch.pl reported warnings
- fixed missing space and dont enable this
Hi Paul Bolle,
On Tue, Apr 14, 2015 at 12:27 AM, Paul Bolle wrote:
> On Mon, 2015-04-13 at 21:42 +0530, Punnaiah Choudary Kalluri wrote:
>
>> --- a/drivers/mtd/nand/Makefile
>> +++ b/drivers/mtd/nand/Makefile
>
>> +obj-$(CONFIG_MTD_NAND_PL353) += pl353_nand.
k; Soren Brinkmann;
> devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
> ran27...@gmail.com
> Subject: Re: [RFC PATCH 2/2] spi: Add support for Zynq Ultrascale+ MPSoC
> GQSPI controller
>
> O
Ping.
Regards,
Punnaiah
On Fri, May 22, 2015 at 11:49 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for Arasan Nand Flash Controller used in
> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
> correction.
>
> Signed-off-by: Punnaiah C
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:37 PM, Punnaiah Choudary Kalluri
wrote:
> Add driver for arm pl353 static memory controller. This controller is
> used in xilinx zynq soc for interfacing the nand and nor/sram memory
> devices.
>
> Signed-off-by: Punnaiah C
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:38 PM, Punnaiah Choudary Kalluri
wrote:
> Add driver for arm pl353 static memory controller nand interface with
> HW ECC support. This controller is used in xilinx zynq soc for interfacing
> the nand flash memory.
>
> Signed-o
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- Corrected the function header documentation
- Framework expects bus-width value
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions
> -Original Message-
> From: Shubhrajyoti Datta [mailto:omaplinuxker...@gmail.com]
> Sent: Monday, June 15, 2015 8:35 PM
> To: Punnaiah Choudary Kalluri
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; Kumar Gala; M
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- Modified the zynqmp_dma_chan_is_idle function return type to
bool
Changes in
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions(-)
create mode 100644
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/dma/Kconfig |6 +
drivers/dma/xilinx/Makefile |1 +
drivers/dma
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164 +
1
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected clocks description
- prefixed '#' for address and size cells
Changes in v6:
- None
Changes in v5:
- Removed timing properties
Changes in v
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected the kconfig to use tristate selection
- Corrected the GPL licence ident
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Currently not implemented the memclk rate adjustments. I will
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (3):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
On Mon, Jun 8, 2015 at 10:27 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for zynqmp dma engine used in Zynq
> UltraScale+ MPSoC. The initial release of this driver supports
> only memory to memory transfers.
>
> Signed-off-by: Punnaiah Choudary Kalluri
>
...@gmail.com;
> b...@decadent.org.uk; mika.westerb...@linux.intel.com; "Bean Huo 霍斌
> 斌 (beanhuo)"; Harini Katakam; Anurag Kumar Vulisha; Srikanth Vemula;
> linux-kernel@vger.kernel.org; broo...@kernel.org; linux-
> m...@lists.infradead.org; Anirudha Sarangi; Punnaiah Choudary Kalluri
>-Original Message-
>From: Michal Simek [mailto:michal.si...@xilinx.com]
>Sent: Wednesday, March 12, 2014 10:20 PM
>To: Soren Brinkmann
>Cc: Michal Simek; mon...@monstr.eu; Mark Rutland; Punnaiah Choudary
>Kalluri; dougthomp...@xmission.com; devicet...@vger.ker
Added EDAC support for reporting the ecc errors of synopsys ddr controller.
The ddr ecc controller corrects single bit errors and detects double bit
errors
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes for v2:
- Updated the commit header and message
- Renamed the filenames to
Add support for ARM Pl310 L2 cache controller parity error
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/edac/pl310_edac_l2.txt | 19 ++
drivers/edac/Kconfig |7 +
drivers/edac/Makefile |1 +
drivers
the edac driver need
modifications
for implementing shared irq mechanism.
So, i request your commnets on this patch and please suggest if there is a
better implemenattion than above.
Punnaiah Choudary Kalluri (1):
edac: add support for PL310 L2 cache parity
.../devicetree/bindings/edac
devices connected with two separate CS line and one
common set of 4 IO lines.
This series adds support for the first configuration (single).
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/spi/Kconfig |6 +
drivers/spi/Makefile|1 +
drivers/spi/spi-zynq-qspi.c
Add bindings documentation for Zynq Quad SPI driver.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/spi/spi-zynq-qspi.txt | 26
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
diff
Hi Boris,
>-Original Message-
>From: Borislav Petkov [mailto:b...@alien8.de]
>Sent: Monday, July 28, 2014 11:32 PM
>To: Punnaiah Choudary Kalluri
>Cc: Punnaiah Choudary Kalluri; dougthomp...@xmission.com;
>robh...@kernel.org; pawel.m...@arm.com; Michal Simek;
>mark
Hi Boris,
>-Original Message-
>From: Borislav Petkov [mailto:b...@alien8.de]
>Sent: Thursday, July 31, 2014 7:27 PM
>To: Michal Simek
>Cc: Punnaiah Choudary Kalluri; dougthomp...@xmission.com;
>robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
>ijc+devi
Added EDAC support for reporting the ecc errors of zynq ddr controller.
The ddr ecc controller corrects single bit errors and detects double bit
errors
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/edac/zynq_edac.txt | 18 +
drivers/edac/Kconfig
>-Original Message-
>From: Michal Simek [mailto:mon...@monstr.eu]
>Sent: Monday, March 10, 2014 5:29 PM
>To: Mark Rutland
>Cc: Punnaiah Choudary Kalluri; dougthomp...@xmission.com;
>devicet...@vger.kernel.org; linux-...@vger.kernel.org; linux-arm-
>ker...@lists
On Wed, Apr 9, 2014 at 2:10 AM, Borislav Petkov wrote:
> On Mon, Mar 17, 2014 at 10:53:44AM +0530, Punnaiah Choudary Kalluri wrote:
>> Added EDAC support for reporting the ecc errors of synopsys ddr controller.
>> The ddr ecc controller corrects single bit errors and detects doubl
On Wed, Apr 9, 2014 at 4:33 PM, Borislav Petkov wrote:
> On Wed, Apr 09, 2014 at 11:34:31AM +0530, punnaiah choudary kalluri wrote:
>> Since it is recommended in Documentation/kernel-doc-nano-HOWTO.txt
>> but also said it is low priority and at the discretion of the MAINTAINER of
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../bindings/memory-controllers/pl353-smc.txt | 53
1 files changed, 53 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (3):
Devicetree: Add pl353 smc controller devicetree binding information
Add driver for arm pl353 static memory controller nand interface.
This controller is used in xilinx zynq soc for interfacing the nand
flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/mtd/nand/Kconfig |8 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/memory/Kconfig |8 +
drivers/memory/Makefile |1 +
drivers/memory
ernel.org; Andreas
>Färber; Punnaiah Choudary Kalluri; Lars-Peter Clausen
>Subject: [PATCH v2 00/11] ARM: dts: zynq: Prepare Parallella
>
>Hello,
>
>This patch series adds an initial device tree for the Parallella board.
>UART, SD card, Ethernet are enabled.
>Not yet enabled a
Added EDAC support for reporting the ecc errors of synopsys ddr controller.
The ddr ecc controller corrects single bit errors and detects double bit
errors.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes for v3:
- Updated maintainer information
- Driver cleanup as per the review comments
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Modified driver to support multiple instances
- Used sleep instaed of busywait for
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- none
Changes in v3:
- none
Changes in v2:
- modified timing binding info as per onfi timing parameters
- add suffix nano second as timing unit
- modified the
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
Changes in
Added ONDIE ECC support. Currently this ecc mode is supported for
specific micron parts with oob size 64 bytes.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 162
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164 +
1 files changed, 164 insertions(+), 0 deletions(-)
diff --git a
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files changed, 92 insertions(+), 0 deletions(-)
create mode 100644 Documentation/mtd/nand/pl353
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (4):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
Hi Boris,
On Mon, Jul 28, 2014 at 5:04 PM, Borislav Petkov wrote:
> On Sun, Jul 27, 2014 at 12:10:52AM +0530, Punnaiah Choudary Kalluri wrote:
>> Added EDAC support for reporting the ecc errors of synopsys ddr controller.
>> The ddr ecc controller corrects single bit errors and
Since its a generic driver, support for configuring the dma_mask using
dma_coerce_mask_and_coherent would be good.
Regards,
Punnaiah
On Tue, Jun 24, 2014 at 4:05 PM, Antoine Ténart
wrote:
> Add a generic ChipIdea driver, with optional PHY and clock, to support
> ChipIdea controllers that doesn't
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- modified timing binding info as per onfi timing parameters
- add suffix nano second as timing unit
- modified the clock names as per the IP spec
---
.../bindings
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- Since now the timing parameters are in nano seconds, added logic to convert
them
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files changed, 92 insertions(+), 0 deletions(-)
create mode 100644 Documentation/mtd/nand/pl353-nand.txt
diff --git a
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (4):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/mtd/nand/pl353_nand.c | 163 +
1 files changed, 163 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/pl353_nand.c b/drivers/mtd/nand/pl353_nand.c
index 0be8ca2
Added ONDIE ECC support. Currently this ecc mode is supported for
specific micron parts with oob size 64 bytes.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/mtd/nand/pl353_nand.c | 131 +++-
1 files changed, 127 insertions(+), 4 deletions(-)
diff
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- implemented the proper error codes
- further breakdown this
Zynq soc usb controller is a synopsys IP and it is compatible
with the chipidea spec. So, reusing chipidea drivers for zynq usb
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/usb/chipidea/Makefile |1 +
drivers/usb/chipidea/ci_hdrc_zynq.c | 115
Document device tree binding information as required by
the ZYNQ USB controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/usb/ci-hdrc-zynq.txt | 23
1 files changed, 23 insertions(+), 0 deletions(-)
create mode 100644 Documentation
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