On Wed, Aug 08, 2018 at 04:11:56PM +, Winkler, Tomas wrote:
> > On Tue, Jul 31, 2018 at 09:35:32AM +0300, Tomas Winkler wrote:
> > > This series adds an alternative method for transferring data between
> > > the mei driver and the device via a DMA ring. The DMA ring allows
> > > transferring da
On Sun, Aug 05, 2018 at 08:38:30PM +, Winkler, Tomas wrote:
>
> > Subject: RE: [char-misc-next 06/12] mei: dma ring buffers allocation
> >
> >
> > > On Tue, Jul 31, 2018 at 09:35:38AM +0300, Tomas Winkler wrote:
> > > > --- /dev/null
> > > > +++ b/drivers/misc/mei/dma-ring.c
> > > > @@ -0,0
On Fri, Sep 07, 2018 at 12:34:19PM +0900, Minchan Kim wrote:
> Thanks, Martijn,
>
> Greg, could you have a look to pick up?
Now queued up, thanks.
greg k-h
/linux/commits/Reinette-Chatre/perf-core-and-x86-intel_rdt-Fix-lack-of-coordination-with-perf/20180912-101526
config: i386-randconfig-x0-09121359 (attached as .config)
compiler: gcc-5 (Debian 5.5.0-3) 5.4.1 20171010
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
Thanks for the review
On 11/09/18 16:33, Lee Jones wrote:
On Tue, 04 Sep 2018, Srinivas Kandagatla wrote:
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
It has mulitple blocks like Soundwire controller, codec,
Codec processing engine, ClassH controller, interrupt mux.
It supports
Am Mittwoch, 12. September 2018, 05:12:48 CEST schrieb Manivannan Sadhasivam:
> Hi Ezequiel,
>
> On Tue, Sep 11, 2018 at 04:40:29PM -0300, Ezequiel Garcia wrote:
> > On Tue, 2018-09-11 at 08:00 +0530, Manivannan Sadhasivam wrote:
> > > Since the same family members of Rock960 boards (Rock960 and F
On 12-09-18, 14:25, Masahiro Yamada wrote:
> 2018-09-12 13:35 GMT+09:00 Vinod :
> > On 12-09-18, 12:01, Masahiro Yamada wrote:
> >> Hi Vinod,
> >>
> >>
> >> 2018-09-11 16:00 GMT+09:00 Vinod :
> >> > On 24-08-18, 10:41, Masahiro Yamada wrote:
> >> >
> >> >> +/* mc->vc.lock must be held by caller */
On Wed, Aug 08, 2018 at 09:58:50PM +0530, Vinod wrote:
> Hey Greg,
>
> Please PULL to receive the soundwire update for v4.19-rc1 with a signed
> tag as you requested last time and the norm :-)
>
> The following changes since commit ce397d215ccd07b8ae3f71db689aedb85d56ab40:
>
> Linux 4.18-rc1 (
This patch adds the binding documentation for Spreadtrum SC27XX series PMICs
fuel gauge unit device, which is used to calculate the battery capacity.
Signed-off-by: Baolin Wang
---
.../devicetree/bindings/power/supply/sc27xx-fg.txt | 55
1 file changed, 55 insertions(+)
c
On 11/09/2018 23:43:02+0100, Lee Jones wrote:
> > I haven't read it, but I believe it's not unlike Renesas SCIF, which is
> > served by both drivers/tty/serial/sh-sci.c and drivers/spi/spi-sh-sci.c.
> > But the latter is not used from DT, so we haven't experienced (and solved)
> > the similar issue
This patch adds the Spreadtrum SC27XX serial PMICs fuel gauge support,
which is used to calculate the battery capacity.
Original-by: Yuanjiang Yu
Signed-off-by: Baolin Wang
---
drivers/power/supply/Kconfig |7 +
drivers/power/supply/Makefile|1 +
drivers/power/su
2018-09-12 16:26 GMT+09:00 Vinod :
> On 12-09-18, 14:25, Masahiro Yamada wrote:
>> 2018-09-12 13:35 GMT+09:00 Vinod :
>> > On 12-09-18, 12:01, Masahiro Yamada wrote:
>> >> Hi Vinod,
>> >>
>> >>
>> >> 2018-09-11 16:00 GMT+09:00 Vinod :
>> >> > On 24-08-18, 10:41, Masahiro Yamada wrote:
>> >> >
>> >>
On 11/09/2018 23:54:40+0100, Lee Jones wrote:
> > > http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6438-32-bit-ARM926-Embedded-Microprocessor-SAM9G45_Datasheet.pdf
> > >
> > > USART doc starting p572, registers p621.
>
> After looking at the datasheet, I don't see any reason why one of the
Hello,
On Tue, Sep 11, 2018 at 02:55:49PM +0100, Lee Jones wrote:
> On Wed, 29 Aug 2018, Matti Vaittinen wrote:
>
> > Few regulators in BD71837 and BD71847 can output voltages from
> > different voltage ranges. Register interface is arranged so that
> > used range is selected by toggling bits whi
On Tue, Sep 11, 2018 at 02:49:47PM +0100, Lee Jones wrote:
> On Wed, 29 Aug 2018, Matti Vaittinen wrote:
>
> > Add ROHM BD71847 Power Management IC MFD binding information to
> > device-tree binding documents.
> >
> > Signed-off-by: Matti Vaittinen
> > ---
> > .../devicetree/bindings/mfd/rohm,b
Thanks for your review,
On 10/09/18 21:06, Rob Herring wrote:
On Tue, Sep 04, 2018 at 11:24:57AM +0100, Srinivas Kandagatla wrote:
This patch add new bindings required to support MBHC
(Multi Button Headset Control) block in the codec.
This block is used for jack insert/removal detection,
headse
On Tue, Sep 11, 2018 at 01:40:29PM +0100, Lee Jones wrote:
> On Wed, 29 Aug 2018, Matti Vaittinen wrote:
>
> > There is a HW quirk in BD71837. The shutdown sequence timings for
> > bucks/LDOs which are enabled via register interface are changed.
> > At PMIC poweroff the voltage for BUCK6/7 is cut
On (09/11/18 10:47), Petr Mladek wrote:
> > Oh, that was intentional. I consider repeated messages to be less
> > problematic than the missing ones.
>
> It makes some sense. But it might be problematic with slow consoles.
Right. And this is why I brought up Jan's patch.
And I agree that we better
From: Bartosz Golaszewski
Use resource managed variants of nvmem_register() and kzalloc().
Signed-off-by: Bartosz Golaszewski
---
drivers/misc/eeprom/eeprom_93xx46.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/misc/eeprom/eeprom_93xx46.c
b/
From: Bartosz Golaszewski
Use the resource managed variant of nvmem_register().
Signed-off-by: Bartosz Golaszewski
---
drivers/misc/eeprom/at25.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index 840afb398f9e..d8
From: Bartosz Golaszewski
While working on the nvmem framework recently I noticed that there are
many providers that don't use the devm variant of nvmem_register().
This series contains relevant updates for eeprom drivers.
Note that these patches are independent from my other nvmem series[1].
[
Hi,
On Tue, Sep 11, 2018 at 08:47:55PM +0200, Greg Kroah-Hartman wrote:
>
> Normally I do not review "RFC" patches as it implies the submitter does
> not think they are a valid solution. How about resending them as if you
> think this is something ready to be merged?
I had used "RFC" here be
Update VDD_SOC voltage to 1.25V for 900MHz operating point
according to datasheet Rev. 1.3, 08/2018, 25mV is added to
the minimum allowed values to cover power supply ripple.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6ull.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On Wed, Sep 12, 2018 at 09:26:12AM +0200, Heiko Stübner wrote:
> Am Mittwoch, 12. September 2018, 05:12:48 CEST schrieb Manivannan Sadhasivam:
> > Hi Ezequiel,
> >
> > On Tue, Sep 11, 2018 at 04:40:29PM -0300, Ezequiel Garcia wrote:
> > > On Tue, 2018-09-11 at 08:00 +0530, Manivannan Sadhasivam wr
On 09/12/2018 01:33 AM, Guenter Roeck wrote:
> On Wed, Sep 12, 2018 at 08:23:29AM +0930, Joel Stanley wrote:
>> On Wed, 12 Sep 2018 at 07:48, Jae Hyun Yoo
>> wrote:
>>>
>>> On 9/11/2018 1:41 PM, Guenter Roeck wrote:
On Tue, Sep 11, 2018 at 01:30:41PM -0700, Jae Hyun Yoo wrote:
>>
> I che
Hi,
On 11.09.2018 17:19, Peter Zijlstra wrote:
> On Tue, Sep 11, 2018 at 08:35:12AM +0200, Ingo Molnar wrote:
>>> Well, explicit threading in the tool for AIO, in the simplest case, means
>>> incorporating some POSIX API implementation into the tool, avoiding
>>> code reuse in the first place.
On 12/09/18 03:21, Shawn Guo wrote:
On Tue, Sep 11, 2018 at 11:17:07AM +0100, Suzuki K Poulose wrote:
Switch to the updated coresight bindings.
Cc: Shawn Guo
Cc: Sascha Hauer
Cc: Pengutronix Kernel Team
Cc: Fabio Estevam
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
As per the con
Hi Anson,
Am 12.09.2018 um 10:13 schrieb Anson Huang:
> Update VDD_SOC voltage to 1.25V for 900MHz operating point
> according to datasheet Rev. 1.3, 08/2018, 25mV is added to
> the minimum allowed values to cover power supply ripple.
is there a reason why the new datasheet isn't published yet?
Hello,
Niklas Cassle recently reported some regressions with his Qcom cpufreq
driver where he was getting some errors while creating the OPPs tables.
After looking into it I realized that the OPP core incorrectly creates
multiple OPP tables for the devices even if they are sharing the OPP
table i
The OPP table was freed, but not the individual OPPs which is done from
_dev_pm_opp_remove_table(). Fix it by calling _dev_pm_opp_remove_table()
as well.
Cc: 4.18 # v4.18
Fixes: 3ba98324e81a ("PM / OPP: Get performance state using genpd helper")
Signed-off-by: Viresh Kumar
---
drivers/opp/of.c
The dev_list needs to be protected with a lock, else we may have
simultaneous access (addition/removal) to it and that would be racy.
Extend scope of the opp_table lock to protect dev_list as well.
Signed-off-by: Viresh Kumar
---
drivers/opp/core.c | 21 +++--
drivers/opp/cpu.c
Parse the DT properties present in the OPP table from
_of_init_opp_table(), which is a dedicated routine for DT parsing.
Minor relocation of helpers is required for this.
It is possible now for _managed_opp() to return a partially initialized
OPP table if the OPP table is created via the helpers
This is a preparatory patch required for the next commit which will
start using OPP table's node pointer in _of_init_opp_table(), which
requires the index in order to read the OPP table's phandle.
This commit adds the index argument in the call chains in order to get
it delivered to _of_init_opp_t
The static OPPs don't always get freed with the OPP table, it can happen
before that as well. For example, if the OPP table is first created
using helpers like dev_pm_opp_set_supported_hw() and the OPPs are
created at a later point. Now when the OPPs are removed, the OPP table
stays until the time
The reference count is only required to be incremented for every call
that may lead to adding the OPP table. For static OPPs the same should
be done from the parent routine which adds all static OPPs together and
so only one refcount for all static OPPs.
Update code to reflect that.
The refcount
Only one platform was depending on this feature and it is already
updated now. Stop removing dynamic OPPs from _dev_pm_opp_remove_table().
This simplifies lot of paths and removes unnecessary parameters.
Signed-off-by: Viresh Kumar
---
drivers/opp/core.c | 20 +---
drivers/opp/cp
Both _of_add_opp_table_v1() and _of_add_opp_table_v2() contain similar
code to get the OPP table and their parent routine also parses the DT to
find the OPP table's node pointer. This can be simplified by getting the
OPP table in advance and then passing it as argument to these routines.
Signed-of
Currently there are two separate ways to free the OPP table based on how
it is created in the first place.
We call _dev_pm_opp_remove_table() to free the static and/or dynamic
OPP, OPP list devices, etc. This is done for the case where the OPP
table is added while initializing the OPPs, like via t
dev_pm_opp_cpumask_remove_table() is going to change in the next commit
and will not remove dynamic OPPs automatically. They must be removed
with a call to dev_pm_opp_remove().
Signed-off-by: Viresh Kumar
---
drivers/cpufreq/mvebu-cpufreq.c | 9 ++---
1 file changed, 2 insertions(+), 7 delet
When two or more devices are sharing their clock and voltage rails, they
share the same OPP table. But there are some corner cases where the OPP
core incorrectly creates separate OPP tables for them.
For example, CPU 0 and 1 share clock/voltage rails. The platform
specific code calls dev_pm_opp_se
Hi, Stefan
Anson Huang
Best Regards!
> -Original Message-
> From: Stefan Wahren
> Sent: Wednesday, September 12, 2018 4:28 PM
> To: Anson Huang ; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam
> ; robh...@kernel.org; mark.rutl...@arm.com;
> linux-arm
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: 11 September 2018 11:25
> To: Shameerali Kolothum Thodi ;
> lorenzo.pieral...@arm.com
> Cc: will.dea...@arm.com; mark.rutl...@arm.com; Guohanjun (Hanjun Guo)
> ; John Garry ;
> pa...@codeaurora.org; vkil...@co
On Tue, Sep 11, 2018 at 06:09:01AM -0700, Sodagudi Prasad wrote:
> May I know why client edev_ctl->poll_msec settings is not considered?
Looks like it has been like this since it was added. But, I take patches :)
Make sure to sanity-check ->poll_msec too, before accepting it. I.e.,
something like
Hi Stephen,
On 2018/9/12 15:34, Stephen Rothwell wrote:
> Hi Chao,
>
> On Wed, 12 Sep 2018 15:19:16 +0800 Chao Yu wrote:
>>
>> To make sure, did -next tree enable erofs compiling now?
>
> Yes, from yesterday.
Great, thanks for your help. :)
>
>> Xiang has made two patches to fix integration
On Wed, 12 Sep 2018, Alexandre Belloni wrote:
> On 11/09/2018 23:43:02+0100, Lee Jones wrote:
> > > I haven't read it, but I believe it's not unlike Renesas SCIF, which is
> > > served by both drivers/tty/serial/sh-sci.c and drivers/spi/spi-sh-sci.c.
> > > But the latter is not used from DT, so we
On Wed, 12 Sep 2018, Alexandre Belloni wrote:
> On 11/09/2018 23:54:40+0100, Lee Jones wrote:
> > > > http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6438-32-bit-ARM926-Embedded-Microprocessor-SAM9G45_Datasheet.pdf
> > > >
> > > > USART doc starting p572, registers p621.
> >
> > After look
On 12/09/18 07:52, Alexey Budankov wrote:
Hi,
Is there any plans or may be even progress on that so far?
It's hanging in the back of my mind. AFAIR after last round there was a
build failure or two to fix on more exotic (to me) hardware, and Jiri
Olsa provided a tools/perf snippet support
On Wed, 12 Sep 2018, Matti Vaittinen wrote:
> On Tue, Sep 11, 2018 at 01:40:29PM +0100, Lee Jones wrote:
> > On Wed, 29 Aug 2018, Matti Vaittinen wrote:
> >
> > > There is a HW quirk in BD71837. The shutdown sequence timings for
> > > bucks/LDOs which are enabled via register interface are change
On Wed, Sep 12, 2018 at 09:42:51AM +0100, Lee Jones wrote:
> On Wed, 12 Sep 2018, Matti Vaittinen wrote:
>
> > On Tue, Sep 11, 2018 at 01:40:29PM +0100, Lee Jones wrote:
> > > On Wed, 29 Aug 2018, Matti Vaittinen wrote:
> > >
> > > > There is a HW quirk in BD71837. The shutdown sequence timings f
On Wed, 12 Sep 2018, Srinivas Kandagatla wrote:
> On 11/09/18 16:33, Lee Jones wrote:
> > On Tue, 04 Sep 2018, Srinivas Kandagatla wrote:
> >
> > > Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
> > > It has mulitple blocks like Soundwire controller, codec,
> > > Codec processing eng
Currently, linux kernel is basically not preventing userspace-userspace
spectrev2 attack, because:
- IBPB is basically unused (issued only for tasks that marked themselves
explicitly non-dumpable, which is absolutely negligible minority of all
software out there), therefore cross-process br
From: Jiri Kosina
Currently, we are issuing IBPB only in cases when switching into a non-dumpable
process, the rationale being to protect such 'important and security sensitive'
processess (such as GPG) from data leak into a different userspace process via
spectre v2.
This is however completely
From: Jiri Kosina
STIBP is a feature provided by certain Intel ucodes / CPUs. This feature
(once enabled) prevents cross-hyperthread control of decisions made by
indirect branch predictors.
Enable this feature if
- the CPU is vulnerable to spectre v2
- the CPU supports SMT and has SMT siblings
From: Jiri Kosina
If spectrev2 mitigation has been enabled, we're filling RSB on context switch
in order to protect from various classess of spectrev2 attacks.
If this mitigation is enabled, say so in sysfs for spectrev2.
Signed-off-by: Jiri Kosina
---
arch/x86/kernel/cpu/bugs.c | 3 ++-
1 fi
On 09/12/2018 02:41 PM, Pingfan Liu wrote:
> Cc James, could you try to enable initcall_debug, and paste the
> shutdown seq with 722e5f2b1eec ("driver core: Partially revert "driver
> core: correct device's shutdown order"") and without it?
OK. And I will scheudule some testing orders, ahah, I'm
On Tue 11-09-18 19:29:21, Matthew Wilcox wrote:
> On Tue, Sep 11, 2018 at 04:35:03PM -0700, Yang Shi wrote:
[...]
I didn't get to read the patch yet.
> > And, Michal prefers have VM_HUGETLB and VM_PFNMAP handled separately for
> > safe and bisectable sake, which needs call the regular do_munmap()
Several subsystems in the kernel (task scheduler and/or thermal at the
time of writing) can benefit from knowing about the energy consumed by
CPUs. Yet, this information can come from different sources (DT or
firmware for example), in different formats, hence making it hard to
exploit without a sta
Schedutil requests frequency by aggregating utilization signals from
the scheduler (CFS, RT, DL, IRQ) and applying and 25% margin on top of
them. Since Energy Aware Scheduling (EAS) needs to be able to predict
the frequency requests, it needs to forecast the decisions made by the
governor.
In orde
In order to make sure Energy Aware Scheduling (EAS) doesn't hurt
systems not using it, add a new sched_feat, called ENERGY_AWARE,
guarding the access to EAS code paths.
Signed-off-by: Quentin Perret
---
kernel/sched/features.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/kernel/sch
Expose the Energy Model (read-only) of all performance domains in sysfs
for convenience. To do so, add a kobject to the CPU subsystem under the
umbrella of which a kobject for each performance domain is attached.
The resulting hierarchy is as follows for a platform with two
performance domains for
Energy Aware Scheduling (EAS) in its current form is most relevant on
platforms with asymmetric CPU topologies (e.g. Arm big.LITTLE) since
this is where there is a lot of potential for saving energy through
scheduling. This is particularly true since the Energy Model only
includes the active power
Add another member to the family of per-cpu sched_domain shortcut
pointers. This one, sd_asym_cpucapacity, points to the lowest level
at which the SD_ASYM_CPUCAPACITY flag is set. While at it, rename the
sd_asym shortcut to sd_asym_packing to avoid confusions.
Generally speaking, the largest oppor
This patch series introduces Energy Aware Scheduling (EAS) for CFS tasks
on platforms with asymmetric CPU topologies (e.g. Arm big.LITTLE).
For more details about the ideas behind it and the overall design,
please refer to the cover letter of version 5 [1].
1. Version History
--
By default, arch_scale_cpu_capacity() is only visible from within the
kernel/sched folder. Relocate it to include/linux/sched/topology.h to
make it visible to other clients needing to know about the capacity of
CPUs, such as the Energy Model framework.
Cc: Ingo Molnar
Cc: Peter Zijlstra
Signed-o
The existing scheduling domain hierarchy is defined to map to the cache
topology of the system. However, Energy Aware Scheduling (EAS) requires
more knowledge about the platform, and specifically needs to know about
the span of Performance Domains (PD), which do not always align with
caches.
To ad
Energy Aware Scheduling (EAS) is designed with the assumption that
frequencies of CPUs follow their utilization value. When using a CPUFreq
governor other than schedutil, the chances of this assumption being true
are small, if any. When schedutil is being used, EAS' predictions are at
least consist
Adding Julien how did the work to support XEN_PAGE_SIZE != PAGE_SIZE.
On Wed, Sep 12, 2018 at 02:14:26AM -0600, Jan Beulich wrote:
> >>> On 12.09.18 at 07:45, wrote:
> > --- a/drivers/block/xen-blkback/common.h
> > +++ b/drivers/block/xen-blkback/common.h
> > @@ -65,7 +65,7 @@
> > (XEN_PAGES_
In preparation for the introduction of a new root domain flag which can
be set during load balance (the 'overutilized' flag), clean-up the set
of parameters passed to update_sg_lb_stats(). More specifically, the
'local_group' and 'local_idx' parameters can be removed since they can
easily be recons
If an Energy Model (EM) is available and if the system isn't
overutilized, re-route waking tasks into an energy-aware placement
algorithm. The selection of an energy-efficient CPU for a task
is achieved by estimating the impact on system-level active energy
resulting from the placement of the task
From: Morten Rasmussen
Energy-aware scheduling is only meant to be active while the system is
_not_ over-utilized. That is, there are spare cycles available to shift
tasks around based on their actual utilization to get a more
energy-efficient task distribution without depriving any tasks. When
a
In preparation for the definition of an energy-aware wakeup path,
introduce a helper function to estimate the consequence on system energy
when a specific task wakes-up on a specific CPU. compute_energy()
estimates the capacity state to be reached by all performance domains
and estimates the consum
***
* This patch illustrates the usage of the newly introduced Energy *
* Model framework and isn't supposed to be merged as-is. *
***
The Energy Model framework
Current behaviour of ASoC core w.r.t to component removal is that it
unregisters dependent sound card totally. There is no support to
rebind the card if the component comes back.
Typical use case is DSP restart or kernel modules itself.
With this patch, core now maintains list of cards that are un
memory.force_empty is used to empty a memory cgoup memory before
rmdir it, avoid to charge those memory into parent cgroup
when try_to_free_mem_cgroup_pages returns 0, guess there maybe be
lots of writeback, so wait. but the waiting and sleep will called
in shrink_inactive_list, based on numbers o
On 12-09-18, 09:29, Greg KH wrote:
> On Wed, Aug 08, 2018 at 09:58:50PM +0530, Vinod wrote:
> > Hey Greg,
> >
> > Please PULL to receive the soundwire update for v4.19-rc1 with a signed
> > tag as you requested last time and the norm :-)
> >
> > The following changes since commit ce397d215ccd07b8
When free pages are done with pageblock_order, time spend on
coalescing pages by buddy allocator can be reduced. With
section size of 256MB, hot add latency of a single section
shows improvement from 50-60 ms to less than 1 ms, hence
improving the hot add latency by 60%.
If this looks okey, I'll m
Hi Afonso,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on iio/togreg]
[also build test ERROR on v4.19-rc3 next-20180912]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On 12/09/18 09:58, Lee Jones wrote:
+static const struct mfd_cell wcd9335_devices[] = {
+ { .name = "wcd9335-codec", },
+};
Are there more devices to come?
Yes, that is the plan, we are kind of limited in hardware setup to test few
things like soundwire controller. We are exploring ot
On Wed, Sep 12, 2018 at 12:24:10PM +0530, Srikar Dronamraju wrote:
> Kernel A = 4.18+ 13 sched patches part of v4.19-rc1.
> Kernel B = Kernel A + 6 patches
> (http://lore.kernel.org/lkml/1533276841-16341-1-git-send-email-sri...@linux.vnet.ibm.com)
> Kernel C = Kernel B - (Avoid task migration for
On 09/12/18 at 08:31am, Ingo Molnar wrote:
>
> * Baoquan He wrote:
>
> > On 09/11/18 at 08:08pm, Baoquan He wrote:
> > > On 09/11/18 at 11:28am, Ingo Molnar wrote:
> > > > Yeah, so proper context is still missing, this paragraph appears to
> > > > assume from the reader a
> > > > whole lot of
Hi Lee,
On Wed, Sep 12, 2018 at 10:41 AM Lee Jones wrote:
> On Wed, 12 Sep 2018, Alexandre Belloni wrote:
> > On 11/09/2018 23:54:40+0100, Lee Jones wrote:
> > > > > http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6438-32-bit-ARM926-Embedded-Microprocessor-SAM9G45_Datasheet.pdf
> > > > >
>
On Wed, 12 Sep 2018 at 10:32, wrote:
>
> Hi, Rui,
>
>
>
> Could you cater to ‘git bisect’ ?
>
>
>
> Thanks
>
>
>
>
>
> Greetings! I'm having trouble building the kernel on my ppc64 machine (Power
> Mac G5) running Debian Sid. The make bindeb-pkg target is failing ever since
> 4.19-rc1. Is this a
From: Matthias Brugger
Some hardware does not implement two-level page tables so that
the amount of contigious memory needed by the baser is bigger
then the zone order. This is a known problem on Cavium Thunderx
with 4K page size.
We fix this by adding an errata which allocates the memory early
This is another series of tsens cleanups before we add interrupt support. This
applies on top of 4.19-rc2.
Patches [1-6] can directly be applied by Eduardo.
Patches [9-16] can directly be applied by Andy.
Patches [7-8] introduce a new check and needs review and can then be
applied completely sepa
hw_id is dynamically allocated but not used anywhere. Get rid of dead
code.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Reviewed-by: Bjorn Andersson
---
drivers/thermal/qcom/tsens.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/t
We've already converted over the devicetree of platforms using v2
version of the TSENS IP to use two address spaces. Now prepare to
convert over the 8916 and 8974 platforms to use separate SROT and TM
address spaces.
This patch will work with device trees with one or two address spaces
because we
The TSENS drivers use a GPL-2.0 license. Replace with equivalent SPDX
tags and delete the full license text.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Reviewed-by: Bjorn Andersson
---
drivers/thermal/qcom/tsens-8916.c | 11 +--
drivers/thermal/qcom/tsens-8960.c |
The TSENS driver currently only uses a limited set of registers from the TM
address space. So it was ok to map just that set of registers and call it
"map".
We'd now like to map a second set: SROT registers to introduce new
functionality. Rename the "map" field to a more appropriate "tm_map".
The
On platforms whose device trees specify two address spaces for TSENS, the
second one points to the SROT registers. Initialise the SROT map on those
platforms.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Reviewed-by: Bjorn Andersson
---
drivers/thermal/qcom/tsens-common.c | 14 +
Create an entry for the TSENS drivers and mark them as maintained
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Acked-by: Rajendra Nayak
Acked-by: Bjorn Andersson
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9ad052aea
Registers have moved around across TSENS generations. For example, the
CTRL register was at offset 0x0 in the SROT region on msm8916 but is at
offset 0x4 in newer v2 based TSENS HW blocks.
Allow passing offsets of important registers so that we can continue to
use common functions.
Signed-off-by:
We've earlier added support to split the register address space into TM
and SROT regions. Split up the regmap address space into two for msm8916
that has a similar register layout.
Since tsens-common.c/init_common() currently only registers one address
space, the order is important (TM before SROT
We've earlier added support to split the register address space into TM
and SROT regions. Split up the regmap address space into two for msm8974
that has a similar register layout.
Since tsens-common.c/init_common() currently only registers one address
space, the order is important (TM before SROT
This new property allows the number of sensors to be configured from DT
instead of being hardcoded in platform data. Use it.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Reviewed-by: Bjorn Andersson
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 1 +
1 file changed, 1 insertion(+)
d
c(1) + x(1) was actually meant to be c(1) * x(1).
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Acked-by: Rob Herring
Reviewed-by: Bjorn Andersson
---
Documentation/devicetree/bindings/thermal/thermal.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Docume
Initialise the camera thermal zone to export temperature to userspace.
Signed-off-by: Amit Kucheria
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
The SROT registers are initialised by the secure firmware at boot. We
don't have write access to the registers. Check if the block is enabled
before continuing.
Signed-off-by: Amit Kucheria
Reviewed-by: Bjorn Andersson
---
drivers/thermal/qcom/tsens-common.c | 17 +
1 file chang
One thermal zone per cpu is defined
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Tested-by: Matthias Kaehlcke
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 170 +++
1 file changed, 170 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/
This new property allows the number of sensors to be configured from DT
instead of being hardcoded in platform data. Use it.
Signed-off-by: Amit Kucheria
Reviewed-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dt
Initialise the gpu thermal zone to export temperature to userspace.
Signed-off-by: Amit Kucheria
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
inde
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