On Wed, May 31, 2017 at 01:44:30PM +0100, Will Deacon wrote:
> Hi Andrew,
>
> Thanks for posting this, but please try to cc the maintainers in future -- I
> almost missed it!
>
> On Tue, May 30, 2017 at 05:34:19PM -0700, Andrew Pinski wrote:
> > This allows the compiler to optimize the divide by
On Wed, Apr 05, 2017 at 10:01:23AM -0700, Bjorn Andersson wrote:
> On Wed 05 Apr 05:10 PDT 2017, Jonathan Neusch?fer wrote:
>
> > Don't use size if info indicates an error condition. Previously a
> > non-ENOENT error (such as -EPROBE_DEFER) would lead to size being used
> > even though it hadn't n
On Wed, May 31, 2017 at 06:17:16AM -0700, Kees Cook wrote:
> On Wed, May 31, 2017 at 4:13 AM, Peter Zijlstra wrote:
> > On Tue, May 30, 2017 at 02:39:51PM -0700, Kees Cook wrote:
> >> The coming x86 refcount protection needs to be able to add trailing
> >> instructions to the GEN_*_RMWcc() operati
On Tue, May 30, 2017 at 02:29:20PM +0900, Byungchul Park wrote:
> On Fri, May 12, 2017 at 09:45:35AM +0900, Byungchul Park wrote:
> > Although llist provides proper APIs, they are not used. Make them used.
>
> +to pet...@infradead.org
> +to mi...@kernel.org
> +to rost...@goodmis.org
>
> I am not
From: Xiang Chen
Add code to prepare internal abort command.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
b/drivers
This patchset adds support for the HiSilicon SAS controller
in the hip08 chipset.
The key difference compared to earlier chipsets is that the
controller is an integrated PCI endpoint in hip08.
As such, the controller is a pci device (not a platform device,
like v2 hw in hip07).
The driver is refa
Move the functionality to retrieve the fw info into
a dedicated device type-agnostic function,
hisi_sas_get_fw_info().
The reasoning is that this function will be required
for future pci-based platforms.
Also add some debug logs for failure.
Signed-off-by: John Garry
---
drivers/scsi/hisi_sas/
From: Xiang Chen
Add code to prepare SSP frame and deliver it to hardware.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 208 +
1 file changed, 208 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_
On 05/29/2017 12:32 AM, Michael Ellerman wrote:
> Reza Arbab writes:
>
>> On Fri, May 26, 2017 at 01:46:58PM +1000, Michael Ellerman wrote:
>>> Reza Arbab writes:
>>>
On Thu, May 25, 2017 at 04:19:53PM +1000, Michael Ellerman wrote:
> The commit message for 3af229f2071f says:
>
>>
From: Xiang Chen
Add v3 cq interrupt handler slot_complete_v2_hw().
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas.h | 1 +
drivers/scsi/hisi_sas/hisi_sas_main.c | 32
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 331 +
From: Xiang Chen
Add code to initialise interrupts and add some interrupt handlers.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 281 +
1 file changed, 281 insertions(+)
diff --git a/drivers/scsi/hisi_sas/his
From: Xiang Chen
Add code for interface get_wideport_bitmap.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
b/drivers/scsi/hisi_sas/hisi_
From: Xiang Chen
Add code to configure PHYs for v3 hw.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 127 -
1 file changed, 126 insertions(+), 1 deletion(-)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
From: Xiang Chen
Add code to prepare ATA frame for v3 hw
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 106 +
1 file changed, 106 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
b/drivers/sc
On 31 May 2017 at 13:33, David Howells wrote:
> Ard Biesheuvel wrote:
>
>> No, I am fine with keeping this as a single series. I don't want
>> anything under drivers/efi to imply policy regarding lockdown. Kernel
>> lockdown should be a feature that lives somewhere else, and which
>> contains a C
From: Xiang Chen
Add code to fill the interface of phy_hard_reset, phy_get_max_linkrate,
and phy enable/disable.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 40 +-
1 file changed, 39 insertions(+), 1 deletion
The clock-output-names of the ap806-system-controller node are not used
anymore, so remove them.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/arma
Add the code to initialise the controller which is based on pci
device in hisi_sas_v3_hw.c
The core controller routines are still in hisi_sas_main.c; some
common initialisation functions are also exported from
hisi_sas_main.c
For pci-based controller, the device properties, like
phy count and sas
This patch updates the documentation according to the changes made in the
patch "clk: mvebu: ap806: introduce a new binding"
Acked-by: Rob Herring
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 20
+++-
1 file chan
As for cp110, the initial intent when the binding of the ap806 system
controller was to have one flat node. The idea being that what is
currently a clock-only driver in drivers would become a MFD driver,
exposing the clock, GPIO and pinctrl functionality. However, after taking
a step back, this wou
On Fri, Mar 24, 2017 at 4:18 AM, Zefan Li wrote:
> On 2017/3/23 22:04, Dmitry Vyukov wrote:
>> Hello,
>>
>> The following program triggers WARNING in percpu_ref_kill_and_confirm:
>> https://gist.githubusercontent.com/dvyukov/bcfcef3d6b24b9fd841b88ee20c14d4b/raw/a54aeeb09ad1e0659b0ed87ef5efc4480ab2
As it was done for the cp110, this patch modifies the way the clock names
are created. The name of each clock is now created by using its physical
address as a prefix (as it was done for the platform device
names). Thanks to this we have an automatic way to compute a unique name.
Reviewed-by: Thom
This patch updates the documentation according to the change made in the
patch "clk: mvebu: ap806: do not depend anymore of the
*-clock-output-names": the clock names are no more part of the binding.
Acked-by: Rob Herring
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/
Hi,
This series modifies the device tree binding of the clock of the AP806
part that we find in the Marvell Armada 7K/8K SoCs.
As for the previsous series the only change in this second version is
about the binding documentation: all the documentation related changes
are now move in their own pat
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 19 +++
1 file ch
Instead of using &pdev->dev all over the place, introduce a pointer
variable for it.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/ap806-system-controller.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/mvebu/ap806-system-controller.c
b/d
From: Xiang Chen
Add code to initialise v3 hardware.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 277 +
1 file changed, 277 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
b/drivers/scsi/h
From: Xiang Chen
Add code to prepare SMP frame.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 74 ++
1 file changed, 74 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
b/drivers/scsi/hisi_sa
From: Xiang Chen
Add code to itct setup and free for v3 hw.
Signed-off-by: John Garry
Signed-off-by: Xiang Chen
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 114 +
1 file changed, 114 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
b/drivers
From: Xiang Chen
There is a change for abort dev for v3 hw: add registers to configure
unaborted iptt for a device, and then inform this to logic.
Signed-off-by: Xiang Chen
Signed-off-by: John Garry
---
drivers/scsi/hisi_sas/hisi_sas.h | 2 ++
drivers/scsi/hisi_sas/hisi_sas_main.c | 1
From: Xiang Chen
For ECC 1bit error, logic can recover it, so we only print a warning.
For ECC multi-bit and AXI bus fatal error, we panic.
Note: once v3 hw controller reset support is added, the panic will
be replaced by a controller reset, like v2 hw.
Signed-off-by: John Garry
Signed-o
From: Xiang Chen
Relocate get_ata_protocol() to a common location, as future hw
versions will require it.
Also rename with "hisi_sas_" prefix for consistency.
Signed-off-by: Xiang Chen
Signed-off-by: John Garry
---
drivers/scsi/hisi_sas/hisi_sas.h | 2 ++
drivers/scsi/hisi_sas/hisi_sas
From: Xiang Chen
We need to check for timeout before task status, or the task will be
mistook as completed internal abort command.
Also add protection for sas_task.task_state_flags in
hisi_sas_tmf_timedout().
Signed-off-by: Xiang Chen
Signed-off-by: John Garry
---
drivers/scsi/hisi_sas/hisi_s
Add skeleton driver for v3 hw in hisi_sas_v3_hw.c
File hisi_sas_v3_hw.c will serve 2 purposes:
- probing and initialisation of the controller based on pci device
- hw layer for v3-based controllers
The controller design is quite similar to v2 hw in hip07.
However key differences include:
-All v2
On Wed, May 31, 2017 at 08:37:50AM -0500, Tom Lendacky wrote:
> I like keeping the command line option and the values together. It may
> not look the greatest but I like it more than defining the command line
> option in head_64.S and passing it in as an argument.
>
> OTOH, I don't think the rip-r
From: Xiang Chen
Relocate get_ata_protocol() to a common location, as future
hw versions will require it.
Also rename with "hisi_sas_" prefix for consistency.
Signed-off-by: Xiang Chen
Signed-off-by: John Garry
---
drivers/scsi/hisi_sas/hisi_sas.h | 1 +
drivers/scsi/hisi_sas/hisi_sas_
From: Yazen Ghannam
In the amd_threshold_interrupt() handler, we loop through every possible
block in each bank and rediscover the block's address and if it's valid,
e.g. valid, counter present and not locked. However, we already have the
address saved in the threshold blocks list for each CPU an
From: Xiang Chen
Currently hisi_hba.lock is locked to deliver and receive a
command to/from any hw queue. This causes much
contention at high data-rates.
To boost performance, lock on a per queue basis for
sending and receiving commands to/from hw.
Certain critical regions still need to be lock
Currently hisi_sas_device.device_id is a u64. This can create a
problem in selecting the queue for a device, in that this code
does a 64b division on device id. For some 32b systems, 64b division
is slow and the lib reference must be explicitly included.
The device id does not need to be 64b in si
From: Xiang Chen
Relocate get_ncq_tag_v2_hw() to a common location, as
future hw versions will require it.
Also rename with "hisi_sas_" prefix for consistency.
Signed-off-by: Xiang Chen
Signed-off-by: John Garry
---
drivers/scsi/hisi_sas/hisi_sas.h | 1 +
drivers/scsi/hisi_sas/hisi_sas
Since hip08 SAS controller is based on pci device, add hisi_hba.pci_dev
for hip08 (will be v3), and also rename hisi_hba.pdev to .platform_dev
for clarity.
In addition, for common code which wants to reference the controller
device struct, add hisi_hba.dev, and change the common code to use
it.
S
On Wed, May 31, 2017 at 3:35 PM, Alexandre Belloni
wrote:
> On 31/05/2017 at 11:34:43 +0800, Chen-Yu Tsai wrote:
>> On Wed, May 31, 2017 at 3:32 AM, Alexandre Belloni
>> wrote:
>> > +static void sun4i_pwm_get_state(struct pwm_chip *chip,
>> > + struct pwm_device *pwm
Hi,
On 31-05-17 15:05, Peter Rosin wrote:
On 2017-05-31 14:21, Hans de Goede wrote:
actually this is the first time I hear about a mux framework
at all. Is there a git tree with the patches for this somewhere ?
https://gitlab.com/peda-linux/mux.git in the "mux" branch.
Series posted here:
ht
Hi Andy,
> -Original Message-
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Sunday, May 28, 2017 8:04 AM
> To: A.S. Dong
> Cc: linux-ser...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm
> Mailing List; Greg Kroah-Hartman; Jiri Slaby; Andy Duan; Stefan Agner;
On Wed, May 31, 2017 at 03:39:22PM +0300, Mike Rapoport wrote:
> For the CRIU usecase, disabling THP for a while and re-enabling it
> back will do the trick, provided VMAs flags are not affected, like
> in the patch you've sent. Moreover, we may even get away with
Are you going to check uname -r
On 24/05/2017 12:22, Marc Zyngier wrote:
> On 24/05/17 11:00, Robin Murphy wrote:
>> On 23/05/17 20:15, Mason wrote:
>>> On 23/05/2017 20:03, Robin Murphy wrote:
On 23/05/17 18:54, Mason wrote:
> On 23/05/2017 19:03, Bjorn Helgaas wrote:
>> On Wed, May 17, 2017 at 04:56:08PM +0200, Mar
On Wed 31-05-17 15:39:22, Mike Rapoprt wrote:
>
>
> On May 31, 2017 3:08:22 PM GMT+03:00, Michal Hocko wrote:
[...]
> > From what Mike said a global disable THP for the whole process
> >while the post-copy is in progress is a better solution anyway.
>
> For the CRIU usecase, disabling THP for a
The driver may sleep in interrupt handling, and the function call path is:
qed_int_sp_dpc (tasklet_init indicates it handles interrupt)
qed_int_attentions
qed_mcp_handle_events
qed_mcp_handle_link_change
qed_link_update
qed_fill_link
qed_mcp_get_media_type
On 22/05/17 12:23, Vivek Gautam wrote:
> Make use of reset_control_array_*() set of APIs to manage
> an array of reset controllers available with the device.
>
> Cc: Jon Hunter
> Cc: Thierry Reding
> Cc: Philipp Zabel
> Signed-off-by: Vivek Gautam
> ---
> drivers/soc/tegra/pmc.c | 91
>
Andy Shevchenko writes:
> On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov wrote:
>
>> K. Y., while all the changes are not groundbreaking I still have to drop
>> 'Tested-by' tags on affected patches. It would be great to have this
>> series retested.
>>
>> Thomas, Ingo, Peter, would you like t
> -Original Message-
> From: rjwyso...@gmail.com [mailto:rjwyso...@gmail.com] On Behalf Of
> Rafael J. Wysocki
> Sent: Tuesday, May 30, 2017 2:42 PM
> To: Moore, Robert ; Jan Kiszka
>
> Cc: Mika Westerberg ; Rafael J. Wysocki
> ; Len Brown ; Zheng, Lv
> ; linux-a...@vger.kernel.org; Linu
On Wed 31-05-17 16:18:09, Andrea Arcangeli wrote:
> On Wed, May 31, 2017 at 03:39:22PM +0300, Mike Rapoport wrote:
> > For the CRIU usecase, disabling THP for a while and re-enabling it
> > back will do the trick, provided VMAs flags are not affected, like
> > in the patch you've sent. Moreover, w
On Wed, 31 May 2017 10:19:26 +0200
Arnd Bergmann wrote:
> The newly added suspend/resume support causes a harmless warning:
>
> drivers/mtd/nand/atmel/nand-controller.c:2513:12: error:
> 'atmel_nand_controller_resume' defined but not used [-Werror=unused-function]
>
> This shuts up the warning
> Alan is right. CAP_SYS_ADMIN allows crossing the tty barrier.
I don't need CAP_ anything to mmap your frame buffer, or use selection to
cut and paste text into the terminal.
> Broken applications that you can wrap in a pty/tty pair as the lxc
> application does would be defeated if those appl
Andy Shevchenko writes:
> On Tue, May 30, 2017 at 2:34 PM, Vitaly Kuznetsov wrote:
>> Code is arch/x86/hyperv/ is only needed when CONFIG_HYPERV is set, the
>> 'basic' support and detection lives in arch/x86/kernel/cpu/mshyperv.c
>> which is included when CONFIG_HYPERVISOR_GUEST is set.
>>
>> Si
Stephen Hemminger writes:
> On Tue, 30 May 2017 13:34:16 +0200
> Vitaly Kuznetsov wrote:
>
>> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
>> index 04cb8d3..bdcc433 100644
>> --- a/arch/x86/kernel/cpu/mshyperv.c
>> +++ b/arch/x86/kernel/cpu/mshyperv.c
>> @@ -175,9
Hi Michael,
On mer., mai 31 2017, Michael Turquette wrote:
> Quoting Rob Herring (2017-05-31 07:23:58)
>> On Mon, May 29, 2017 at 10:08:16AM +0200, Linus Walleij wrote:
>> > On Tue, May 23, 2017 at 3:06 PM, Gregory CLEMENT
>> > wrote:
>> > > On mar., mai 23 2017, Linus Walleij wrote:
>> >
> I saw several companies who ship their embedded devices with
> single-function LSM modules (e.g. restrict only mount operation and
> ptrace operation). What is unfortunate is that their LSM modules had
> never been proposed for upstream, and thus bugs remained unnoticed.
So which of them cannot
Hi Michael,
On 05/31/2017 07:40 PM, Michael Ellerman wrote:
> The "Sync framework" test doesn't work if the kernel has no support,
> obviously. Rather than reporting a failure, check for the kernel support
> by looking for /sys/kernel/debug/sync/sw_sync, and if not found skip the
> test.
>
> Sign
On Wed, May 31, 2017 at 08:14:55AM +0200, Oleksij Rempel wrote:
> Document the new optional "fsl,pmic_stby_poweroff" property.
I'm missing both the cover letter and the rest of the series, what's
going on with dependencies here?
signature.asc
Description: PGP signature
Colin Walters wrote:
> > KEY_SERVICE_NS_UTS
> > KEY_SERVICE_NS_IPC
> > KEY_SERVICE_NS_MNT
> > KEY_SERVICE_NS_PID
> > KEY_SERVICE_NS_NET
> > KEY_SERVICE_NS_CGROUP
>
> Any reasons not to reuse the CLONE_ flags?
Yes. Most of the CLONE_* flags are completely irrelevant here
On Wed, May 31, 2017 at 5:37 PM, Vitaly Kuznetsov wrote:
>>> # Hyper-V paravirtualization support
>>> -obj-$(CONFIG_HYPERVISOR_GUEST) += hyperv/
>>> +ifdef CONFIG_HYPERV
>>> +obj-y += hyperv/
>>> +endif
>>
>> Can
>> obj-$(CONFIG_HYPERV) += hyperv/
>> work for you instead?
>>
>
> CONFIG_HYPERV ca
On Wed, May 31, 2017 at 08:14:52AM +0200, Oleksij Rempel wrote:
> Signed-off-by: Oleksij Rempel
> Cc: ker...@pengutronix.de
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: linux-...@vger.kernel.org
> Cc: devicet..
On Wed, May 31, 2017 at 03:44:38PM +0100, Mark Brown wrote:
> On Wed, May 31, 2017 at 08:14:55AM +0200, Oleksij Rempel wrote:
> > Document the new optional "fsl,pmic_stby_poweroff" property.
>
> I'm missing both the cover letter and the rest of the series, what's
> going on with dependencies here?
On Wed, May 31, 2017 at 08:14:53AM +0200, Oleksij Rempel wrote:
> One of the Freescale recommended sequences for power off with external
> PMIC is the following:
> ...
> 3. SoC is programming PMIC for power off when standby is asserted.
> 4. In CCM STOP mode, Standby is asserted, PMIC gates SoC s
On Wed, May 31, 2017 at 08:14:55AM +0200, Oleksij Rempel wrote:
> Document the new optional "fsl,pmic_stby_poweroff" property.
>
> Signed-off-by: Oleksij Rempel
> Cc: ker...@pengutronix.de
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: Liam Girdwood
> Cc: Mark Brown
> Cc: Rob Herring
> Cc: M
On Wed, May 31, 2017 at 1:53 PM, Bartosz Golaszewski wrote:
> 2017-05-30 20:55 GMT+02:00 Andy Shevchenko :
>> On Tue, May 30, 2017 at 11:58 AM, Bartosz Golaszewski wrote:
>>> We currently shift bits here and there without actually explaining
>>> what we're doing. Add some helper variables with na
On 05/31/2017 08:44 AM, Gustavo Padovan wrote:
> Hi Michael,
>
> On 05/31/2017 07:40 PM, Michael Ellerman wrote:
>> The "Sync framework" test doesn't work if the kernel has no support,
>> obviously. Rather than reporting a failure, check for the kernel support
>> by looking for /sys/kernel/debug/s
Am 31.05.2017 um 11:18 schrieb Phil Elwell:
> The switch to using the upstream bcm2835_cprman clock driver caused a
> few problems for users of PCM (I2S) peripherals. Audio applications
> require accurate, stable clocks, and the cprman driver wasn't
> conservative enough in its choice of clock sour
On Wed, May 31, 2017 at 02:29:20AM -0700, Omar Sandoval wrote:
> diff --git a/fs/btrfs/free-space-tree.c b/fs/btrfs/free-space-tree.c
> index fc0bd8406758..5abd3cd71144 100644
> --- a/fs/btrfs/free-space-tree.c
> +++ b/fs/btrfs/free-space-tree.c
> @@ -153,21 +153,18 @@ static inline u32 free_space_
On Wed, May 31, 2017 at 1:54 PM, Bartosz Golaszewski wrote:
> 2017-05-30 20:59 GMT+02:00 Andy Shevchenko :
>> On Tue, May 30, 2017 at 11:58 AM, Bartosz Golaszewski wrote:
>>> Indicate the error number and make the message a bit more elaborate.
>>
>>> + dev_err(dev,
>>> +
On 05/31/2017 at 01:46 AM, Tom Lendacky wrote:
> On 5/25/2017 11:17 PM, Xunlei Pang wrote:
>> On 04/19/2017 at 05:21 AM, Tom Lendacky wrote:
>>> Provide support so that kexec can be used to boot a kernel when SME is
>>> enabled.
>>>
>>> Support is needed to allocate pages for kexec without encrypti
On Wed, 31 May 2017 20:16:12 +0900
Greg KH wrote:
> On Wed, May 31, 2017 at 10:39:23AM +0200, Dmitry Vyukov wrote:
> > On Tue, May 30, 2017 at 2:09 PM, Alan Cox
> > wrote:
> > >> >> I'll think about possible solutions, but I have no prior experience
> > >> >> with the tty code. In the meantim
2017-05-31 16:57 GMT+02:00 Andy Shevchenko :
> On Wed, May 31, 2017 at 1:53 PM, Bartosz Golaszewski wrote:
>> 2017-05-30 20:55 GMT+02:00 Andy Shevchenko :
>>> On Tue, May 30, 2017 at 11:58 AM, Bartosz Golaszewski wrote:
We currently shift bits here and there without actually explaining
Jork Loeser writes:
>> -Original Message-
>> From: Vitaly Kuznetsov [mailto:vkuzn...@redhat.com]
>> Sent: Tuesday, May 30, 2017 04:34
>> To: x...@kernel.org; de...@linuxdriverproject.org
>> Cc: linux-kernel@vger.kernel.org; KY Srinivasan ; Haiyang
>> Zhang ; Stephen Hemminger
>> ; Thomas
From: Daniel Vetter
Date: Wed, 31 May 2017 08:10:45 +0200
> On Wed, May 31, 2017 at 7:54 AM, Daniel Vetter wrote:
>> On Wed, May 31, 2017 at 1:06 AM, Dave Airlie wrote:
>>> On 31 May 2017 at 08:10, David Miller wrote:
From: Daniel Vetter
Date: Tue, 30 May 2017 22:15:42 +0200
>>
On Tue 30-05-17 16:24:36, Gustavo A. R. Silva wrote:
> NULL check at line 1226: if (!pgdat), implies that pointer pgdat
> might be NULL.
> Function rollback_node_hotadd() dereference this pointer.
> Add NULL check to avoid a potential NULL pointer dereference.
The changelog is quite cryptic to be
From: Alexander Potapenko
Date: Wed, 31 May 2017 10:56:47 +0200
> Hi David,
>
> I've noticed that the upstream patch:
> https://github.com/torvalds/linux/commit/0ff50e83b5122e836ca492fefb11656b225ac29c
> contains the KMSAN report and the repro, despite I've put them under
> the triple dash (IIRC
Alan Cox wrote:
> > I saw several companies who ship their embedded devices with
> > single-function LSM modules (e.g. restrict only mount operation and
> > ptrace operation). What is unfortunate is that their LSM modules had
> > never been proposed for upstream, and thus bugs remained unnoticed.
>
> > +/* only works in process context because of stack detection */
> > +static inline bool is_dma_capable_addr(void *addr)
> > +{
> > + return !(is_vmalloc_or_module_addr(addr) ||
> > +object_is_on_stack(addr));
>
> This does not catch kmap'ed buffers which are not directly DMA'abl
On Thu, 1 Jun 2017 00:10:07 +0900
Tetsuo Handa wrote:
> Alan Cox wrote:
> > > I saw several companies who ship their embedded devices with
> > > single-function LSM modules (e.g. restrict only mount operation and
> > > ptrace operation). What is unfortunate is that their LSM modules had
> > > nev
On the DM9000B, dm9000_phy_write() is called after the main spinlock
is held, during the dm9000_timeout() routine. Spinlock recursion
occurs because the main spinlock is requested again in
dm9000_phy_write(). So spinlock should be avoided in dm9000_phy_write()
during the dm9000_timeout() routine.
On Wed, 31 May 2017 18:29:07 +0800
Jia-Ju Bai wrote:
> The driver may sleep under a spin lock, and the function call path is:
> b43legacy_attr_interfmode_store (acquire the lock by spin_lock_irqsave)
> b43legacy_radio_set_interference_mitigation
> b43legacy_radio_interference_mitigation_dis
On Wed, 31 May 2017, Marc Zyngier wrote:
> On 31/05/17 10:58, Thomas Gleixner wrote:
> > #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
> > @@ -329,6 +330,11 @@ static inline void irqd_clr_activated(st
> > __irqd_to_state(d) &= ~IRQD_ACTIVATED;
> > }
> >
> > +st
Andrew,
it seems that this patch fallen through cracks. I am sorry if this was
due to my review feedback because it turned out that I missed the point
and later added my Acked-by. Sorry about that
On Mon 01-05-17 14:34:21, David Rientjes wrote:
> The purpose of the code that commit 623762517e23 ("
On Thu 25-05-17 21:43:43, Nick Desaulniers wrote:
> On Tue, May 16, 2017 at 10:27:46AM +0200, Michal Hocko wrote:
> > I guess it is worth reporting this to clang bugzilla. Could you take
> > care of that Nick?
>
> >From https://bugs.llvm.org//show_bug.cgi?id=33065#c5
> it seems that this is indeed
There is no such thing as a bad unlock order.
Signed-off-by: Peter Zijlstra (Intel)
---
lib/locking-selftest.c | 29 -
1 file changed, 29 deletions(-)
--- a/lib/locking-selftest.c
+++ b/lib/locking-selftest.c
@@ -516,34 +516,6 @@ GENERATE_TESTCASE(double_unlock_rse
Something that should've been done from the start...
---
include/linux/rtmutex.h | 25 ++-
kernel/locking/rtmutex-debug.c |6 +
kernel/locking/rtmutex-debug.h |2
kernel/locking/rtmutex.c | 36 --
kernel/locking/rtmutex.h |2
lib/Kconfig.
Now that (PI) futexes have their own private RT-mutex interface and
implementation we can easily add lockdep annotations to the existing
RT-mutex interface.
Signed-off-by: Peter Zijlstra (Intel)
---
include/linux/rtmutex.h| 25 +
kernel/locking/rtmutex-debug.c |
Now that RT-mutex has lockdep annotations, add them to the selftest.
Signed-off-by: Peter Zijlstra (Intel)
---
lib/locking-selftest-rtmutex.h | 11
lib/locking-selftest.c | 106 +
2 files changed, 117 insertions(+)
--- /dev/null
+++ b/lib/
On 5/31/2017 3:59 AM, Peter Dolding wrote:
> ...
>
> Like you see here in Australian government policy there is another
> thing called whitelisted.
> https://www.asd.gov.au/publications/protect/top_4_mitigations_linux.htm
> Matthew Garrett you might want to call IMA whitelisting Australian
> gove
On Wed, May 31, 2017 at 5:10 PM, David Miller wrote:
> From: Alexander Potapenko
> Date: Wed, 31 May 2017 10:56:47 +0200
>
>> Hi David,
>>
>> I've noticed that the upstream patch:
>> https://github.com/torvalds/linux/commit/0ff50e83b5122e836ca492fefb11656b225ac29c
>> contains the KMSAN report and
2017-05-31 17:00 GMT+02:00 Andy Shevchenko :
> On Wed, May 31, 2017 at 1:54 PM, Bartosz Golaszewski wrote:
>> 2017-05-30 20:59 GMT+02:00 Andy Shevchenko :
>>> On Tue, May 30, 2017 at 11:58 AM, Bartosz Golaszewski wrote:
Indicate the error number and make the message a bit more elaborate.
>>>
On 05/30/2017 06:23 AM, Phil Elwell wrote:
Hi,
I've run into a problem using the fixed-factor clock on Raspberry Pi and I'd
like some advice before I submit a patch.
Some context: the aim is to use a standard UART and some external circuitry
as a MIDI interface. This would be straightforward ex
On 2017-05-31 16:18, Hans de Goede wrote:
> Hi,
>
> On 31-05-17 15:05, Peter Rosin wrote:
>> On 2017-05-31 14:21, Hans de Goede wrote:
>>> actually this is the first time I hear about a mux framework
>>> at all. Is there a git tree with the patches for this somewhere ?
>>
>> https://gitlab.com/ped
Quoting Alan Cox (gno...@lxorguk.ukuu.org.uk):
> > Alan is right. CAP_SYS_ADMIN allows crossing the tty barrier.
>
> I don't need CAP_ anything to mmap your frame buffer, or use selection to
> cut and paste text into the terminal.
>
> > Broken applications that you can wrap in a pty/tty pair as
On Wed, 31 May 2017 13:26:43 +0300
Kalle Valo wrote:
> Jia-Ju Bai writes:
>
> > The driver may sleep under a spin lock, and the function call path is:
> > b43legacy_op_bss_info_changed (acquire the lock by spin_lock_irqsave)
> > b43legacy_synchronize_irq
> > synchronize_irq --> may sleep
> On May 31, 2017, at 6:59 AM, Peter Dolding wrote:
>
> Number 1 we need to split the idea of signed and whitelisted. IMA is
> signed should not be confused with white-listed.You will find
> policies stating whitelist and signed as two different things.
IMA-appraisal can do both. If the s
Quoting Casey Schaufler (ca...@schaufler-ca.com):
>
>
> On 5/31/2017 3:59 AM, Peter Dolding wrote:
> > ...
> >
> > Like you see here in Australian government policy there is another
> > thing called whitelisted.
> > https://www.asd.gov.au/publications/protect/top_4_mitigations_linux.htm
> > Matth
On Wed, May 31, 2017, at 10:47 AM, David Howells wrote:
> > So if the mount-in-container is mostly init containers, and for init
> > containers you have *all* namespaces usually, does it make
> > sense to have the capability to match namespaces for key services?
>
> Yes.
>
> If I don't provide
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