On Wed, May 31, 2017 at 3:35 PM, Alexandre Belloni
<alexandre.bell...@free-electrons.com> wrote:
> On 31/05/2017 at 11:34:43 +0800, Chen-Yu Tsai wrote:
>> On Wed, May 31, 2017 at 3:32 AM, Alexandre Belloni
>> <alexandre.bell...@free-electrons.com> wrote:
>> > +static void sun4i_pwm_get_state(struct pwm_chip *chip,
>> > + struct pwm_device *pwm,
>> > + struct pwm_state *state)
>> > +{
>> > + struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip);
>> > + u64 clk_rate, tmp;
>> > + u32 val;
>> > + unsigned int prescaler;
>> > +
>> > + clk_rate = clk_get_rate(sun4i_pwm->clk);
>> > +
>> > + val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
>> > +
>> > + if ((val == PWM_PRESCAL_MASK) &&
>> > sun4i_pwm->data->has_prescaler_bypass)
>> > + prescaler = 1;
>> > + else
>> > + prescaler = prescaler_table[PWM_REG_PRESCAL(val,
>> > pwm->hwpwm)];
>> > +
>> > + if (prescaler == 0)
>> > + return;
>>
>> This looks like an invalid state. How does the PWM core handle it?
>> Or rather, how does the driver signal an invalid state?
>>
>
> It doesn't and it doesn't really matter, if the IP is in an invalid
> state, this bails out without modifying the know state so the core will
> behave as if there was no hardware read out and everything will be
> synchronized on the first ->apply() call.
Cool.
Thanks
ChenYu
>
>> Otherwise,
>>
>> Reviewed-by: Chen-Yu Tsai <w...@csie.org>
>>
>
> --
> Alexandre Belloni, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
