v5->v6:
- Futex code changes:
1) Allow userspace locking of exclusive locks instead of just
kernel locking (patch 14). This is controlled by a flag passed
to the futex(2) syscall. This enables better throughput.
2) Add a reader-preferring mode to shared locking.
- Futex
A new futex_setup_timer() helper function is added to consolidate all
the hrtimer_sleeper setup code.
Signed-off-by: Waiman Long
---
kernel/futex.c | 67 --
1 file changed, 37 insertions(+), 30 deletions(-)
diff --git a/kernel/futex.c b/ke
Two new helper functions (task_pi_list_add & task_pi_list_del)
are created to consolidate all the pure pi_state_list addition and
insertion codes. The set_owner argument in task_pi_list_add() will
be needed in a later patch.
Signed-off-by: Waiman Long
---
kernel/futex.c | 52
Two new helper functions cmpxchg_futex_value() and get_futex_value()
are added to access and change the futex value without the hash
bucket lock. As a result, page fault is enabled and the page will
be faulted in if not present yet.
Signed-off-by: Waiman Long
---
kernel/futex.c | 15 +++
This microbenchmark simulates how the use of different futex types
can affect the actual performanace of userspace mutex locks. The
usage is:
perf bench futex mutex
Three sets of simple mutex lock and unlock functions are implemented
using the wait-wake and PI futexes as well as the glib
To better understand how the TP futexes are performing, it is useful to
return the internal status on the TP futexes. The FUTEX_LOCK futex(2)
syscall will now return a positive status code if no error happens. The
status code consists of the following 3 fields:
1) Bits 00-07: code on how the lock
All the TP futex lock waiters are serialized in the kernel using a
kernel mutex which acts like a wait queue. The order at which the
waiters popped out from the wait queue will affect performance when
exclusive (writer) and shared (reader) lock waiters are mixed in the
queue. The worst case scenari
Unlike other futexes, TP futexes do not accept the specification of
a timeout value. To align with the other futexes, timeout support is
now added. Like FUTEX_WAIT, the timeout value is relative to current
time, not an absolute time. However, the timeout isn't as precise as
the other futex types d
For debugging purpose, it is sometimes useful to dump the internal
states in the futex hash bucket table. This patch adds a file
"futex_hash_table" in debugfs root filesystem to dump the internal
futex states.
Signed-off-by: Waiman Long
---
kernel/futex.c | 82 +++
The tp-futex.txt was updated to add description about shared locking
support.
Running the futex locking microbenchmark on a 2-socket 36-core E5-2699
v3 system (HT off) running on a 4.11 based kernel, the performance
of TP rwlock with 1:1 reader/writer ratio versus one based on the
wait-wake futexe
Unlike wake_up_process(), wake_up_q() doesn't tell us how many
tasks have been woken up. This information can sometimes be useful
for tracking purpose. So wake_up_q() is now modified to return that
information.
Signed-off-by: Waiman Long
---
include/linux/sched/wake_q.h | 2 +-
kernel/futex.c
The TP futexes was designed to support userspace mutually exclusive
locks. They are now extended to support userspace reader/writer
locks as well.
Two new futex command codes are added:
1) FUTEX_LOCK_SHARED - to acquire a shared lock (reader-lock)
2) FUTEX_UNLOCK_SHARED - to release a shred lock
This patch extends the futex-mutex and futex-rwlock microbenchmarks to
test userspace mutexes and rwlocks built on top of the TP futexes. We
can then compare the relative performance of those userspace locks
based on different type of futexes.
Signed-off-by: Waiman Long
---
tools/perf/bench/fute
By default, the TP futexes do not have preference for either readers
or writers. Most reader-writer locks allows users to decide if they
want to prefer readers or writers more.
This patch allows the setting of the prefer-reader mode in the val
argument of the futex system call. If that flag is set
This patch adds a new document file on how to use the TP futexes.
In term of locking performance, a futex locking microbenchmark
was written where separate userspace mutexes are implemented using
wait-wake (WW), PI and TP futexes respectively. This microbenchmark
was intructed to run 10s of lockin
The current TP futexes has no guarantee that the top waiter
(serialization mutex owner) can get the lock within a finite time.
As a result, lock starvation can happen.
A lock handoff mechanism is added to the TP futexes to prevent lock
starvation from happening. The idea is that the top waiter can
A performance disadvantage of TP futexes versus wait-wake futex is
the fact that locking was done in the kernel for TP futexes instead of
in the userspace like the WW futexes. The additional latency between
when the lock was taken in the kernel and when the task returned to
the userspace would be a
On Wed, Mar 22, 2017 at 6:33 PM, Alexander Potapenko wrote:
> On Wed, Mar 22, 2017 at 6:07 PM, Andrey Konovalov
> wrote:
>> On Wed, Mar 22, 2017 at 5:54 PM, Andrey Ryabinin
>> wrote:
>>> On 03/22/2017 07:34 PM, Andrey Konovalov wrote:
On Wed, Mar 22, 2017 at 5:06 PM, Andrey Ryabinin
On Tue, Mar 21, 2017 at 05:35:08PM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> The patch adds the setup for allowing CDM can recognize these packets with
> carrying port-distinguishing tag. Otherwise, these tagging packets will be
> handled incorrectly by CDM. The setup is working
As the futex_state structure will be overloaded in later patches
to be used by non-PI futexes, it is necessary to add a type field to
distinguish among different types of futexes.
Signed-off-by: Waiman Long
---
kernel/futex.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
Currently, the futex state objects can only be located indirectly as
hash bucket => futex_q => futex state
Actually it can be beneficial in some cases to locate the futex state
object directly from the hash bucket without the futex_q middleman.
Therefore, a new list head to link the futex
A new futex implementation called throughput-optimized (TP) futexes
is introduced. The goal of this new futex type is to maximize locking
throughput at the expense of fairness and deterministic latency. Its
throughput is higher than that of the wait-wake futexes especially
on systems with a large n
The futex_pi_state structure will be overloaded in later patches to
store state information about non-PI futexes. So the structure name
itself is no longer a good description of its purpose. So its name
is changed to futex_state, a more generic name.
Some of the functions that process the futex st
The TP futexes don't have code to handle the death of futex
owners. There are 2 different cases that need to be considered.
As top waiter gets a reference to the task structure of the futex
owner, the task structure will never go away even if the owner dies.
When the futex owner died while the top
This microbenchmark simulates how the use of different futex types
can affect the actual performanace of userspace rwlock locks. The
usage is:
perf bench futex rwlock
Two sets of simple rwlock lock and unlock functions are implemented
using the wait-wake futexes and glibc rwlock respecti
It is completely unused and implemented only on x86.
Remove it.
Signed-off-by: Dmitry Vyukov
Suggested-by: Mark Rutland
Cc: Andrey Ryabinin
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Cc: Peter Zijlstra
Cc: Andrew Morton
Cc: linux-kernel@vger.kernel.org
Cc: x...@kernel.org
--
On Wed, Mar 22, 2017 at 5:13 PM, Andrey Ryabinin
wrote:
>
>
> On 03/22/2017 05:10 PM, Dmitry Vyukov wrote:
>> It is completely unused and implemented only on x86.
>> Remove it.
>>
>> Signed-off-by: Dmitry Vyukov
>> Suggested-by: Andrey Ryabinin
>
> Not me, it was Mark Rutland
Mailed v2 with pr
On Wednesday, March 22, 2017 06:33:25 PM Joerg Roedel wrote:
> From: Joerg Roedel
>
> No platform-device is required for IO(x)APICs, so don't even
> create them.
>
> Signed-off-by: Joerg Roedel
If we do this, I'd prefer not to do [2/3], because we'll introduce code that
will be essentially dea
On Wed, 2017-03-22 at 18:09 +0100, Lucas Stach wrote:
> Am Mittwoch, den 22.03.2017, 18:53 +0200 schrieb Leonard Crestez:
> >
> > Several imx6* socs have three built-in regulators LDO_ARM LDO_SOC and
> > LDO_PU used to control internal chip voltages. "ldo-bypass" mode refers
> > to placing these r
On 22.03.2017 00:52, Diego Viola wrote:
On Tue, Mar 21, 2017 at 12:29 PM, Diego Viola wrote:
On Tue, Mar 21, 2017 at 10:04 AM, Diego Viola wrote:
On Mon, Mar 20, 2017 at 8:15 PM, Diego Viola wrote:
On Mon, Mar 20, 2017 at 3:27 PM, Diego Viola wrote:
On Mon, Mar 20, 2017 at 1:32 PM, Mathia
Hi,
On Tuesday, March 21, 2017 02:04:38 PM Sekhar Nori wrote:
> Hi,
>
> On Tuesday 14 March 2017 10:06 PM, Bartlomiej Zolnierkiewicz wrote:
> > Add Palmchip BK3710 PATA controller driver.
> >
> > Signed-off-by: Bartlomiej Zolnierkiewicz
>
> There are some checkpatch suggestions that are worth
dwc has 2 dbi address space labeled dbics and dbics2. The existing
helper to access dbi address space can access only dbics. However
dbics2 has to be accessed for programming the BAR registers in the
case of EP mode. This is in preparation for adding EP mode support
to dwc driver.
Cc: Jingoo Han
From: Jagan Teki
This patchset, add support for backlight, lcdif, touchscreen,
sound card and related codec and can nodes all Engicam SOM's
which are supporting mainline as of now.
Jagan Teki (12):
ARM: dts: imx6ul-geam: Add backlight support for lcdif
ARM: dts: imx6ul-isiot: Add backlight s
From: Jagan Teki
This patch add support for lcdif backlight on GEAM6UL
variant boards.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6ul-geam.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch
From: Jagan Teki
Add support for i2c nodes i2c1 and i2c2 on Is.IoT MX6UL
eMMC variant boards.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6ul-isiot.dtsi | 28
1 file changed, 28 insertions(+)
diff --git
From: Jagan Teki
max11801 touchscreen on Engicam iCoreM6 DualLite/Solo module is
connected via i2c1, so add max11801: touchscreen@48 on i2c1.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6dl-icore.dts | 9 +
1 file changed, 9
From: Jagan Teki
Add support for Sound card and related codec(via i2c1) nodes
on Engicam GEAM6UL variant module boards.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6ul-geam-kit.dts | 13 +
arch/arm/boot/dts/imx6ul-geam.d
From: Jagan Teki
Add support for Sound card and related codec(via i2c1) nodes
on Engicam Is.IoT MX6UL variant module boards.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6ul-isiot-common.dtsi | 11 +++
arch/arm/boot/dts/imx6u
From: Jagan Teki
Add LVDS display support for OpenFrame Capacitive touch 7 inc
display which is supported by Engicam i.CoreM6 DualLite/Solo Starter Kit.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6dl-icore.dts | 25
From: Jagan Teki
Add support for can1 and can2 nodes on Engicam i.CoreM6 RQS
QDL module boards.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6dl-icore-rqs.dts | 8
arch/arm/boot/dts/imx6q-icore-rqs.dts| 8
a
From: Jagan Teki
Add support for Sound card and related codec(via i2c1) nodes
on below Engicam module boards.
- i.CoreM6 DualLite/Solo Starter kit
- i.CoreM6 Quad/Dual Starter kit
- i.CoreM6 Quad/Dual OpenFrame Cap touch 10.1
- i.CoreM6 Quad/Dual OpenFrame Cap touch 12.3
Cc: Shawn Guo
Cc: Matte
From: Jagan Teki
Add touchscreen node as i2c1 slave device on Engicam Is.IoT MX6UL
modules, the touchscreen controlled 'st,stmpe-ts' connected via
i2c with st,stmpe811 mfb interface.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6ul-i
From: Jagan Teki
Add Synchronous Audio Interface(SAI) node for Engicam GEAM6UL
and Is.IoT MX6UL variant module boards.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6ul-geam.dtsi | 16
arch/arm/boot/dts/imx6ul-isiot.
From: Hayes Wang
Date: Mon, 20 Mar 2017 16:13:43 +0800
> The RMS and the rx early size should base on the same rx size. However,
> the RMS is set to 9K bytes now and the rx early depends on mtu. For using
> the rx buffer effectively, sync the two settings according to the mtu.
Series applied.
Neil Armstrong writes:
> This patch adds support for the P230 and Q200 ADC laddered button and
> GPIO button.
>
> Signed-off-by: Neil Armstrong
Applied to v4.12/dt64
Kevin
From: Jagan Teki
lcdif nodes are differ wrt specific LCD connected on Is.IoT MX6UL
module, so create separate file 'imx6ul-isiot-common.dtsi' for common
lcdif node structure and include the same on respective dts.
More common nodes will add in future patches.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc:
From: Arnd Bergmann
Date: Mon, 20 Mar 2017 09:51:13 +0100
> When building the driver as a module, we get a warning about the
> lack of a license:
>
> WARNING: modpost: missing MODULE_LICENSE() in
> drivers/net/ethernet/synopsys/dwc-xlgmac.o
> see include/linux/module.h for more information
>
>
From: Arnd Bergmann
Date: Mon, 20 Mar 2017 09:51:12 +0100
> Without this header, we can run into a build error:
>
> drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c: In function
> 'xlgmac_config_queue_mapping':
> drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c:1548:36: error:
> 'IEEE_8021QAZ_MAX_TC
From: Jagan Teki
This patch add support for lcdif backlight on Is.IoT MX6UL
variant boards.
Cc: Shawn Guo
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/imx6ul-isiot.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git
On Wed, Mar 22, 2017 at 09:25:02AM -0700, Joel Fernandes wrote:
> On Wed, Mar 22, 2017 at 7:18 AM, Peter Zijlstra wrote:
> > On Fri, Mar 10, 2017 at 12:47:43PM -0800, Joel Fernandes wrote:
> >> This patch rewrites comments related task priorities and CPU usage
> >> along with an example to show ho
On 2017-03-22 02:05 AM, Stanislaw Gruszka wrote:
On Tue, Mar 21, 2017 at 03:43:38PM -0700, Ankur Arora wrote:
This was broken in commit cd979883b9ede90643e019f33cb317933eb867b4.
do_suspend (from xen/manage.c) and thus xen_resume_notifier never get
called on the initial-domain at resume (it is if
Hello!
On 03/22/2017 08:49 PM, Bartlomiej Zolnierkiewicz wrote:
Add Palmchip BK3710 PATA controller driver.
Signed-off-by: Bartlomiej Zolnierkiewicz
There are some checkpatch suggestions that are worth fixing, I think.
[PATCH v2 1_3] ata: add Palmchip BK3710 PATA controller driver - Bartlo
On Wed, Mar 22, 2017 at 10:01:00AM +0100, Heiko Stuebner wrote:
> Am Montag, 20. März 2017, 16:53:41 CET schrieb Brian Norris:
> > Gru is a base dev board for a family of devices, including Kevin. Both
> > utilize Rockchip RK3399, and they share much of their design.
> >
> > Signed-off-by: Brian N
From: Arnd Bergmann
Date: Mon, 20 Mar 2017 09:52:50 +0100
> The dependency is reversed: cpsw and netcp call into cpts,
> but cpts depends on the other two in Kconfig. This can lead
> to cpts being a loadable module and its callers built-in:
>
> drivers/net/ethernet/ti/cpsw.o: In function `cpsw_r
On Wed, Mar 22, 2017 at 12:59:37PM +0100, Heiko Stuebner wrote:
> Am Montag, 20. März 2017, 16:53:42 CET schrieb Brian Norris:
> > Kevin is part of a family of boards called Gru. As best as possible, the
> > properties shared by the Gru family are placed in rk3399-gru.dtsi, while
> > Kevin-specific
If the child domain prefers tasks to go siblings, the local group could
end up pulling tasks to itself even if the local group is almost equally
loaded as the source group.
Lets assume a 4 core,smt==2 machine running 5 thread ebizzy workload.
Everytime, local group has capacity and source group ha
Hi,
On Saturday, March 18, 2017 04:52:18 PM Sergei Shtylyov wrote:
> Hello!
>
> On 3/14/2017 7:36 PM, Bartlomiej Zolnierkiewicz wrote:
>
> > Add Palmchip BK3710 PATA controller driver.
> >
> > Signed-off-by: Bartlomiej Zolnierkiewicz
> [...]
> > diff --git a/drivers/ata/pata_bk3710.c b/drivers
Hi Elaine,
Am Donnerstag, 16. März 2017, 16:44:53 CET schrieb Elaine Zhang:
much the same comments apply.
Need justification, use critical clocks and things like efuse should
have a driver, so why do they need special handling?
Thanks
Heiko
> Signed-off-by: Elaine Zhang
> ---
> drivers/clk/
On Wed, 22 Mar 2017 12:37:59 -0500
Julia Cartwright wrote:
> Which kernel were you testing on, here? From what I can tell, this
> should have been fixed with Thomas's commit:
>
>2a1d3ab8986d ("genirq: Handle force threading of irqs with primary
> and thread handler")
Thanks Julia for looki
On Wed, Mar 22, 2017 at 05:03:31PM +0900, Chanwoo Choi wrote:
> The commit 1259feddd0f8("pinctrl: samsung: Fix the width of
> PINCFG_TYPE_DRV bitfields for Exynos5433") already fixed
> the different width of PINCFG_TYPE_DRV from previous Exynos SoC.
>
> But, when merged the multiple patches, the m
Am Mittwoch, den 22.03.2017, 19:48 +0200 schrieb Leonard Crestez:
> On Wed, 2017-03-22 at 18:09 +0100, Lucas Stach wrote:
> > Am Mittwoch, den 22.03.2017, 18:53 +0200 schrieb Leonard Crestez:
> > >
> > > Several imx6* socs have three built-in regulators LDO_ARM LDO_SOC and
> > > LDO_PU used to con
Hi Neil
Neil Armstrong writes:
> Add pinctrl pins nodes following the additions of missing pins in the pinctrl
> driver.
>
> Signed-off-by: Neil Armstrong
I'll assume you will re-spin patches 2-3 of this series on Martin's
updated PWM series.
Thanks,
Kevin
On Mon, Mar 20, 2017 at 03:48:24PM -0700, Luck, Tony wrote:
> You added "count_threshold" for me ... so the condition isn't quite
> "overflows"
> like it was in the early versions.
It is a max count which, when reached, causes the soft offline attempt.
What did you mean with "overflows" exactly t
Hi Jon,
On 21/03/17 20:51, Jon Mason wrote:
> Cache related issues with DMA rings and performance issues related to
> caching are being caused by not properly setting the "dma-coherent" flag
> in the device tree entries. Adding it here to correct the issue.
I'd expect the SMMU to be wired up coh
To build breakpoint_test_arm64, ARCH value is only tested for "aarch64".
It covers only the native build because it's computed from uname -m output.
For cross-compilation, ARCH is set to arm64 and prevent to cross-compile
the test.
Fix the test to allow both native and cross-compilation of the test
Am Mittwoch, 22. Februar 2017, 10:59:55 CET schrieb Elaine Zhang:
> If pll is power down,when power up pll need wait pll lock.
> The reference documents section:
> PLL frequency change and lock check
>
> Signed-off-by: Elaine Zhang
applied to my clk-branch for 4.12
Thanks
Heiko
On Wed, Mar 22, 2017 at 03:55:30PM +0100, Joerg Roedel wrote:
> Hi Thierry
>
> On Mon, Mar 20, 2017 at 08:14:31PM +0100, Thierry Reding wrote:
> > I've got a series of patches that I'd like to merge for v4.12 that have
> > a build-time dependency on this patch. It would therefore be great to
> > g
Neil Armstrong writes:
> This patchset adds the GPIO lines names to describe the /real/ GPIO usage on
> the Odroid-C2 board. These names are useful to have a clear and human readable
> decription of the line usage.
Applied to v4.12/dt64,
Thanks,
Kevin
On 16/03/17 13:17, c...@rock-chips.com wrote:
> From: Liang Chen
>
> This patch adds core dtsi file for Rockchip RK3328 SoCs.
>
> Signed-off-by: Liang Chen
> ---
> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1362
> ++
> 1 file changed, 1362 insertions(+)
> creat
Hi Jacopo,
On Monday, March 20, 2017, Jacopo Mondi wrote:
> Chris: it would be great if you could give this another spin on RSK board.
I tested these patches on an RZ/A1H RSK board after modifying the DT for
the RSK vs the GENMAI board.
The following worked fine:
* SCIF
* I2C
* SDHI
* Ether
Le mardi 21 mars 2017 à 11:36 +, Russell King - ARM Linux a écrit :
> warn: v4l2-test-formats.cpp(1187): S_PARM is
> supported for buftype 2, but not ENUM_FRAMEINTERVALS
> warn: v4l2-test-formats.cpp(1194): S_PARM is
> supported but doesn't report V4L2_CAP_TIMEPE
On Wed, Mar 22, 2017 at 05:03:32PM +0900, Chanwoo Choi wrote:
> After merged commit 1259feddd0f8 ("pinctrl: samsung: Fix the width
> of PINCFG_TYPE_DRV bitfields for Exynos5433"), EXYNOS_PIN_BANK_EINTW
> was replaced by EXYNOS5433_PIN_BANK_EINTW_EXT. This patch removes
> the unused pin-bank macro (
From: Colin King
Date: Mon, 20 Mar 2017 11:37:22 +
> From: Colin Ian King
>
> The arguments packets and bytes to call mlxsw_sp_acl_rule_get_stats are
> in the wrong order. Fix this by swapping them.
>
> Detected by CoverityScan, CID#1419705 ("Arguments in wrong order")
>
> Fixes: 7c1b8eb1
On Wed, Mar 22, 2017 at 09:26:41AM +0100, Heiko Stuebner wrote:
> Am Montag, 20. März 2017, 16:53:44 CET schrieb Brian Norris:
> > We need to enable this regulator before the digitizer can be used. Wacom
> > recommended waiting for 100 ms before talking to the HID.
> >
> > Signed-off-by: Brian Nor
On Wed, 2017-03-22 at 08:25 -0700, Darren Hart wrote:
> On Tue, Mar 21, 2017 at 11:31:08AM -0700, Joe Perches wrote:
> > On Tue, 2017-03-21 at 09:30 -0700, John 'Warthog9' Hawley (VMware) wrote:
> > > Spamassassin sticks a long (~79 character) long string after a
> > > line that has a single space
On Tue, Mar 21, 2017 at 05:35:09PM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> the patch adds the setup of the corresponding device node of GMAC into the
> netdev instance which could allow other modules such as DSA to find the
> instance through the node in dt-bindings using of_fi
Is cpu_has_vmx_invvpid() sufficient? This indicates support for the
INVVPID instruction, but not necessarily any of the desired INVVPID
types. KVM's vpid_sync_context() assumes that at least one of
{VMX_VPID_EXTENT_SINGLE_CONTEXT, VMX_VPID_EXTENT_ALL_CONTEXT} is
supported.
On Wed, Mar 22, 2017 at
Add Palmchip BK3710 PATA controller driver.
Signed-off-by: Bartlomiej Zolnierkiewicz
---
drivers/ata/Kconfig | 9 ++
drivers/ata/Makefile | 1 +
drivers/ata/pata_bk3710.c | 382 ++
3 files changed, 392 insertions(+)
create mode 100644 d
Hi,
This patchset adds Palmchip BK3710 IDE controller driver to
libata and switches ARM/DaVinci to use it (instead of the old
IDE driver).
Sekhar, please check that it still works after changes, thanks.
Changes since v2
(https://www.spinics.net/lists/arm-kernel/msg568597.html):
- fixed 'checkpat
Disable IORDY Timer as the driver doesn't handle IORDY Timer
interrupt anyway.
Suggested-by: Sergei Shtylyov
Signed-off-by: Bartlomiej Zolnierkiewicz
---
drivers/ata/pata_bk3710.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/pata_bk3710.c b/drivers/ata/pat
Clear IORDYINT, INTRSTAT and DMAERROR bits of BMISP register
(value '1' needs to be written to the bit to clear it).
Suggested-by: Sergei Shtylyov
Signed-off-by: Bartlomiej Zolnierkiewicz
---
drivers/ata/pata_bk3710.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/a
From: Sekhar Nori
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subs
From: Sekhar Nori
Signed-off-by: Sekhar Nori
[b.zolnierkie: split from bigger patch + preserved old driver support]
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/arm/mach-davinci/board-dm644x-evm.c | 3 ++-
arch/arm/mach-davinci/board-dm646x-evm.c | 3 ++-
arch/arm/mach-davinci/board-neu
On 03/21/2017 02:35 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> the patch adds the setup of the corresponding device node of GMAC into the
> netdev instance which could allow other modules such as DSA to find the
> instance through the node in dt-bindings using of_find_net_device_by_n
On 03/21/2017 02:35 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> The patch adds the setup for allowing CDM can recognize these packets with
> carrying port-distinguishing tag. Otherwise, these tagging packets will be
> handled incorrectly by CDM. The setup is working out for general un
From: Alexander Duyck
Date: Mon, 20 Mar 2017 14:48:41 -0700
> These two patches are a couple of minor clean-ups related to busy polling.
> The first one addresses the fact that we were trying to busy poll on
> sender_cpu values instead of true NAPI IDs. The second addresses the fact
> that there
> +static int
> +core_read_mmd_indirect(struct mt7530_priv *priv, int prtad, int devad)
> +{
> + struct mii_bus *bus = priv->bus;
> + int value, ret;
> +
> + /* Write the desired MMD Devad */
> + ret = bus->write(bus, 0, MII_MMD_CTRL, devad);
> + if (ret < 0)
> + got
On Wed, Mar 22, 2017 at 04:36:46PM +0530, Jagan Teki wrote:
> From: Jagan Teki
>
> Added missing of_match_table for max11801_ts driver with
> compatible as "maxim,max11801_ts"
>
Why not "maxim,max11801"? Also, I think we'd need a binding document.
> Cc: Dmitry Torokhov
> Cc: Shawn Guo
> Cc:
On 03/22/2017 01:01 PM, Steven Rostedt wrote:
On Wed, 22 Mar 2017 12:37:59 -0500
Julia Cartwright wrote:
Which kernel were you testing on, here? From what I can tell, this
should have been fixed with Thomas's commit:
2a1d3ab8986d ("genirq: Handle force threading of irqs with primary
and
On Thu, Mar 23, 2017 at 12:00 AM, Dmitry Torokhov
wrote:
> On Wed, Mar 22, 2017 at 04:36:46PM +0530, Jagan Teki wrote:
>> From: Jagan Teki
>>
>> Added missing of_match_table for max11801_ts driver with
>> compatible as "maxim,max11801_ts"
>>
>
> Why not "maxim,max11801"? Also, I think we'd need a
On 03/21/2017 02:35 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> MT7530 is a 7-ports Gigabit Ethernet Switch that could be found on
> Mediatek router platforms such as MT7623A or MT7623N platform which
> includes 7-port Gigabit Ethernet MAC and 5-port Gigabit Ethernet PHY.
> Among thes
On Mon, Mar 06, 2017 at 09:45:50PM +0900, Sergey Senozhatsky wrote:
> sysrq is potentially even trickier. can we always wake_up() kernel
> thread from sysrq? there probably might be cases when we can't rely
> on the scheduler.
sysrq runs from interrupt context, right? Should be able to do wakeu
On Thu, Mar 23, 2017 at 12:05:17AM +0530, Jagan Teki wrote:
> On Thu, Mar 23, 2017 at 12:00 AM, Dmitry Torokhov
> wrote:
> > On Wed, Mar 22, 2017 at 04:36:46PM +0530, Jagan Teki wrote:
> >> From: Jagan Teki
> >>
> >> Added missing of_match_table for max11801_ts driver with
> >> compatible as "max
From: Bjorn Andersson
Date: Mon, 20 Mar 2017 16:35:42 -0700
> By moving these client drivers to use RPMSG instead of the direct SMD
> API we can reuse them ontop of the newly added GLINK wire-protocol
> support found in the 820 and 835 Qualcomm platforms.
>
> As the new (RPMSG-based) and old SMD
On Tue, Mar 21, 2017 at 3:36 PM, Vignesh R wrote:
> Introduce a field to store name of uart_port that can be used to easily
> identify uart port instances on a system that has more than one uart
uart -> UART
> instance. The name is of the form ttyXN(eg. ttyS0, ttyAMA0,..) where N
> is number tha
On Tue, Mar 21, 2017 at 3:36 PM, Vignesh R wrote:
> This series adds name attribute to uart_port struct inorder to store
> name of the tty port that will help in identify different uart
> instances.
> This patch series is based on discussion here[1].
Please, use versioning for the series. This AF
On Wed, Mar 22, 2017 at 01:30:12PM -0500, Grygorii Strashko wrote:
>
> On 03/22/2017 01:01 PM, Steven Rostedt wrote:
> > On Wed, 22 Mar 2017 12:37:59 -0500
> > Julia Cartwright wrote:
> >
> > > Which kernel were you testing on, here? From what I can tell, this
> > > should have been fixed with
On Wed, Mar 22, 2017 at 11:44:21AM -0700, Dmitry Torokhov wrote:
> On Thu, Mar 23, 2017 at 12:05:17AM +0530, Jagan Teki wrote:
> > On Thu, Mar 23, 2017 at 12:00 AM, Dmitry Torokhov
> > wrote:
> > > On Wed, Mar 22, 2017 at 04:36:46PM +0530, Jagan Teki wrote:
> > >> From: Jagan Teki
> > >>
> > >> A
On Tue, Mar 21, 2017 at 3:36 PM, Vignesh R wrote:
> Using dev_name() as irq name during request_irq() might be misleading in
> case of serial over PCI. Therefore identify serial port irqs using
> uart_port's name field. This will help mapping irqs to appropriate
> ttySN(where N is the serial port
The host may send multiple negotiation packets (due to timeout) before
the KVP user-mode daemon is connected. We need to defer processing
those packets until the daemon is negotiated and connected. It's okay
for guest to respond to all negotiation packets.
In addition, the host may send multipl
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