Am Mittwoch, 22. Februar 2017, 10:59:55 CET schrieb Elaine Zhang: > If pll is power down,when power up pll need wait pll lock. > The reference documents section: > PLL frequency change and lock check > > Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com>
applied to my clk-branch for 4.12 Thanks Heiko
