bot; Bill Huang; Paul Walmsley; Jim Lin; linux-
> c...@vger.kernel.org; linux-te...@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v5 19/21] clk: tegra: Add Super Gen5 Logic
>
> On Tue, May 12, 2015 at 10:24 AM, Rhyland Klein wrote:
> > From: Bill Huang
>
On Tue, May 12, 2015 at 10:24 AM, Rhyland Klein wrote:
> From: Bill Huang
>
> Super clock divider control and clock source mux of Tegra210 has changed
> a little against prior SoCs, this patch adds Gen5 logic to address those
> differences.
>
> Signed-off-by: Bill Huang
> ---
> v2:
> - Fixed s
On Tue, May 12, 2015 at 10:24 AM, Rhyland Klein wrote:
> From: Bill Huang
>
> Super clock divider control and clock source mux of Tegra210 has changed
> a little against prior SoCs, this patch adds Gen5 logic to address those
> differences.
>
> Signed-off-by: Bill Huang
It looks like Mikko's an
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