On Tue, 2013-06-25 at 18:53 -0700, Darren Hart wrote:
> The MinnowBoard uses an AR803x PHY with the PCH GBE.
>
> It does not implement the RGMII 2ns TX clock delay in the trace routing
> nor via strapping. Add a detection method for the board and the PHY and
> enable the tx clock delay via the reg
The same subsystem (not subdevice!) ID is used for all devices on the
Minnowboard itself.
Bjorn Helgaas wrote:
>On Tue, Jun 25, 2013 at 7:53 PM, Darren Hart
>wrote:
>> The MinnowBoard uses an AR803x PHY with the PCH GBE.
>>
>> It does not implement the RGMII 2ns TX clock delay in the trace
>ro
On Tue, 2013-06-25 at 20:35 -0600, Bjorn Helgaas wrote:
> On Tue, Jun 25, 2013 at 7:53 PM, Darren Hart wrote:
> > static DEFINE_PCI_DEVICE_TABLE(pch_gbe_pcidev_id) = {
> > {.vendor = PCI_VENDOR_ID_INTEL,
> > .device = PCI_DEVICE_ID_INTEL_IOH1_GBE,
> > +.subvendor = PCI_V
On Tue, Jun 25, 2013 at 7:53 PM, Darren Hart wrote:
> The MinnowBoard uses an AR803x PHY with the PCH GBE.
>
> It does not implement the RGMII 2ns TX clock delay in the trace routing
> nor via strapping. Add a detection method for the board and the PHY and
> enable the tx clock delay via the regis
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