On 11/21/14, 21:48, "Marc Zyngier" wrote:
>On 21/11/14 14:40, Suthikulpanit, Suravee wrote:
>>
>>
>> On 11/21/14, 19:57, "Marc Zyngier" wrote:
>>
+ gic: interrupt-controller@e1101000 {
+ compatible = "arm,gic-400", "arm,cortex-a15-gic";
+ interrupt-controll
On 21/11/14 14:40, Suthikulpanit, Suravee wrote:
>
>
> On 11/21/14, 19:57, "Marc Zyngier" wrote:
>
>>> + gic: interrupt-controller@e1101000 {
>>> + compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>> + interrupt-controller;
>>> + #interrupt-cells = <3>;
>>> +
On 11/21/14, 19:57, "Marc Zyngier" wrote:
>>+ gic: interrupt-controller@e1101000 {
>>+ compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>+ interrupt-controller;
>>+ #interrupt-cells = <3>;
>>+ #address-cells = <2>;
>>+ #size-cell
Hi Suravee,
On 28/10/14 13:36, suravee.suthikulpa...@amd.com wrote:
> From: Suravee Suthikulpanit
>
> Initial revision of device tree for AMD Seattle platform
>
> Cc: Mark Rutland
> Cc: Will Deacon
> Cc: Catalin Marinas
> Signed-off-by: Suravee Suthikulpanit
> Signed-off-by: Thomas Lendacky
On Friday 21 November 2014 01:12:45 Suthikulpanit, Suravee wrote:
> On 11/13/14 18:29, Arnd Bergmann wrote:
> > On Tuesday 28 October 2014 08:36:54 suravee.suthikulpa...@amd.com wrote:
> >> From: Suravee Suthikulpanit
> >>
> >> Initial revision of device tree for AMD Seattle platform
> >
> > Sorry
On 11/13/14 18:29, Arnd Bergmann wrote:
> On Tuesday 28 October 2014 08:36:54 suravee.suthikulpa...@amd.com wrote:
>> From: Suravee Suthikulpanit
>>
>> Initial revision of device tree for AMD Seattle platform
>
> Sorry for not looking at this earlier in enough detail.
>
>> +dma0: dma@050 {
On Thursday 20 November 2014 09:16:31 Rob Herring wrote:
>
> >> + dma-coherent;
> >> + };
> >
> > Same here: you list it as coherent, but not 64-bit DMA capable.
> > Is that intentional?
>
> AHCI controllers are probeable as to whether they support 64-bit DMA or not.
>
The contr
On Thu, Nov 13, 2014 at 5:29 AM, Arnd Bergmann wrote:
> On Tuesday 28 October 2014 08:36:54 suravee.suthikulpa...@amd.com wrote:
>> From: Suravee Suthikulpanit
>>
>> Initial revision of device tree for AMD Seattle platform
>
> Sorry for not looking at this earlier in enough detail.
>
>> + dma
On Thursday 13 November 2014, Catalin Marinas wrote:
> On Tue, Nov 11, 2014 at 01:24:39AM +, Suravee Suthikulpanit wrote:
> > Are there any other concerns about this patch?
>
> Let's cc the arm-soc guys, they are now handling SoC code for arm64.
Any update on the submission? I had some commen
On Tuesday 28 October 2014 08:36:54 suravee.suthikulpa...@amd.com wrote:
> From: Suravee Suthikulpanit
>
> Initial revision of device tree for AMD Seattle platform
Sorry for not looking at this earlier in enough detail.
> + dma0: dma@050 {
> + compatible = "arm,pl330", "arm,
On Tue, Nov 11, 2014 at 01:24:39AM +, Suravee Suthikulpanit wrote:
> Are there any other concerns about this patch?
Let's cc the arm-soc guys, they are now handling SoC code for arm64.
> On 10/28/14 20:36, suravee.suthikulpa...@amd.com wrote:
> > From: Suravee Suthikulpanit
> >
> > Initial r
Ping.
Are there any other concerns about this patch?
Thanks,
Suravee
On 10/28/14 20:36, suravee.suthikulpa...@amd.com wrote:
From: Suravee Suthikulpanit
Initial revision of device tree for AMD Seattle platform
Cc: Mark Rutland
Cc: Will Deacon
Cc: Catalin Marinas
Signed-off-by: Suravee S
From: Suravee Suthikulpanit
Initial revision of device tree for AMD Seattle platform
Cc: Mark Rutland
Cc: Will Deacon
Cc: Catalin Marinas
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Thomas Lendacky
Signed-off-by: Joel Schopp
---
Change in V3:
* Change sata compatible-id to
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