Hi Stefan,
wt., 13 kwi 2021 o 11:56 Stefan Chulski napisał(a):
>
> > > -Original Message-
> > > From: Russell King - ARM Linux admin
> > > Sent: Tuesday, April 13, 2021 12:18 PM
> > > To: Stefan Chulski
> > > Cc: net...@vger.kernel.org; thomas.petazz...@bootlin.com;
> > > da...@davemlof
rnative scheme.
>
> Please see the below for more.
>
> On Thu, Mar 25, 2021 at 4:45 PM Marcin Wojtas wrote:
>
> > So what we have after 4 years:
> > * Direct convincing of IP vendors still being a plan.
>
> Things need to improve here. I've *expressed* as much to
Hi,
czw., 25 mar 2021 o 14:19 Lorenzo Pieralisi
napisał(a):
>
> On Tue, Jan 26, 2021 at 10:53:51PM +, Will Deacon wrote:
> > On Tue, Jan 26, 2021 at 11:08:31AM -0600, Vikram Sethi wrote:
> > > On 1/22/2021 1:48 PM, Will Deacon wrote:
> > > > On Fri, Jan 08, 2021 at 10:32:16AM +, Lorenzo
the problem
with backward compatibility by restoring a previous compatible
string as secondary one.
Signed-off-by: Marcin Wojtas
---
arch/arm64/boot/dts/marvell/armada-ap807.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap807.dtsi
b
_port_config(port);
>
> - if (mvpp22_rss_is_supported())
> + if (mvpp22_rss_is_supported(port))
> mvpp22_port_rss_init(port);
>
> /* Provide an initial Rx packet size */
> @@ -6861,7 +6864,7 @@ static int mvpp2_port_probe(struct platform_device
> *pdev,
> dev->hw_features |= features | NETIF_F_RXCSUM | NETIF_F_GRO |
> NETIF_F_HW_VLAN_CTAG_FILTER;
>
> - if (mvpp22_rss_is_supported()) {
> + if (mvpp22_rss_is_supported(port)) {
> dev->hw_features |= NETIF_F_RXHASH;
> dev->features |= NETIF_F_NTUPLE;
> }
> --
> 1.9.1
>
Reviewed-by: Marcin Wojtas
Thanks!
add PPv23 version definition.
> > > PPv23 is new packet processor in CP115.
> > > Everything that supported by PPv22, also supported by PPv23.
> > > No functional changes in this stage.
> > >
> > > Signed-off-by: Stefan Chulski
> > > Acked-b
Hi,
czw., 11 lut 2021 o 15:19 Andrew Lunn napisał(a):
>
> On Thu, Feb 11, 2021 at 08:22:19AM +, Stefan Chulski wrote:
> >
> > >
> > > --
> > > From:
> > > Date: Wed, 10 Feb 2021 11:48:17 +0200
> > >
> > > >
> > > > +static i
śr., 10 lut 2021 o 14:16 napisał(a):
>
> From: Stefan Chulski
>
> This patch enables eth0 10G interface on CN9130-DB paltforms and
> eth0 10G and eth3 10G interfaces on CN9131-DB.
Thank you.
Reviewed-by: Marcin Wojtas
>
> Signed-off-by: Stefan Chulski
> Signed-off-b
ot/dts/marvell/cn9130-db.dtsi
> @@ -125,7 +125,7 @@
>
> /* SLM-1521-V2, CON9 */
> &cp0_eth0 {
> - status = "disabled";
> + status = "okay";
> phy-mode = "10gbase-kr";
> /* Generic PHY, providing serdes lanes */
>
flow control
> net: mvpp2: set 802.3x GoP Flow Control mode
> net: mvpp2: add TX FC firmware check
>
> Documentation/devicetree/bindings/net/marvell-pp2.txt | 6 +-
> arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 2 +-
> drivers/net/ethernet/marvell/mvpp2/mvpp2.h| 124 -
> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 526
> ++--
> 4 files changed, 609 insertions(+), 49 deletions(-)
>
For the series:
Acked-by: Marcin Wojtas
Thanks,
Marcin
Hi,
pon., 8 lut 2021 o 09:33 napisał(a):
>
> From: Stefan Chulski
>
> This patch add PPv23 version definition.
> PPv23 is new packet processor in CP115.
> Everything that supported by PPv22, also supported by PPv23.
> No functional changes in this stage.
>
> Signed-off-by: Stefan Chulski
> ---
Hi,
pon., 8 lut 2021 o 09:33 napisał(a):
>
> From: Stefan Chulski
>
> This patch adds CM3 memory map and CM3 read/write callbacks.
The read/write callbacks are not added in this patch, please correct
the commit message.
Best regards,
Marcin
>
> Signed-off-by: Stefan Chulski
> Reviewed-by: An
Hi Kosta,
śr., 3 lut 2021 o 14:32 napisał(a):
>
> From: Stefan Chulski
>
> Enavble PCIe dma coherence for A3700 platform
>
While at it, can we also add:
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -71,6 +71,7 @@ soc {
Hi Kosta,
Let me chime in.
śr., 3 lut 2021 o 17:57 Kostya Porotchkin napisał(a):
>
> Hello, Russell,
> I agree that this patch needs rework.
> I will definitely do it and issue a new version.
>
> > On Wed, Feb 03, 2021 at 02:50:45PM +, Kostya Porotchkin wrote:
> > > [KP] So for older systems
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> This patch adds RXQ flow control configurations.
> Flow control disabled by default.
> Minimum ring size limited to 1024 descriptors.
>
> Signed-off-by: Stefan Chulski
> ---
> drivers/net/ethernet/marvell/mvpp2/mvpp2.h |
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> Feature double size of BPPI by decreasing number of pools from 16 to 8.
How about:
'The PP2v23 hardware supports a feature allowing to double the size of...' ?
> Increasing of BPPI size protect BM drop from BPPI underrun.
> U
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> New FIFO flow control feature were added in PPv23.
s/were/was/
Thanks,
Marcin
> PPv2 FIFO polled by HW and trigger pause frame if FIFO
> fill level is below threshold.
> FIFO HW flow control enabled with CM3 RXQ&BM flow
> c
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> Armada hardware has a pause generation mechanism in GOP (MAC).
> The GOP generate flow control frames based on an indication programmed in
> Ports Control 0 Register. There is a bit per port.
> However assertion of the PortX
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> This patch add PPv23 version definition.
> PPv23 is new packet processor in CP115.
> Everything that supported by PPv22, also supported by PPv23.
> No functional changes in this stage.
>
> Signed-off-by: Stefan Chulski
> ---
>
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> The firmware needs to monitor the RX Non-occupied descriptor
> bits for flow control to move to XOFF mode.
> These bits need to be unmasked to be functional, but they will
> not raise interrupts as we leave the RX exception sum
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> Currently we have PP2v1 and PP2v2 hw-versions, with some different
> handlers depending upon condition hw_version = MVPP21/MVPP22.
> In a future there will be also PP2v3. Let's use now the generic
> "if equal/notEqual MVPP21" f
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Konstantin Porotchkin
>
> CM3 SRAM address space would be used for Flow Control configuration.
>
> Signed-off-by: Stefan Chulski
> Signed-off-by: Konstantin Porotchkin
> ---
> arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++
> 1
czw., 28 sty 2021 o 17:43 Russell King - ARM Linux admin
napisał(a):
>
> On Wed, Jan 27, 2021 at 01:43:16PM +0200, stef...@marvell.com wrote:
> > Armada hardware has a pause generation mechanism in GOP (MAC).
> > The GOP generate flow control frames based on an indication programmed in
> > Ports
t(mask, Autoneg);
> phylink_set_port_modes(mask);
> - phylink_set(mask, Pause);
> - phylink_set(mask, Asym_Pause);
>
> switch (state->interface) {
> case PHY_INTERFACE_MODE_10GBASER:
> --
> 1.9.1
>
Acked-by: Marcin Wojtas
Thanks!
TXDONE_COAL_USEC;
>
> port->txqs = devm_kcalloc(dev, port->ntxqs, sizeof(*port->txqs),
> --
I confirm the patch fixes issue - tested on CN913x-DB and RGMII port.
Other boards there I see no regression.
Acked-by: Marcin Wojtas
Thanks,
Marcin
GMII;
> else if (port->gop_id == 3)
> - val &= ~GENCONF_CTRL0_PORT1_RGMII_MII;
> + val &= ~GENCONF_CTRL0_PORT3_RGMII_MII;
> regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val);
> }
> }
> --
I tested the patch and LGTM.
Acked-by: Marcin Wojtas
Thanks,
Marcin
czw., 17 gru 2020 o 15:09 Andrew Lunn napisał(a):
>
> > Do you think it's a fix that should be backported to stable branches?
> > If yes, please add 'Fixes: ("commit title")' and it may be
> > good to add 'Cc: sta...@vger.kernel.org' adjacent to the Signed-off-by
> > tag.
>
> netdev patches shoul
Hi Stefan,
czw., 17 gru 2020 o 10:42 napisał(a):
>
> From: Stefan Chulski
>
> Force link UP can be enabled by bootloader during tftpboot
> and breaks NFS support.
> Force link UP disabled during port init procedure.
>
> Signed-off-by: Stefan Chulski
> ---
What are the updates against v1? Pleas
wt., 15 gru 2020 o 09:04 Adrian Hunter napisał(a):
>
> On 11/12/20 4:16 pm, Marcin Wojtas wrote:
> > From: Alex Leibovich
> >
> > Automatic Clock Gating is a feature used for the power
> > consumption optimisation. It turned out that
> > during early init pha
Since its creation Marvell NIC driver for Armada 375/7k8k and
CN913x SoC families mvpp2 has been lacking an entry in MAINTAINERS,
which sometimes lead to unhandled bugs that persisted
across several kernel releases.
Signed-off-by: Marcin Wojtas
---
MAINTAINERS | 8
1 file changed, 8
pt., 11 gru 2020 o 16:42 Russell King - ARM Linux admin
napisał(a):
>
> On Fri, Dec 11, 2020 at 03:41:47PM +0100, Marcin Wojtas wrote:
> > Since its creation Marvell NIC driver for Armada 375/7k8k and
> > CN913x SoC families mvpp2 has been lacking an entry in MAINTAINERS,
> &
Since its creation Marvell NIC driver for Armada 375/7k8k and
CN913x SoC families mvpp2 has been lacking an entry in MAINTAINERS,
which sometimes lead to unhandled bugs that persisted
across several kernel releases.
Signed-off-by: Marcin Wojtas
---
MAINTAINERS | 7 +++
1 file changed, 7
lator output did not became stable"
Fix the problem by disabling the ACG at very beginning
of the sdhci_init and let that be enabled later.
Fixes: 3a3748dba881 ("mmc: sdhci-xenon: Add Marvell Xenon SDHC core
functionality")
Signed-off-by: Alex Leibovich
Signed-off-by: Ma
pt., 11 gru 2020 o 14:47 Ulf Hansson napisał(a):
>
> On Fri, 4 Dec 2020 at 18:17, Marcin Wojtas wrote:
> >
> > Hi,
> >
> > The fourth version of the sdhci-xenon ACPI support
> > addresses a comment regarding clk handling in xenon_runtime_resume.
> >
>
As a preparation for supporting ACPI, modify the driver
to use the clk framework only when booting with DT -
otherwise rely on the configuration done by firmware.
For that purpose introduce also a custom SDHCI get_max_clock
callback.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci
pt., 4 gru 2020 o 14:51 Ulf Hansson napisał(a):
>
> On Wed, 2 Dec 2020 at 19:51, Marcin Wojtas wrote:
> >
> > As a preparation for supporting ACPI, modify the driver
> > to use the clk framework only when booting with DT -
> > otherwise rely on the configuration
Previous patches dropped the strict dependency on the OF_*
in the sdhci-xenon driver. As a result the ACPI support
can be introduced (except for the XENON_A3700 variant)
by adding the necessary ID's in the acpi_match_table.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-xenon.c
In order to support both ACPI and DT, modify the driver
to use device_* routines for obtaining the properties
values.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-xenon.h | 4 +--
drivers/mmc/host/sdhci-xenon-phy.c | 36 +++-
drivers/mmc/host/sdhci-xenon.c
As a part of the ACPI support preparation resign from checking
compatible strings in the driver. Instead of that use a new
enum and assign the values to match data accordingly.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-xenon.h | 8
drivers/mmc/host/sdhci-xenon-phy.c
ID's per controller
variant
Marcin Wojtas (4):
mmc: sdhci-xenon: use match data for controllers variants
mmc: sdhci-xenon: switch to device_* API
mmc: sdhci-xenon: use clk only with DT
mmc: sdhci-xenon: introduce ACPI support
drivers/mmc/host/sdhci-xenon.h | 12 ++-
drivers/mmc/hos
Previous patches dropped the strict dependency on the OF_*
in the sdhci-xenon driver. As a result the ACPI support
can be introduced (except for the XENON_A3700 variant)
by adding the necessary ID's in the acpi_match_table.
Signed-off-by: Marcin Wojtas
Acked-by: Adrian Hunter
---
driver
In order to support both ACPI and DT, modify the driver
to use device_* routines for obtaining the properties
values.
Signed-off-by: Marcin Wojtas
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci-xenon.h | 4 +--
drivers/mmc/host/sdhci-xenon-phy.c | 36 +++-
drivers/mmc
As a preparation for supporting ACPI, modify the driver
to use the clk framework only when booting with DT -
otherwise rely on the configuration done by firmware.
For that purpose introduce also a custom SDHCI get_max_clock
callback.
Signed-off-by: Marcin Wojtas
Acked-by: Adrian Hunter
all clk_disable_unprepare unconditionally.
* Add Adrian's Acked-by to all patches.
v1->v2
* Split single commit to 4
* Use device_match_data and dedicated ACPI ID's per controller
variant
Marcin Wojtas (4):
mmc: sdhci-xenon: use match data for controllers variants
mmc: sdhci-xenon: switch
As a part of the ACPI support preparation resign from checking
compatible strings in the driver. Instead of that use a new
enum and assign the values to match data accordingly.
Signed-off-by: Marcin Wojtas
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci-xenon.h | 8
drivers
śr., 2 gru 2020 o 09:30 Adrian Hunter napisał(a):
>
> On 20/11/20 5:26 am, Marcin Wojtas wrote:
> > Hi,
> >
> > The second version of the sdhci-xenon ACPI support
> > is now split into 4 patches instead of a single one.
> > There are minor functional differenc
Hi Ulf
wt., 24 lis 2020 o 12:31 Ulf Hansson napisał(a):
>
> On Fri, 20 Nov 2020 at 04:27, Marcin Wojtas wrote:
> >
> > As a preparation for supporting ACPI, modify the driver
> > to use the clk framework only when booting with DT -
> > otherwise rely on the
In order to support both ACPI and DT, modify the driver
to use device_* routines for obtaining the properties
values.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-xenon.h | 4 +--
drivers/mmc/host/sdhci-xenon-phy.c | 36 +++-
drivers/mmc/host/sdhci-xenon.c
Previous patches dropped the strict dependency on the OF_*
in the sdhci-xenon driver. As a result the ACPI support
can be introduced (except for the XENON_A3700 variant)
by adding the necessary ID's in the acpi_match_table.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-xenon.c
As a part of the ACPI support preparation resign from checking
compatible strings in the driver. Instead of that use a new
enum and assign the values to match data accordingly.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-xenon.h | 8
drivers/mmc/host/sdhci-xenon-phy.c
As a preparation for supporting ACPI, modify the driver
to use the clk framework only when booting with DT -
otherwise rely on the configuration done by firmware.
For that purpose introduce also a custom SDHCI get_max_clock
callback.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci
://drive.google.com/file/d/1Y8BhyaCrksQgT_GPfpqqiYHpQ41kP8Kp
Changelog:
v1->v2
* Split single commit to 4
* Use device_match_data and dedicated ACPI ID's per controller
variant
Marcin Wojtas (4):
mmc: sdhci-xenon: use match data for controllers variants
mmc: sdhci-xenon: switch to
Hi Adrian,
niedz., 15 lis 2020 o 21:43 Adrian Hunter napisał(a):
>
> On 14/11/20 11:08 am, Marcin Wojtas wrote:
> > This patch introduces an alternative way of obtaining resources - via
> > ACPI tables provided by firmware. In addition to the of_* -> device_
is firmware responsibility to enable them.
Signed-off-by: Marcin Wojtas
---
Hi,
In case anyone would like to test the patch, I share the EDK2
firmware for MacchiatoBin board, which has relevant ACPI
description https://drive.google.com/file/d/1ygdHGl30ww9LAqZAQlTsz2nnhN3Od9GG
Looking forward to y
k a bit earlier which simplifies errata handling
> > - use hi_lo_readq_relaxed() and hi_lo_writeq_relaxed() for register
> > accessors
> > - keep SMMU status disabled by default and enable where possible (DTS
> > changes)
> > - commit logs improvements and other minor
czw., 16 lip 2020 o 14:02 Will Deacon napisał(a):
>
> On Thu, Jul 16, 2020 at 01:00:43PM +0100, Will Deacon wrote:
> > On Wed, 15 Jul 2020 09:06:45 +0200, Tomasz Nowicki wrote:
> > > The series is meant to support SMMU for AP806 and a workaround
> > > for accessing ARM SMMU 64bit registers is the
Hi Tomasz,
pt., 3 lip 2020 o 11:33 Tomasz Nowicki napisał(a):
>
> On 03.07.2020 11:16, Robin Murphy wrote:
> > On 2020-07-02 21:16, Tomasz Nowicki wrote:
> >> From: Marcin Wojtas
> >>
> >> Add IOMMU node for Marvell AP806 based SoCs together with platfor
Hi Russell,
czw., 28 lut 2019 o 10:36 Russell King - ARM Linux admin
napisał(a):
>
> On Wed, Feb 27, 2019 at 06:47:32PM +0100, Marcin Wojtas wrote:
> > Current version of the driver was configuring XLG MAC
> > in a way to wait 3 IDLE frames before allowing for the
> >
ylink support")
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 16066c2..f1378f9 10
Hi Jisheng,
śr., 19 gru 2018 o 04:11 Jisheng Zhang napisał(a):
>
>
> On Mon, 17 Dec 2018 08:37:35 +0100 Thomas Petazzoni wrote:
>
> > Hello Marcin,
> >
> > On Mon, 17 Dec 2018 00:25:58 +0100, Marcin Wojtas wrote:
> >
> > > Thanks. Indeed, the patc
Hi David,
niedz., 16 gru 2018 o 21:41 David Miller napisał(a):
>
> From: Marcin Wojtas
> Date: Tue, 11 Dec 2018 13:56:49 +0100
>
> > Recent changes in the mvneta driver reworked allocation
> > and handling of the ingress buffers to use entire pages.
> > Apart from
Hi Jisheng,
śr., 12 gru 2018 o 10:25 Jisheng Zhang napisał(a):
>
> Hi Marcin,
>
> On Wed, 12 Dec 2018 09:22:57 +0100 Marcin Wojtas wrote:
>
> > Hi Jisheng,
> >
> > śr., 12 gru 2018 o 03:48 Jisheng Zhang
> > napisał(a):
> > >
> > >
Hi Jisheng,
śr., 12 gru 2018 o 03:48 Jisheng Zhang napisał(a):
>
> Hi,
>
> On Tue, 11 Dec 2018 13:56:49 +0100 Marcin Wojtas wrote:
>
> > Recent changes in the mvneta driver reworked allocation
> > and handling of the ingress buffers to use entire pages.
> > Apar
unused frag_size field of the mvneta_port
structure.
Fixes: 562e2f467e71 ("net: mvneta: Improve the buffer allocation
method for SWBM")
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvneta.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/d
Ard, Mikulas,
pon., 6 sie 2018 o 22:11 Ard Biesheuvel napisał(a):
>
> On 6 August 2018 at 21:54, Mikulas Patocka wrote:
> >
> >
> > On Mon, 6 Aug 2018, Ard Biesheuvel wrote:
> >
> >> On 6 August 2018 at 19:09, Mikulas Patocka wrote:
> >> >
> >> >
> >> > On Mon, 6 Aug 2018, Ard Biesheuvel wrote:
Hi Ard, Mikulas,
pon., 6 sie 2018 o 15:48 Ard Biesheuvel napisał(a):
>
> On 6 August 2018 at 15:41, Marcin Wojtas wrote:
> > Hi Mikulas,
> >
> > pon., 6 sie 2018 o 14:42 Robin Murphy napisał(a):
> >>
> >> On 06/08/18 11:25, Mikulas Patocka wrote:
&g
Hi Mikulas,
pon., 6 sie 2018 o 14:42 Robin Murphy napisał(a):
>
> On 06/08/18 11:25, Mikulas Patocka wrote:
> [...]
> >> None of this explains why some transactions fail to make it across
> >> entirely. The overlapping writes in question write the same data to
> >> the memory locations that are c
Hi Rafael,
2018-01-24 3:08 GMT+01:00 Rafael J. Wysocki :
> On Tue, Jan 23, 2018 at 7:12 AM, Marcin Wojtas wrote:
>> Hi Rafael,
>>
>>> > if (res)
>>> > return res;
>>> >
>>> > - return device
Hi Rafael,
> > if (res)
> > return res;
> >
> > - return device_get_mac_addr(dev, "address", addr, alen);
> > + return fwnode_get_mac_addr(fwnode, "address", addr, alen);
> > +}
> > +EXPORT_SYMBOL(fwnode_get_mac_address);
>
> That should be EXPORT_SYMBOL_GPL().
2018-01-22 16:57 GMT+01:00 David Miller :
> From: Andrew Lunn
> Date: Mon, 22 Jan 2018 15:43:42 +0100
>
>> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>>> From: Marcin Wojtas
>>> Date: Mon, 22 Jan 2018 14:00:37 +0100
>>>
>>> &g
2018-01-22 15:43 GMT+01:00 Andrew Lunn :
> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>> From: Marcin Wojtas
>> Date: Mon, 22 Jan 2018 14:00:37 +0100
>>
>> > There's a discussion about the ACPI vs generic MDIO/PHY change under
>> >
> I tested the series on a MacchiatoBin to ensure the mvpp2 DT support was
> still working. I was able to use all supported ports as before, and saw
> no issue.
>
> For all mvpp2 patches, you can add:
>
> Tested-by: Antoine Tenart
>
> Thanks!
> Antoine
>
> On Thu,
Hi Mika,
2018-01-18 14:00 GMT+01:00 Andrew Lunn :
>> I CC'ed Mika since he is more familiar with handling these bits of ACPI
>> specs - I wonder whether this is a problem that cropped up on x86
>> systems too.
>
> Hi Lorenzo
>
> There is nothing about MDIO, PHYs, Ethernet switches, etc in version
duplication.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a
lable fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 1d6c9d9..613ba82 1
- Update driver with new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojta
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
nodes
comprising their own _CRS methods with interrupts description.
In order to be able o satisfy compilation with !CONFIG_ACPI
and also simplify the new code, introduce a helper macro
(ACPI_HANDLE_FWNODE), with which it is possible to reach
an ACPI handle directly from its fwnode.
Signed-off-by: Marcin W
-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drivers/net/ethernet/marvell
eased, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/drivers/net/ethernet/ma
Hi Andrew,
2018-01-17 19:11 GMT+01:00 Andrew Lunn :
> On Wed, Jan 17, 2018 at 05:55:39PM +0100, Marcin Wojtas wrote:
>> Hi,
>>
>> This is a third version of the patchset introducing mvpp2 driver ability
>> to operate with ACPI. Until follow-up generic MDIO is introduc
duplication.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
nodes
associated to kernel's struct platform_device.
This patch introduces new helper routine - fwnode_irq_get(),
which allows to get the IRQ number directly from the fwnode
to be used as common for OF/ACPI worlds.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c
-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drivers/net/ethernet/marvell
eased, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/drivers/net/ethernet/ma
iver with new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojtas (7):
device pro
lable fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index adb3893..2343906 1
2018-01-09 11:19 GMT+01:00 Graeme Gregory :
> On Mon, Jan 08, 2018 at 06:17:06PM +0100, Marcin Wojtas wrote:
>> Hi Andrew,
>>
>>
>>
>> 2018-01-08 16:42 GMT+01:00 Andrew Lunn :
>> > w> I am not familiar with MDIO, but if its similar or a specific
>>
Hi Andrew,
2018-01-08 16:42 GMT+01:00 Andrew Lunn :
> w> I am not familiar with MDIO, but if its similar or a specific
>> implementation of a serial bus that does sound sane!
>
Thanks for digging, I will check if and how we can use
GenericSerialBus with MDIO.
Best regards,
Marcin
> It is a tw
Russell,
2018-01-03 18:54 GMT+01:00 Russell King - ARM Linux :
> On Wed, Jan 03, 2018 at 05:00:47PM +, Stefan Chulski wrote:
>> > > > -Original Message-
>> > > > Hi Russell,
>> > > >
>> > > > Indeed. RGMII MAC behaves same way, although it shouldn't be named
>> > > > as 'in- band' to b
2018-01-03 14:33 GMT+01:00 Andrew Lunn :
> On Wed, Jan 03, 2018 at 02:13:09PM +0100, Marcin Wojtas wrote:
>> Hi Andrew,
>>
>> 2018-01-03 13:47 GMT+01:00 Andrew Lunn :
>> >> I already agreed with 'reg' being awkward in the later emails.
>> >> W
Hi Andrew,
2018-01-03 13:47 GMT+01:00 Andrew Lunn :
>> I already agreed with 'reg' being awkward in the later emails.
>> Wouldn't _ADR be more appropriate to specify PHY address on MDIO bus?
>
> Also, how do you specify which MDIO bus the PHY is on. To fully
> specify a PHY, you need both bits of
Graeme,
2018-01-03 12:16 GMT+01:00 :
> On Sun, Dec 31, 2017 at 08:23:54PM +0100, Andrew Lunn wrote:
>> > * Modify way of obtaining interrupts - with ACPI they are resources
>> > bound to struct platform_device and it's not possible to obtain
>> > them directly from the child node. Hence a for
Hi Graeme,
2018-01-03 12:00 GMT+01:00 Graeme Gregory :
> On Mon, Dec 18, 2017 at 10:40:31AM +0100, Ard Biesheuvel wrote:
>> On 18 December 2017 at 10:17, Marcin Wojtas wrote:
>> > Hi,
>> >
>> > This patchset introduces ACPI support in mvpp2 and mvmdio drivers
2018-01-02 15:08 GMT+01:00 Andrew Lunn :
>> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is more
>> a discussion for a MDIO bus / ACPI patchset, but we either find a way
>> to use IRQs with ACPI obtained from child nodes or for this world the
>> functionality will be limited (at le
Hi Andrew,
2018-01-02 14:33 GMT+01:00 Andrew Lunn :
>> Apart from the phylink's SFP support that may require in-band
>> management, it's an alternative to the normal PHY handling. Once MDIO
>> bus + PHYs are supported for ACPI, phylib support will be used instead
>> of the IRQs, so there should be
Hi Russell,
2017-12-30 18:31 GMT+01:00 Russell King - ARM Linux :
> Hi Marcin,
>
> On Sat, Dec 30, 2017 at 05:34:23PM +0100, Marcin Wojtas wrote:
>> Yes, I already split the series and will send first one right away. I
>> will be followed by MDIO bus / PHY handling proposal,
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