Signed-off-by: Axel Lin
---
drivers/regulator/wm831x-dcdc.c | 39 -
1 file changed, 9 insertions(+), 30 deletions(-)
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c
index 5a5bc4bb08d2..4a573eea284a 100644
--- a/drivers/regulator/wm83
On January 19, 2019 2:36:06 AM PST, Greg KH wrote:
>On Sat, Jan 19, 2019 at 02:28:00AM -0800, Christoph Hellwig wrote:
>> This seems like a pretty horrible idea and waste of kernel memory.
>
>It's only a waste if you want it to be a waste, i.e. if you load the
>kernel module.
>
>This really isn't
Hi Pavel,
On 19/01/2019 23.46, Pavel Machek wrote:
Hi!
Moreover, I think that RGB LED class with configurable
brightness-model, and with possible color range adjustments via
icc-profiles or something similar, is the best solution that has been
proposed so far. It is just flexible.
I'd like to
Hi Dan,
On 18/01/2019 15.58, Dan Murphy wrote:
Jacek
On 1/18/19 7:45 AM, Dan Murphy wrote:
Jacek
On 1/17/19 3:10 PM, Jacek Anaszewski wrote:
Hi Dan,
On 1/16/19 7:41 PM, Dan Murphy wrote:
Hello
On 1/16/19 4:55 AM, Pavel Machek wrote:
Hi!
On 1/15/19 4:22 PM, Pavel Machek wrote:
Hi!
+T
The SDM845 MTP has a WCN3990 Bluetooth chip on UART6, enable this.
Pinconf and the associated comments are copied from a patch by
Matthias Kaehlcke .
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Fixed the pinconf
arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 53 +
On 15-01-19, 15:14, Anders Roxell wrote:
> On Mon, 14 Jan 2019 at 22:24, Fabio Estevam wrote:
> >
> > Hi Anders,
> >
> > On Thu, Jan 10, 2019 at 9:15 AM Anders Roxell
> > wrote:
> > >
> > > The warning got introduced by commit 930507c18304 ("arm64: add basic
> > > Kconfig symbols for i.MX8"). Si
On 10-01-19, 18:33, Long Cheng wrote:
> On Fri, 2019-01-04 at 22:49 +0530, Vinod Koul wrote:
> > On 02-01-19, 10:12, Long Cheng wrote:
> > > In DMA engine framework, add 8250 uart dma to support MediaTek uart.
> > > If MediaTek uart enabled(SERIAL_8250_MT6577), and want to improve
> > > the perform
On 09-01-19, 08:44, Gustavo A. R. Silva wrote:
> One of the more common cases of allocation size calculations is finding the
> size of a structure that has a zero-sized array at the end, along with memory
> for some number of elements for that array. For example:
>
> struct foo {
> int stuff;
On 08-01-19, 09:58, Gustavo A. R. Silva wrote:
> One of the more common cases of allocation size calculations is finding the
> size of a structure that has a zero-sized array at the end, along with memory
> for some number of elements for that array. For example:
>
> struct foo {
> int stuff;
On 07-01-19, 11:06, Gustavo A. R. Silva wrote:
> One of the more common cases of allocation size calculations is finding
> the size of a structure that has a zero-sized array at the end, along
> with memory for some number of elements for that array. For example:
>
> struct foo {
> int stuff;
On 07-01-19, 09:32, Shunyong Yang wrote:
> In async_tx_test_ack(), it uses flags in struct dma_async_tx_descriptor
> to check the ACK status. As hidma reuses the descriptor in a free list
> when hidma_prep_dma_*(memcpy/memset) is called, the flag will keep ACKed
> if the descriptor has been used be
On Sun, Jan 20, 2019 at 5:03 PM Florian La Roche
wrote:
>
> The real bug is that we compute 1 to 64 for bit 0 to bit 63, whereas
> the algorithm expects 0 to 63 for the value of m.
Florian, you seem to be in denial.
__fls() returns 0-63. Your patch is *wrong* for the __fls() use,
because when yo
Hello all,
my comment said ffs(), but the code only uses fls() and that's what I meant.
Am So., 20. Jan. 2019 um 04:49 Uhr schrieb Linus Torvalds
:
> But yes, our current int_sqrt64() does seem buggy as-is, because it's
> *supposed* to work on u64's, even if I don't think we really have any
> us
Hi Arnd,
Commits
e6f8f282d174 ("timex: use __kernel_timex internally")
683569ef2b4f ("time: Add struct __kernel_timex")
are missing a Signed-off-by from their committers.
--
Cheers,
Stephen Rothwell
pgpoUl34mjRnX.pgp
Description: OpenPGP digital signature
Hi all,
In commit
25f2d0e7791e ("net/mlx5e: Fix cb_ident duplicate in indirect block register")
Fixes tag
Fixes: f5bc2c5de101 ("net/mlx5e: Support TC indirect block notifications
has these problem(s):
- Subject has leading but no trailing parentheses
- Subject has leading but no trail
The pull request you sent on Sun, 20 Jan 2019 00:04:22 +:
> git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b0f3e768a89bbc72195023c3db1db45c40e5b70c
Thank you!
--
Deet-doot-dot, I am a
Checking of kmalloc() seems to have been committed - as
cx23885_dvb_register() is checking for != 0 return, returning
-ENOMEM should be fine here. While at it address the coccicheck
suggestion to move to kmemdup rather than using kmalloc+memcpy.
Signed-off-by: Nicholas Mc Guire
Fixes: 46b21bbaa8
I, Mikhail Fridman have selected you specifically as one of my
beneficiaries for my Charitable Donation of $5 Million Dollars,
Check the link below for confirmation:
https://www.rt.com/business/343781-mikhail-fridman-will-charity/
I await your earliest response for further directives.
Best
On Sun, Jan 20, 2019 at 12:01 PM Will Deacon wrote:
>
> > @@ -52,7 +52,7 @@ u32 int_sqrt64(u64 x)
> > if (x <= ULONG_MAX)
> > return int_sqrt((unsigned long) x);
> >
> > - m = 1ULL << (fls64(x) & ~1ULL);
> > + m = 1ULL << ((fls64(x) - 1) & ~1ULL);
>
> This just looks li
On Sun, Jan 20, 2019 at 12:04 PM Will Deacon wrote:
>
> The kernel.org servers wouldn't talk to me from NZ (the keys appeared to
> have changed), so I ended up pushing via the UK which seems to have worked.
> Please shout if anything looks weird.
Everything looks fine.
Thanks,
Lin
Peter, will this fix be sent to linux.git shortly?
syzbot is generating many corrupted reports due to this race.
On 2019/01/14 22:36, Peter Zijlstra wrote:
> On Thu, Jan 10, 2019 at 11:21:13AM +0100, Dmitry Vyukov wrote:
>> On Thu, Jan 10, 2019 at 5:04 AM Waiman Long wrote:
>>>
>>> Tetsuo Handa h
Move the PAGE_OWNER option from submenu "Compile-time checks and compiler
options" to dedicated submenu "Memory Debugging".
Signed-off-by: Changbin Du
---
lib/Kconfig.debug | 17 -
mm/Kconfig.debug | 17 +
2 files changed, 17 insertions(+), 17 deletions(-)
diff
I, Mikhail Fridman have selected you specifically as one of my
beneficiaries for my Charitable Donation of $5 Million Dollars,
Check the link below for confirmation:
https://www.rt.com/business/343781-mikhail-fridman-will-charity/
I await your earliest response for further directives.
Best
On 2019/01/20 3:56, Dmitry Vyukov wrote:
>> Seems easy enough to fix without resorting to __mutex_owner() (untested):
>>
>>
>> diff --git a/drivers/block/loop.c b/drivers/block/loop.c
>> index 264abaaff662..cee258d12a1e 100644
>> --- a/drivers/block/loop.c
>> +++ b/drivers/block/loop.c
>> @@ -1300,
On the imx8mq I get NULL pointer de-deference errors if the device
isn't passed in during allocation.
Signed-off-by: Angus Ainslie (Purism)
---
drivers/dma/imx-sdma.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sd
Add the sdma nodes to the base devicetree for the imx8mq
Signed-off-by: Angus Ainslie (Purism)
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.
based on NXP commit MLK-16841-1
Signed-off-by: Angus Ainslie (Purism)
---
.../devicetree/bindings/dma/fsl-imx-sdma.txt |
Add sdma support for the imx8mq
Changes since V1
Fixed to build against v5.0-rc2
Angus Ainslie (Purism) (3):
dma: imx-sdma: fix NULL pointer de-reference
dma: imx-sdma: add clock ratio 1:1 check
imx8mq.dtsi: add the sdma nodes
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 1 +
arch/ar
On Thu, Jan 17, 2019 at 09:57:17AM +0800, Kassey wrote:
> hi, Will
> it is hard to try on v5.0-rc2 kernel, since there is much port
> job to be done.
> dst kernel buffer is looks overwriten by some same(fix) patter
> start with "mmap"(0x6d6d7061) see below code (data from vmalloc),
On the imx8mq I get NULL pointer de-deference errors if the device
isn't passed in during allocation.
Signed-off-by: Angus Ainslie (Purism)
---
drivers/dma/imx-sdma.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sd
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.
based on NXP commit MLK-16841-1
Signed-off-by: Angus Ainslie (Purism)
---
.../devicetree/bindings/dma/fsl-imx-sdma.txt |
Add the sdma nodes to the base devicetree for the imx8mq
Signed-off-by: Angus Ainslie (Purism)
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx
Add sdma support for the imx8mq
Angus Ainslie (Purism) (3):
dma: imx-sdma: fix NULL pointer de-reference
dma: imx-sdma: add clock ratio 1:1 check
imx8mq.dtsi: add the sdma nodes
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +-
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 ++
On 2019/01/20 4:00, Dmitry Vyukov wrote:
> "On Sun, Oct 21, 2018 at 7:15 PM syzbot
> wrote:
>>
>> Hello,
>>
>> syzbot found the following crash on:
>>
>> HEAD commit:8c60c36d0b8c Add linux-next specific files for 20181019
>> git tree: linux-next
>> console output: https://syzkaller.appsp
On Fri, Jan 18, 2019 at 2:58 AM Ard Biesheuvel
wrote:
>
> A couple of fixes to permit newer versions of GCC to use the stack
> protector plugin for ARM.
>
> Ard Biesheuvel (2):
> gcc-plugins: arm_ssp_per_task_plugin: sign extend the SP mask
> gcc-plugins: arm_ssp_per_task_plugin: fix for GCC 9
On 2019/01/20 4:03, Dmitry Vyukov wrote:
> On Sun, Apr 29, 2018 at 7:03 PM syzbot
> wrote:
>>
>> Hello,
>>
>> syzbot hit the following crash on upstream commit
>> bf8f5de17442bba5f811e7e724980730e079ee11 (Sat Apr 28 17:05:04 2018 +)
>> MAINTAINERS: add myself as maintainer of AFFS
>> syzbot da
Commit 14f4eaeddabc ("media: dvbsky: fix driver unregister logic") fixed
a use-after-free by removing the reference to the frontend after deleting
the backing i2c device.
This has the unfortunate side effect the frontend device is never freed
in the dvb core leaving a dangling device, leading to e
The kmalloc is called with | __GFP_NOFAIL so there is no point in
checking the return value - it either returns valid storage or it would
hang/terminate there. But it is not possible to say if the use of
__GFP_NOFAIL is really needed and the check should be removed or
vice-versa (use of __GFP_NOF
On 1/19/19 4:28 PM, Fred Klassen wrote:
Some IPMI modules (e.g. ibmpex_msg_handler()) will have ipmi_usr_hdlr
handlers that call ipmi_free_recv_msg() directly. This will essentially
kfree(msg), leading to use-after-free.
This does not happen in the ipmi_devintf module, which will queue the
messa
On Sat, Jan 19, 2019 at 11:14:18AM -0500, Joel Fernandes (Google) wrote:
> When there are no callbacks pending on an idle system, I noticed that
> RCU softirq is continuously firing. During this the cpu_no_qs is set to
> false, and core_needs_qs is set to true indefinitely. This causes
> rcu_proces
On Fri, Jan 18, 2019 at 4:12 PM Tycho Andersen wrote:
>
> Hi all,
>
> Here are the fixes I previously mentioned I would send. I previously
> assumed that the tests were mostly run as root, but it turns out
> everything else besides the stuff I wrote in the seccomp tests either
> sets NNP and doesn
On Tue, Jan 15, 2019 at 6:01 PM Alan Tull wrote:
>
> The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA
> since it can be used on other platforms such as Stratix10.
>
> Signed-off-by: Alan Tull
Reviewed-by: Moritz Fischer
> ---
> v2: add depends on HAS_IOMEM
> v3: put both depende
From: "Michael S. Tsirkin"
Date: Thu, 17 Jan 2019 23:20:07 -0500
> Use napi_consume_skb() to get bulk free. Note that napi_consume_skb is
> safe to call in a non-napi context as long as the napi_budget flag is
> correct.
>
> Signed-off-by: Michael S. Tsirkin
Applied, thanks.
Hi Linus,
Please pull these three arm64 fixes for -rc3. We've plugged a couple of
nasty issues involving KASLR-enabled kernels, and removed a redundant
#define that was introduced as part of the KHWASAN fixes from akpm at -rc2.
The kernel.org servers wouldn't talk to me from NZ (the keys appeared
On Sat, Jan 19, 2019 at 04:14:50PM +0100, Florian La Roche wrote:
> If an input number x for int_sqrt() has the highest bit set, then
> __ffs(x) is 64. (1UL << 64) is an overflow and breaks the algorithm.
This is confusing, because the patch doesn't go near an __ffs().
> Just subtracting 1 is an
On Thu, Jan 17, 2019 at 02:57:18PM +0530, Vivek Gautam wrote:
> Adding a device tree option for arm smmu to enable non-cacheable
> memory for page tables.
> We already enable a smmu feature for coherent walk based on
> whether the smmu device is dma-coherent or not. Have an option
> to enable non-c
On Mon, Dec 10, 2018 at 09:15:03AM +0800, Nicolas Boichat wrote:
> IOMMUs using ARMv7 short-descriptor format require page tables
> (level 1 and 2) to be allocated within the first 4GB of RAM, even
> on 64-bit systems.
>
> For level 1/2 pages, ensure GFP_DMA32 is used if CONFIG_ZONE_DMA32
> is def
On Thu, Jan 17, 2019 at 06:39:53PM +, Alexandre Ghiti wrote:
> From: Alexandre Ghiti
>
> On systems without CMA or (MEMORY_ISOLATION && COMPACTION) activated but
> that support gigantic pages, boottime reserved gigantic pages can not be
> freed at all. This patchs simply enables the possibili
On Thu, Jan 03, 2019 at 09:10:22PM +0530, Firoz Khan wrote:
> This will be an automated scripts to provide easy support
> for add/modify/delete the system call entry by add in
> respective *.tbl file.
>
> System call table generation support for asm-generic is
> provide for arm64 architecture whi
On January 19, 2019 3:25:03 PM PST, Joel Fernandes
wrote:
>On Sat, Jan 19, 2019 at 12:43:35PM -0500, Daniel Colascione wrote:
>> On Sat, Jan 19, 2019 at 11:27 AM Joel Fernandes
> wrote:
>> >
>> > On Sat, Jan 19, 2019 at 09:25:32AM +0100, Greg KH wrote:
>> > > On Fri, Jan 18, 2019 at 05:55:43PM -0
On Sat, Jan 19, 2019 at 12:43:35PM -0500, Daniel Colascione wrote:
> On Sat, Jan 19, 2019 at 11:27 AM Joel Fernandes
> wrote:
> >
> > On Sat, Jan 19, 2019 at 09:25:32AM +0100, Greg KH wrote:
> > > On Fri, Jan 18, 2019 at 05:55:43PM -0500, Joel Fernandes wrote:
> > > > --- /dev/null
> > > > +++ b/
On Sat, Jan 19, 2019 at 9:43 PM Brian Masney wrote:
> This patch series adds hierarchical IRQ chip support to spmi-gpio so
> that device tree consumers can request an IRQ directly from the GPIO
> block rather than having to request an IRQ from the underlying PMIC.
>
> For more background informat
Hello
i hope you will be able to carry out the proposal smoothly as stated?
On Thu, Jan 10, 2019 at 3:39 PM Linus Walleij wrote:
> This config is updates to the latest structure of the
> Kconfig menus so we can apply DRM driver changes on top.
>
> Signed-off-by: Linus Walleij
BTW I haven't seen many SPEAr pull requests the recent times,
if you want I can send these to
Fix coding style issues
Signed-off-by: Antoine Robertson
---
drivers/tty/moxa.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/tty/moxa.c b/drivers/tty/moxa.c
index 3a1a5e0ee93f..9b6dcb4f7905 100644
--- a/drivers/tty/moxa.c
+++ b/drivers/tty/mox
Hi Pavel,
On 19/01/2019 23.46, Pavel Machek wrote:
Hi!
Moreover, I think that RGB LED class with configurable
brightness-model, and with possible color range adjustments via
icc-profiles or something similar, is the best solution that has been
proposed so far. It is just flexible.
I'd like to
The pull request you sent on Sat, 19 Jan 2019 19:18:34 +:
> ssh://g...@gitolite.kernel.org/pub/scm/linux/kernel/git/mips/linux.git
> tags/mips_fixes_5.0_2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/5d5c303ea095bdd3a2b073075920bf159457069a
Thank you!
--
Deet
The pull request you sent on Sat, 19 Jan 2019 10:43:42 -0600:
> git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
> tags/devicetree-fixes-for-5.0-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/6a0141a0966cfbd765bff065c3eb61b09a92318e
Thank you!
--
Deet
The pull request you sent on Sat, 19 Jan 2019 12:40:07 +0100:
> git://www.linux-watchdog.org/linux-watchdog.git
> tags/linux-watchdog-5.0-rc-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/f403d718ebde2059de848ae7548392dfb25a13ae
Thank you!
--
Deet-doot-dot, I
Hi Steve,
On Sat, Jan 19, 2019 at 7:19 PM Steve Longerbeam wrote:
>
> Add video capture support from the OV5642 to IPU CSI0 on
> the i.MX53 SMD.
>
> Signed-off-by: Steve Longerbeam
Looks good, thanks:
Reviewed-by: Fabio Estevam
Only one minor nit below that perhaps Shawn could adjust while a
Some IPMI modules (e.g. ibmpex_msg_handler()) will have ipmi_usr_hdlr
handlers that call ipmi_free_recv_msg() directly. This will essentially
kfree(msg), leading to use-after-free.
This does not happen in the ipmi_devintf module, which will queue the
message and run ipmi_free_recv_msg() later.
BU
Hi Steve,
On Sat, Jan 19, 2019 at 7:18 PM Steve Longerbeam wrote:
>
> Add video capture_subsystem device node, and include both CSI ports.
> Prepare for adding sensors by adding the parallel sensor anchor endpoints
> to the CSI ports.
>
> Signed-off-by: Steve Longerbeam
Looks good, thanks:
Rev
It aligns the italian translation with the latest changes:
ae67ee6c5e1d docs: fix Co-Developed-by docs
3fe5dbfef47e Documentation/process/coding-style.rst: don't use "extern" with
function prototypes
Signed-off-by: Federico Vaga
---
Documentation/translations/it_IT/process/coding-style.rst
This patch adds the Italian translation for the following documents
in Documentation/process:
- applying-patches
- submit-checklist
- submitting-drivers
- changes
- stable api nonsense
Signed-off-by: Federico Vaga
---
.../translations/it_IT/doc-guide/sphinx.rst | 2 +
.../it_IT/process/appl
On Sat, 2019-01-19 at 17:05 -0500, Antoine Robertson wrote:
> Fix coding style issues
[]
> diff --git a/drivers/tty/moxa.c b/drivers/tty/moxa.c
[]
> @@ -74,8 +74,7 @@ enum {
> MOXA_BOARD_CP204J,
> };
>
> -static char *moxa_brdname[] =
> -{
> +static char *moxa_brdname[] = {
If you're goin
Fix coding style issues
Signed-off-by: Antoine Robertson
---
drivers/tty/moxa.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/tty/moxa.c b/drivers/tty/moxa.c
index 3a1a5e0ee93f..8641f8ecf1d6 100644
--- a/drivers/tty/moxa.c
+++ b/drivers/tty/moxa
The pull request you sent on Fri, 18 Jan 2019 21:20:28 +:
> git://git.linux-nfs.org/projects/anna/linux-nfs.git tags/nfs-for-5.0-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b0efca46b57071e4c281034f04d2b56edf79843d
Thank you!
--
Deet-doot-dot, I am a bot.
ht
nft_counter_rest() has its first argument declared as
struct nft_counter_percpu_priv __percpu *priv
but this structure is not percpu (it only countains
a member 'counter' which is, correctly, a pointer to a
percpu struct nft_counter).
So, remove the '__percpu' from the argument's declarati
For the functions that add and remove the internal IPU subdevice
descriptors and links between them, rename them to make clear they
are the subdevs and links internal to the IPU. Also rename the
platform data structure for the internal IPU subdevices.
No functional changes.
Signed-off-by: Steve Lo
The second IPU internal sub-devices were being registered and links
to them created even when the second IPU is not present. This is wrong
for i.MX6 S/DL and i.MX53 which have only a single IPU.
Fixes: e130291212df5 ("[media] media: Add i.MX media core driver")
Signed-off-by: Steve Longerbeam
Cc
In imx_media_create_csi_of_links(), the 'struct v4l2_fwnode_link' must
be cleared for each endpoint iteration, otherwise if the remote port
has no "reg" property, link.remote_port will not be reset to zero.
This was discovered on the i.MX53 SMD board, since the OV5642 connects
directly to ipu1_csi0
On i.MX6, the nearest upstream entity to the CSI can only be the
CSI video muxes or the Synopsys DW MIPI CSI-2 receiver.
However the i.MX53 has no CSI video muxes or a MIPI CSI-2 receiver.
So allow for the nearest upstream entity to the CSI to be something
other than those.
Fixes: bf3cfaa712e5c (
Hi!
> >Moreover, I think that RGB LED class with configurable
> >brightness-model, and with possible color range adjustments via
> >icc-profiles or something similar, is the best solution that has been
> >proposed so far. It is just flexible.
> >
> >I'd like to capitalize on the ideas shared in th
Hi!
> >First, I think we want to decide if RGB LED should be presented as
> >3 LEDs or as 1 LED... and what to do with existing RGB leds being
> >presented as 3 LEDs.
> >
> >I don't think we want to support both RGB and HSV in the kernel. It is
> >math, and not a nice one.
> >
> >Yes, both have ad
Hi Joe,
On Sat, Jan 19, 2019 at 8:45 PM Joe Perches wrote:
>
> I suggest clang-format's ForEachMacros statement vector
> be expanded to support regexes ala
>
> ForEachMacros:
> - Regex:
> '\b(?:(?:[a-z0-9_]+_)?for_each(?:_[a-z_]+)|[a-z0-9_]+_for_each)\b'
Ah, yeah, of course. And it
Add video capture support from the OV5642 to IPU CSI0 on
the i.MX53 SMD.
Signed-off-by: Steve Longerbeam
---
arch/arm/boot/dts/imx53-smd.dts | 75 +
1 file changed, 75 insertions(+)
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
in
Add video capture_subsystem device node, and include both CSI ports.
Prepare for adding sensors by adding the parallel sensor anchor endpoints
to the CSI ports.
Signed-off-by: Steve Longerbeam
---
arch/arm/boot/dts/imx53.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch
I, Mikhail Fridman have selected you specifically as one of my
beneficiaries for my Charitable Donation of $5 Million Dollars,
Check the link below for confirmation:
https://www.rt.com/business/343781-mikhail-fridman-will-charity/
I await your earliest response for further directives.
Best
Hi Linus, please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm
tags/libnvdimm-fixes-5.0-rc3
...to receive a crash fix, a build warning fix, a miscellaneous small
cleanups.
In case anyone is looking for them, there was a regression caught by
testing that caused 2 patch
Add support for qcom,pm8005-gpio, qcom,pm8998-gpio, and
qcom,pmi8998-gpio. These three variants are already in use in some
arm64 dtsi files. Those boards work since the generic binding
qcom,spmi-gpio is also specified.
Signed-off-by: Brian Masney
Reviewed-by: Stephen Boyd
Reviewed-by: Bjorn Ande
This patch series adds hierarchical IRQ chip support to spmi-gpio so
that device tree consumers can request an IRQ directly from the GPIO
block rather than having to request an IRQ from the underlying PMIC.
For more background information, see the email thread with Linus
Walleij's excellent descri
spmi-gpio did not have any irqchip support so consumers of this in
device tree would need to call gpio[d]_to_irq() in order to get the
proper IRQ on the underlying PMIC. IRQ chips in device tree should
be usable from the start without the consumer having to make an
additional call to get the proper
qpnpint_irq_domain_map did not validate the IRQ type and this can cause
IRQs to not work as expected if an unsupported type (such as
IRQ_TYPE_NONE) is passed in. Now that spmi-gpio is a hierarchical IRQ
controller, and all device tree bindings have been updated, add
additional validation to the typ
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with
no issues.
S
Convert the spmi-pmic-arb IRQ code to use the version 2 IRQ interface
in order to support hierarchical IRQ chips. This is necessary so that
spmi-gpio can be setup as a hierarchical IRQ chip with pmic-arb as the
parent. IRQ chips in device tree should be usable from the start without
the consumer ha
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it. Code was tested on the LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney
Reviewed-by: Stephen Boyd
Reviewed-by: Bjorn Andersson
---
Change
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with
no issues.
S
Check to see if the hwirq is already associated with another virq on
this IRQ domain. If so, then disassociate it before associating the
hwirq with the new virq.
This is a temporary hack that is needed in order to not break git
bisect for existing boards. The next patch in this series converts
spm
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with
no issues.
S
Now that spmi-gpio is a proper hierarchical IRQ chip, and all in-tree
users of device tree have been updated, we can now drop the hack that
was introduced to disassociate the old Linux virq if a hwirq mapping
already exists. That patch was introduced to not break git bisect for
any existing boards.
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with
no issues.
S
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with
no issues.
S
Add support for the PMI8998 GPIO variant to the Qualcomm PMIC GPIO
binding document.
Signed-off-by: Brian Masney
Reviewed-by: Stephen Boyd
Reviewed-by: Bjorn Andersson
Reviewed-by: Rob Herring
---
Changes since v5:
- None
Changes since v4:
- None
Patch introduced in v4.
Documentation/dev
The probing of this driver calls platform_irq_count, which will
setup all of the IRQs that are configured in device tree. In
preparation for converting this driver to be a hierarchical IRQ
chip, hardcode the IRQ count based on the hardware type so that all
the IRQs are not configured immediately an
This adds the two new functions gpiochip_irq_domain_activate and
gpiochip_irq_domain_deactivate that can be used as the activate and
deactivate functions in the struct irq_domain_ops. This is for
situations where only gpiochip_{lock,unlock}_as_irq needs to be called.
SPMI and SSBI GPIO are two user
IR on A64 is nothing special and very similar to IR on A13 to the point
that same driver can be used.
Following patches just add necessary DT changes.
Best regards,
Jernej
Changes from v1:
- removed new dual compatible because IR peripheral is basically the
same as in A13
- removed DT binding
OrangePi Win board contains IR receiver. Enable it.
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
b/arch/arm64/boot/dts/allwinner/sun50
From: Igors Makejevs
IR peripheral is completely compatible with A13 one.
Signed-off-by: Igors Makejevs
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a
I gave up trying to reproduce the problem and test this patch with qemu;
can you guys (Michael and Xu (sorry if I mangled your name)) give this a
try?
I cc'd a few other people who have noticed this issue in the past, so just
FYI for them.
Bjorn
commit dd21b922db366ba069291b6fef2a8ce6768756a2
A
Len Brown has not been active in this part since around 2010. The recent
activity suggests that Thomas Gleixner and Jiang Lui were maintaining
this part of the kernel sources. Jiang Lui has not been active in the
kernel sources since beginning 2016. So, the maintainer's role seems to
be now with Th
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