On Fri, 12 Oct 2018, Bartlomiej Zolnierkiewicz wrote:
> On 10/11/2018 07:48 AM, Lee Jones wrote:
> > On Wed, 10 Oct 2018, Bartlomiej Zolnierkiewicz wrote:
> >
> >> 'default n' is the default value for any bool or tristate Kconfig
> >> setting so there is no need to write it explicitly.
> >>
> >> A
On (10/25/18 08:28), Heiko Carstens wrote:
[..]
> > int loglevel_save = console_loglevel;
> > - console_unblank();
> > - oops_in_progress = 0;
> > - /*
> > -* OK, the message is on the console. Now we call printk()
> > -* without oo
From: Mason Yang
Make sure we flag all 1.8V broken chips as not supporting this features.
Signed-off-by: Mason Yang
---
drivers/mtd/nand/raw/nand_macronix.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_macronix.c
b/drivers/mtd/nand/raw/nand_macronix.c
i
From: Mason Yang
Hi Boris,
I patched this for Macronix all 1.8V AC chips.
Thanks for your review.
best regards,
Mason
Mason Yang (1):
mtd: rawnand: Add All 1.8V AC chips have a broken
GET_FEATURES(TIMINGS)
drivers/mtd/nand/raw/nand_macronix.c | 7 +++
1 file changed, 7 insertions(+)
On paź 24, 2018 20:20, Nishad Kamdar wrote:
> Use the gpiod interface instead of the deprecated old non-descriptor
> interface.
>
> Signed-off-by: Nishad Kamdar
> ---
> Changes in v4:
> - Add spaces after { and before } in gpios[]
>initialization.
> - Check the correct pointer for error.
>
On 25/10/2018 08:16, Dan Carpenter wrote:
> The current check is a bit off in the case where "phys_addr + size"
> wraps to zero because then "last_addr" is set to ULONG_MAX which is >=
> phys_addr.
And -2 would be okay?
For 32-bit systems I believe ULONG_MAX is a perfectly valid physical
address.
On Wed, Oct 24, 2018 at 01:34:25PM +0900, Sergey Senozhatsky wrote:
> On (10/24/18 13:30), Sergey Senozhatsky wrote:
> From: Sergey Senozhatsky
> Subject: [PATCH] s390/fault: use wake_up_klogd() in bust_spinlocks()
...
> From the comment it seems that s390 wants to just poke klogd.
> There is wa
On 10/24/2018 07:28 PM, Michal Hocko wrote:
> On Wed 24-10-18 15:56:39, Michal Hocko wrote:
>> On Tue 23-10-18 18:31:59, Anshuman Khandual wrote:
>>> Architectures like arm64 have HugeTLB page sizes which are different than
>>> generic sizes at PMD, PUD, PGD level and implemented via contiguous
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 01aa9d518eae8a4d75cd3049defc6ed0b6d0a658
commit: ad5fc6bb72214615f300af1f4ed57f71bc3be510 gdrom: convert to blk-mq
date: 9 days ago
config: sh-dreamcast_defconfig (attached as .config)
compiler: sh4-linux-g
On 2018-10-25 11:46, Vivek Gautam wrote:
Hi Manu,
On 10/16/2018 12:52 PM, Manu Gautam wrote:
Fix HSTX_TRIM tuning logic which instead of using fused value
as HSTX_TRIM, incorrectly performs bitwise OR operation with
existing default value.
Fixes: ca04d9d3e1b1 ("phy: qcom-qusb2: New driver for
On Thu, 2018-10-25 at 09:05 +0300, Dan Carpenter wrote:
> On Wed, Oct 24, 2018 at 05:05:53PM +0200, Aleksa Zdravkovic wrote:
> > This patch fixes the checkpatch.pl warning:
[]
> > diff --git a/drivers/staging/axis-fifo/axis-fifo.c
> > b/drivers/staging/axis-fifo/axis-fifo.c
[]
> > @@ -482,10 +482,
The current check is a bit off in the case where "phys_addr + size"
wraps to zero because then "last_addr" is set to ULONG_MAX which is >=
phys_addr.
Signed-off-by: Dan Carpenter
---
arch/x86/mm/ioremap.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/mm/ioremap
On 2018-10-25 02:06, Doug Anderson wrote:
Hi,
On Wed, Oct 24, 2018 at 11:29 AM Vivek Gautam
wrote:
Thanks for the patch.
I am starting to think that the driver is heavily relying on the
resource indices to request
all these areas ioremapped. Is it a good way forward that driver and
the
dt bi
Add macro defines for ZynqMP DDR controller. These macros will be used
for ZynqMP ECC operations.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 168 +++
1 file changed, 168 insertions(+)
diff --git a/drivers/edac/synopsys_edac.c b/driver
Add ddrc memory controller node in dts. The size mentioned in dts is
0x3, because we need to access DDR_QOS INTR registers located at
0xFD090208 from this driver.
Signed-off-by: Manish Narani
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git
This patch series enhances the current EDAC driver to support different
platforms. This series adds support for ZynqMP DDRC controller in synopsys
EDAC driver. This series also adds Device tree properties and relevant
binding documentation.
Changes in v2:
- Moved checking of DDR_ECC_INTR_S
The function of_device_get_match_data() can return NULL in case of
error. Add error handling for the same in probe().
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
i
Add support for Error Injection for ZynqMP DDRC IP. For injecting
errors, the Row, Column, Bank, Bank Group and Rank bits positions are
determined via Address Map registers of Synopsys DDRC.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 420 +
Add EDAC ECC support for ZynqMP DDRC IP. The IP supports interrupts for
corrected and uncorrected errors. Add interrupt handlers for the same.
Signed-off-by: Manish Narani
---
drivers/edac/Kconfig | 2 +-
drivers/edac/synopsys_edac.c | 322 ---
2
Add information of ZynqMP DDRC which reports the single bit errors that
are corrected and the double bit errors that are detected.
Signed-off-by: Manish Narani
Reviewed-by: Rob Herring
---
.../bindings/memory-controllers/synopsys.txt | 27 ++
1 file changed, 22 inserti
On Wed, Oct 24, 2018 at 05:05:53PM +0200, Aleksa Zdravkovic wrote:
> This patch fixes the checkpatch.pl warning:
>
> WARNING: line over 80 characters
> + (write_timeout >= 0) ? msecs_to_jiffies(write_timeout)
> :
>
> Signed-off-by: Aleksa Zdravkovic
> ---
> drivers/staging
Hello my dear,
Did you receive my email message to you? Please, get back to me ASAP as the
matter is becoming late. Expecting your urgent response.
Sean.
Now that all the infrastructure is in place to support multiple required
OPPs, lets switch over to using it.
A new internal routine _set_required_opps() takes care of updating
performance state for all the required OPPs. With this the performance
state updates are supported even when the end devic
An earlier commit populated the OPP tables from the "required-opps"
property, this commit populates the individual OPPs. This is repeated
for each OPP in the OPP table and these populated OPPs will be used by
later commits.
Reviewed-by: Ulf Hansson
Signed-off-by: Viresh Kumar
---
drivers/opp/co
We need to handle genpd OPP tables differently, this is already the case
at one location and will be extended going forward. Add another field to
the OPP table to check if the table belongs to a genpd or not.
Reviewed-by: Ulf Hansson
Signed-off-by: Viresh Kumar
---
drivers/opp/of.c | 6 --
Multiple generic power domains for a consumer device are supported with
the help of virtual devices, which are created for each consumer device
- genpd pair. These are the device structures which are attached to the
power domain and are required by the OPP core to set the performance
state of the g
The OPP core currently stores the performance state in the consumer
device's OPP table, but that is going to change going forward and
performance state will rather be set directly in the genpd's OPP table.
For that we need to get the performance state for genpd's device
structure (genpd->dev) inst
The OPP core already has the performance state values for each of the
genpd's OPPs and there is no need to call the genpd callback again to
get the performance state for the case where the end device doesn't have
an OPP table and has the "required-opps" property directly in its node.
This commit r
This isn't used anymore, remove it.
Signed-off-by: Viresh Kumar
---
drivers/opp/of.c | 54 --
include/linux/pm_opp.h | 5
2 files changed, 59 deletions(-)
diff --git a/drivers/opp/of.c b/drivers/opp/of.c
index 0755ee307b1a..da31874c7fe9 100644
The current implementation works only for the case where a single
phandle is present in the "required-opps" property, while DT allows
multiple phandles to be present there.
This patch adds new infrastructure to parse all the phandles present in
"required-opps" property and save pointers of the req
Create a separate routine to take care of custom set_opp() handler
specific stuff.
Reviewed-by: Ulf Hansson
Signed-off-by: Viresh Kumar
---
drivers/opp/core.c | 67 +++---
1 file changed, 40 insertions(+), 27 deletions(-)
diff --git a/drivers/opp/core.c
There are several struct device instances that genpd core handles. The
most common one is the consumer device structure, which is named
(correctly) as "dev" within genpd core. The second one is the genpd's
device structure, referenced as genpd->dev. The third one is the virtual
device structures cr
Hello,
This series improves the OPP core (and a bit of genpd core as well) to
support multiple phandles in the "required-opps" property, which are
only used for multiple power-domains per device for now.
We still don't propagate the changes to master domains for the
sub-domains, but this patchset
Commit-ID: ace6485a03266cc3c198ce8e927a1ce0ce139699
Gitweb: https://git.kernel.org/tip/ace6485a03266cc3c198ce8e927a1ce0ce139699
Author: Fenghua Yu
AuthorDate: Wed, 24 Oct 2018 14:57:17 -0700
Committer: Ingo Molnar
CommitDate: Thu, 25 Oct 2018 07:42:48 +0200
x86/cpufeatures: Enumerate M
Commit-ID: 33823f4d63f7a010653d219800539409a78ef4be
Gitweb: https://git.kernel.org/tip/33823f4d63f7a010653d219800539409a78ef4be
Author: Fenghua Yu
AuthorDate: Wed, 24 Oct 2018 14:57:16 -0700
Committer: Ingo Molnar
CommitDate: Thu, 25 Oct 2018 07:42:48 +0200
x86/cpufeatures: Enumerate M
* Bjorn Helgaas wrote:
> From: Bjorn Helgaas
>
> arch/x86/kernel/early-quirks.c contains special PCI quirks that need to
> run even before the usual DECLARE_PCI_FIXUP_EARLY() quirks. These have
> typically been merged by the x86 maintainers, which is fine, but PCI folks
> should at least see
On 2018-10-23 11:43, Julia Lawall wrote:
On Tue, 23 Oct 2018, Michal Hocko wrote:
[Trimmed CC list + Julia - there is indeed no need to CC everybody
maintain a
file you are updating for the change like this]
On Tue 23-10-18 10:16:51, Arun Sudhilal wrote:
> On Mon, Oct 22, 2018 at 11:41 PM Mic
A week ago I upgraded to the latest Ubuntu distribution (Linux thunderbird
4.18.0-10-generic #11-Ubuntu SMP Thu Oct 11 15:13:55 UTC 2018 x86_64 x86_64
x86_64 GNU/Linux).
Whenever I run "shutdown -h now" or "reboot" I receive an immediate kernel
crash with a dump that has:
"Code: Bad RIP val
On (10/24/18 22:27), Rafael David Tinoco wrote:
> static unsigned long location_to_obj(struct page *page, unsigned int obj_idx)
> {
> - unsigned long obj;
> + unsigned long obj, pfn;
> +
> + pfn = page_to_pfn(page);
> +
> + if (unlikely(OBJ_OVERFLOW(pfn)))
> + BUG();
On Fri, Oct 5, 2018 at 7:59 PM Andy Gross wrote:
>
> On Tue, Oct 02, 2018 at 11:30:29AM +0200, Arnd Bergmann wrote:
> > On Sun, Sep 30, 2018 at 8:38 PM Andy Gross wrote:
> > >
> > > The following changes since commit
> > > 5b394b2ddf0347bef56e50c69a58773c94343ff3:
> > >
> > > Linux 4.19-rc1 (2
On Wed, 24 Oct 2018, Sven Van Asbroeck wrote:
> This patch adds devicetree binding documentation for the
> Arcx anybus bridge.
>
> Signed-off-by: Sven Van Asbroeck
> ---
> .../bindings/mfd/arcx,anybus-bridge.txt | 37 +++
> .../devicetree/bindings/vendor-prefixes.txt |
On 10/25/18 1:17 AM, Andrew Morton wrote:
> On Mon, 22 Oct 2018 15:27:54 +0200 Vlastimil Babka wrote:
>
>>> : Moreover the oriinal code allowed to trigger
>>> : WARN_ON_ONCE(policy->mode == MPOL_BIND && (gfp & __GFP_THISNODE));
>>> : in policy_node if the requested node (e.g. cpu local one) was
> On Oct 24, 2018, at 8:46 PM, NeilBrown wrote:
>
>> On Wed, Oct 24 2018, Theodore Y. Ts'o wrote:
>>
>>> On Wed, Oct 24, 2018 at 12:47:57PM +1100, NeilBrown wrote:
>>>
>>> I doubt it was copied - more likely independent evolution.
>>> But on reflection, I see that it is probably reasonable t
On Wed, Oct 24 2018, Theodore Y. Ts'o wrote:
> On Wed, Oct 24, 2018 at 12:47:57PM +1100, NeilBrown wrote:
>>
>> I doubt it was copied - more likely independent evolution.
>> But on reflection, I see that it is probably reasonable that it
>> shouldn't be used this way - or at all in this context.
From: Nickhu
There two bitfield bug for perfomance counter
in bitfield.h:
PFM_CTL_offSEL1 21 --> 16
PFM_CTL_offSEL2 27 --> 22
This commit fix it.
Signed-off-by: Nickhu
---
arch/nds32/include/asm/bitfield.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
From: Nickhu
The document for how to add NDS32 PMU
in devicetree.
Signed-off-by: Nickhu
Reviewed-by: Rob Herring
---
.../devicetree/bindings/perf/nds32v3-pmu.txt| 17 +
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/nds32v3-pmu.
From: Nickhu
This is the commit that porting the perf for nds32.
1.Raw event:
The raw events start with 'r'.
Usage:
perf stat -e rXYZ ./app
X: the index of performance counter.
YZ: the index(convert t
Hi, Michael,
Thanks a lot for the review and comments! Let us sync with Hyper-V team
to confirm these suspicious points.
BRs,
Sun Yi
On 18-10-24 16:53:00, Michael Kelley wrote:
> From: Yi Sun Sent: Friday, October 19, 2018 6:14
> AM
> >
> > The HvNotifyLongSpinWait hypercall (HVCALL_NOTIFY_L
These four commits are perf supporting for nds32.
There are three perfomance counters in nds32, and
each of them can counts different events. You can
use 'perf list' to show the available events that
can be used.
Changes in V2:
1. Change the definition 'PFM_CTL_xxx' to
array form.
From: Nickhu
The perf call-graph option can trace the callchain
between functions. This commit add the perf callchain
for nds32. There are kerenl callchain and user callchain.
The kerenl callchain can trace the function in kernel
space. There are two type for user callchain. One for the
'optimize
Hi Kirill,
Thanks for making this patchset. I have small concerns, please see the
inline comments.
On 10/24/18 at 03:51pm, Kirill A. Shutemov wrote:
> On 5-level paging LDT remap area is placed in the middle of
> KASLR randomization region and it can overlap with direct mapping,
> vmalloc or vmap
Oleg Nesterov wrote:
> On 10/22, Tetsuo Handa wrote:
> > > And again, I do not know how/if yama ensures that child is rcu-protected,
> > > perhaps
> > > task_is_descendant() needs to check pid_alive(child) right after
> > > rcu_read_lock() ?
> >
> > Since the caller (ptrace() path) called get_tas
On Thu, Oct 25, 2018 at 02:01:02AM +0300, Igor Stoppa wrote:
> > > @@ -1747,6 +1750,10 @@ void *__vmalloc_node_range(unsigned long size,
> > > unsigned long align,
> > > if (!addr)
> > > return NULL;
> > > + va = __find_vmap_area((unsigned long)addr);
> > > + for (i = 0
The function sdhci_allocate_bounce_buffer() always return zero at
present, so there's no need to have a return value, that will also make
error path easier.
CC: Linus Walleij
Signed-off-by: Chunyan Zhang
---
drivers/mmc/host/sdhci.c | 15 +--
1 file changed, 5 insertions(+), 10 dele
On Wed, Oct 24, 2018 at 05:09:05PM -0700, Florian Fainelli wrote:
> perf on ARM requires CONFIG_KUSER_HELPERS to be turned on to allow some
> independance with respect to the ARM CPU being used. Add a test which
> tries to locate the [vectors] page, created when CONFIG_KUSER_HELPERS is
> turned on
Hi Sebastian,
On 22 October 2018 at 15:43, Baolin Wang wrote:
> The internal resistance of a battery is not a constant in its life cycle,
> this varies over the age of the battery or temperature and so on. But we
> just want use one constant battery internal resistance to estimate the
> battery c
Hi Alexandre,
On 25 October 2018 at 08:34, Alexandre Belloni
wrote:
> Hello,
>
> On 18/10/2018 16:52:30+0800, Baolin Wang wrote:
>> When registering one RTC device, it will check to see if there is an
>> alarm already set in RTC hardware by reading RTC alarm, at this time
>> we should always read
structure svm_init_data is never used. So remove it.
Signed-off-by: Peng Hao
---
arch/x86/kvm/svm.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 61ccfb1..5c7dc8b 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -675,11 +675,6 @@
--
Dear Sir,
We are contacting your firm with a keen interest to consider a possible
collaboration through investments in viable projects globally. we are
an investment firm responsible for investing part of our client surplus
financial resources through a globally diversified investment strat
This patch adds the device tree bindings for the vibrator found on
various Qualcomm MSM SOCs.
Signed-off-by: Brian Masney
---
.../bindings/input/msm-vibrator.txt | 36 +++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/msm-v
This patch set adds support for the vibrator found on various Qualcomm
MSM SOCs. This is based on work from:
Jonathan Marek from qcom,pwm-vibrator.c in the PostmarketOS repo:
https://gitlab.com/postmarketOS/linux-postmarketos/commit/7647fb36cb1cbd060f8b52087a68ab93583292b5
Jongrak Kwon and Devin
On Wed, Oct 24, 2018 at 04:51:13PM +0200, Miroslav Lichvar wrote:
> On Tue, Oct 23, 2018 at 11:31:00AM -0700, John Stultz wrote:
> > On Fri, Oct 19, 2018 at 3:36 PM, John Stultz wrote:
> > > On Fri, Oct 19, 2018 at 1:50 PM, Thomas Gleixner
> > > wrote:
> > >> On Fri, 19 Oct 2018, John Stultz wro
This patch adds a new vibrator driver that supports various Qualcomm
MSM SOCs. Driver was tested on a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney
---
drivers/input/misc/Kconfig| 10 ++
drivers/input/misc/Makefile | 1 +
drivers/input/misc/msm-vibrator.c | 276
This patch adds device device tree bindings for the vibrator found on
the LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney
---
.../qcom-msm8974-lge-nexus5-hammerhead.dts| 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus
Since commit 02390b87a945 ("mm/zsmalloc: Prepare to variable
MAX_PHYSMEM_BITS"), an architecture has to define this value in order to
guarantee that zsmalloc will be able to encode and decode the obj value
properly.
Similar to that change, this one sets the value for ARM LPAE, fixing a
possible nu
On 32-bit systems, zsmalloc uses HIGHMEM and, when PAE is enabled, the
physical frame number might be so big that zsmalloc obj encoding (to
location) will break IF architecture does not re-define
MAX_PHYSMEM_BITS, causing:
[ 497.097843]
===
Daniel Jordan writes:
> On Wed, Oct 10, 2018 at 03:19:17PM +0800, Huang Ying wrote:
>> +static struct page *mc_handle_swap_pmd(struct vm_area_struct *vma,
>> +pmd_t pmd, swp_entry_t *entry)
>> +{
>
> Got
> /home/dbbench/linux/mm/memcontrol.c:4719:21: warning: ‘mc_handle_swap_p
Hi Rob,
On Thu, Oct 25, 2018 at 02:32:48AM +0800, Rob Herring wrote:
> On Wed, Oct 24, 2018 at 11:32:40AM +0800, Nickhu wrote:
> > The document for how to add NDS32 PMU
> > in devicetree.
> >
> > Signed-off-by: Nickhu
> > ---
> > Documentation/devicetree/bindings/nds32/pmu.txt | 17
Daniel Jordan writes:
> On Wed, Oct 10, 2018 at 03:19:09PM +0800, Huang Ying wrote:
>> +#ifdef CONFIG_THP_SWAP
>> +/*
>> + * The corresponding page table shouldn't be changed under us, that
>> + * is, the page table lock should be held.
>> + */
>> +int split_swap_cluster_map(swp_entry_t entry)
>>
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: 2018年10月24日 19:20
To: Joakim Zhang
Cc: Shawn Guo ; Sascha Hauer ;
Sascha Hauer ; Fabio Estevam ;
dl-linux-imx ; Rob Herring ; moderated
list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
; open list:OPEN FIRMWARE AND
On Wed, Oct 24, 2018 at 5:34 PM Peter Zijlstra wrote:
>
> On Wed, Oct 24, 2018 at 05:25:59PM -0700, Stephane Eranian wrote:
> > On Wed, Oct 24, 2018 at 5:23 PM Peter Zijlstra wrote:
>
> > > That is actually a different problem. And you're right, we never did fix
> > > that.
> > >
> > it is a diff
Daniel Jordan writes:
> On Wed, Oct 24, 2018 at 11:31:42AM +0800, Huang, Ying wrote:
>> Hi, Daniel,
>>
>> Daniel Jordan writes:
>>
>> > On Wed, Oct 10, 2018 at 03:19:03PM +0800, Huang Ying wrote:
>> >> And for all, Any comment is welcome!
>> >>
>> >> This patchset is based on the 2018-10-3 he
-Original Message-
From: Rob Herring [mailto:r...@kernel.org]
Sent: 2018年10月25日 7:57
To: Joakim Zhang
Cc: linux-...@vger.kernel.org; w...@grandegger.com; m...@pengutronix.de;
mark.rutl...@arm.com; devicet...@vger.kernel.org; linux-kernel@vger.kernel.org;
dl-linux-imx ; A.s. Dong
Subje
On Wed, Oct 24, 2018 at 08:11:15AM -0700, kan.li...@linux.intel.com wrote:
> +void perf_event_munmap(void)
> +{
> + struct perf_cpu_context *cpuctx;
> + unsigned long flags;
> + struct pmu *pmu;
> +
> + local_irq_save(flags);
It is impossible to get here with IRQs already disabled.
> > From: Chao Peng
> >
> > Intel Processor Trace virtualization can be work in one of 2 possible
> > modes:
> >
> > a. System-Wide mode (default):
> >When the host configures Intel PT to collect trace packets
> >of the entire system, it can leave the relevant VMX controls
> >clear to
Hello,
On 18/10/2018 16:52:30+0800, Baolin Wang wrote:
> When registering one RTC device, it will check to see if there is an
> alarm already set in RTC hardware by reading RTC alarm, at this time
> we should always read the normal alarm put in always-on region by
> checking the rtc->registered fl
On Wed, Oct 24, 2018 at 05:25:59PM -0700, Stephane Eranian wrote:
> On Wed, Oct 24, 2018 at 5:23 PM Peter Zijlstra wrote:
> > That is actually a different problem. And you're right, we never did fix
> > that.
> >
> it is a different problem but the solution is the same: PERF_RECORD_UNMAP!
But he
On Wed, Oct 24, 2018 at 11:28:54AM -0700, Andi Kleen wrote:
> > > void perf_event_mmap(struct vm_area_struct *vma)
> > > {
> > > struct perf_mmap_event mmap_event;
> > >
> > > if (!atomic_read(&nr_mmap_events))
> > > return;
> > >
> > > }
> > >
> >
> > Thanks.
On 10/23/18 2:34 PM, Igor Stoppa wrote:
> Wrappers around the basic write rare functionality, addressing several
> common data types found in the kernel, allowing to specify the new
> values through immediates, like constants and defines.
I have to wonder whether this is the right way, or whether
On 10/23/18 2:34 PM, Igor Stoppa wrote:
> +#define VM_PMALLOC 0x0100 /* pmalloc area - see docs */
> +#define VM_PMALLOC_WR0x0200 /* pmalloc write rare
> area */
> +#define VM_PMALLOC_PROTECTED 0x0400 /* pmalloc protected area */
Please introdu
On Wed, Oct 24, 2018 at 5:23 PM Peter Zijlstra wrote:
>
> On Wed, Oct 24, 2018 at 12:30:52PM -0700, Stephane Eranian wrote:
> > Hi,
> >
> > On Wed, Oct 24, 2018 at 8:12 AM wrote:
> > >
> > > From: Kan Liang
> > >
> > > To calculate the physical address, perf needs to walk the pages tables.
> > >
On 18/10/2018 16:52:25+0800, Baolin Wang wrote:
> This patch set fixes some issues when setting one RTC alarm.
>
> Baolin Wang (5):
> rtc: sc27xx: Set wakeup capability before registering rtc device
> rtc: sc27xx: Clear SPG value update interrupt status
> rtc: sc27xx: Remove interrupts disab
On Wed, Oct 24, 2018 at 04:00:02PM +0530, Srikar Dronamraju wrote:
> * Peter Zijlstra [2018-10-24 12:03:23]:
>
> > It appears to me the for_each_online_node() iteration in
> > task_numa_migrate() needs an addition test to see if the selected node
> > has any CPUs in the relevant sched_domain _at_
> +static __always_inline bool __is_wr_after_init(const void *ptr, size_t size)
> +{
> + size_t start = (size_t)&__start_wr_after_init;
> + size_t end = (size_t)&__end_wr_after_init;
> + size_t low = (size_t)ptr;
> + size_t high = (size_t)ptr + size;
> +
> + return likely(start
On Wed, Oct 24, 2018 at 12:30:52PM -0700, Stephane Eranian wrote:
> Hi,
>
> On Wed, Oct 24, 2018 at 8:12 AM wrote:
> >
> > From: Kan Liang
> >
> > To calculate the physical address, perf needs to walk the pages tables.
> > The related mapping may has already been removed from pages table in
> >
Some ->lookup() instances are still overcomplicating the life
for themselves, open-coding the stuff that would be handled by
d_splice_alias() just fine. Simplify a couple of such cases caught
this cycle and document d_splice_alias() intended use.
The following changes since commit 5b394b2
With ARM64 no longer providing a custom __early_init_dt_declare_initrd()
in its headers, and no other architecture doing something similar,
remove the check for __early_init_dt_declare_initrd being already
defined since we now have the one and only definition for it.
Signed-off-by: Florian Fainell
Now that drivers/of/fdt.c includes the proper implementation for ARM64,
we can get rid of our custom __early_init_dt_declare_initrd()
implementation.
Signed-off-by: Florian Fainelli
---
arch/arm64/include/asm/memory.h | 8
1 file changed, 8 deletions(-)
diff --git a/arch/arm64/include/
Hi all,
Based on Rob's suggestion, this is a follow-up to the patch series
posted here previously that aims at cutting the ARM64 rebuild
time/number of objects. Rob indicated that he was adamant to just having
drivers/of/fdt.c contain the ARM64 specific behavior, so this patch
series does exactly
ARM64 is the only architecture that requires a re-definition of
__early_init_dt_declare_initrd(), absorb its custom implemention in
drivers/of/fdt.c.
Suggested-by: Rob Herring
---
drivers/of/fdt.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index
On 10/24/18 5:09 PM, Florian Fainelli wrote:
> In preparation for checking that the vectors page on the ARM
> architecture, refactor the find_vdso_map() function to accept finding an
> arbitrary string and create a dedicated helper function for that under
> util/find-map.c and update find_vdso_map(
On Wed, Oct 24, 2018 at 12:35:03AM +0300, Igor Stoppa wrote:
> +static __always_inline
> +bool __pratomic_long_op(bool inc, struct pratomic_long_t *l)
> +{
> + struct page *page;
> + uintptr_t base;
> + uintptr_t offset;
> + unsigned long flags;
> + size_t size = sizeof(*l);
> +
Quoting Nicolin Chen :
The new hdev is a child device related to the original parent
hwmon driver and its device. However, it doesn't support the
power features, typically being defined in the parent driver.
So this patch inherits three necessary power properties from
the parent dev to hdev:
A bunch of compat_ioctl fixes, mostly in bluetooth.
Hopefully, most of fs/compat_ioctl.c will get killed off
over the next few cycles; between this, tty series already
merged and Arnd's work this cycle ought to take a good chunk
out of the damn thing...
One trivial conflict in fs/compat_io
In preparation for checking that the vectors page on the ARM
architecture, refactor the find_vdso_map() function to accept finding an
arbitrary string and create a dedicated helper function for that under
util/find-map.c and update find_vdso_map() to use it.
Signed-off-by: Florian Fainelli
---
t
perf on ARM requires CONFIG_KUSER_HELPERS to be turned on to allow some
independance with respect to the ARM CPU being used. Add a test which
tries to locate the [vectors] page, created when CONFIG_KUSER_HELPERS is
turned on to help asses the system's health.
Signed-off-by: Florian Fainelli
---
Hi all,
I just painfully learned that perf would segfault when
CONFIG_KUSER_HELPERS is disabled because it unconditionally makes use of
it. This patch series adds an ARM test for that by leveraging the
existing find_vdso_map() function and making it more generic and capable
of location any map wit
On 2018-10-24 6:43 p.m., Andrew Morton wrote:
I grabbed it, and added cc:stable.
But aren't we fixing this in the wrong place? That's a valid
expression and if this isn't addressed in perf then we may hit a
similar issue elsewhere...
Right.
Based on:
git://git.kernel.org/pub/scm/linux/
On Wed, Oct 24, 2018 at 10:24:54AM -0400, Sven Van Asbroeck wrote:
> This patch adds devicetree binding documentation for the
> Arcx anybus bridge.
>
> Signed-off-by: Sven Van Asbroeck
> ---
> .../bindings/mfd/arcx,anybus-bridge.txt | 37 +++
> .../devicetree/bindings/vendo
> > +static void pt_guest_enter(struct vcpu_vmx *vmx) {
> > + if (pt_mode == PT_MODE_SYSTEM)
> > + return;
> > +
> > + /* Save host state before VM entry */
> > + rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);
> > +
> > + /*
> > +* Set guest state of MSR_IA32_RTIT_CTL MSR (
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