On Wed, 24 Oct 2018, Sven Van Asbroeck wrote:
> This patch adds devicetree binding documentation for the
> Arcx anybus bridge.
>
> Signed-off-by: Sven Van Asbroeck <sven...@arcx.com>
> ---
> .../bindings/mfd/arcx,anybus-bridge.txt | 37 +++++++++++++++++++
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
> 2 files changed, 38 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/mfd/arcx,anybus-bridge.txt
>
> diff --git a/Documentation/devicetree/bindings/mfd/arcx,anybus-bridge.txt
> b/Documentation/devicetree/bindings/mfd/arcx,anybus-bridge.txt
> new file mode 100644
> index 000000000000..3c0399c4ed45
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/arcx,anybus-bridge.txt
> @@ -0,0 +1,37 @@
> +* Arcx anybus bridge
> +
> +This chip communicates with the SoC over the WEIM bus. It is
> +expected that its Device Tree node is specified as the child of a node
> +corresponding to the WEIM bus used for communication.
> +
> +Required properties:
> +
> + - compatible : The following chip-specific string:
> + "arcx,anybus-bridge"
> +
> + - reg :
> + weim memory area where the cpld registers are located, followed by:
> + weim memory area of the first anybus-s slot, followed by:
> + weim memory area of the second anybus-s slot.
> +
> + - enable-gpios : the gpio connected to the bridge's 'enable gpio'.
> +
> + - pwms : the pwm connected to the bridge's 'pwm input'.
> +
> + - irq-gpios : the gpios connected to the bridge's interrupt lines.
> + note that there is no need to provide the 'interrupts' property here.
> +
> +Example of usage:
> +
> +&weim {
> + bridge@0,0 {
I haven't seen this syntax before.
It doesn't mean it's wrong, but will needs Rob et. al to cast an eye.
> + compatible = "arcx,anybus-bridge";
> + reg = <0 0 0x100>, <0 0x400000 0x800>, <1 0x400000 0x800>;
> + fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
> + 0x00000000 0xa0000240 0x00000000>;
This needs to be documented.
> + enable-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
> + pwms = <&pwm3 0 571>;
> + irq-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>,
> + <&gpio1 5 GPIO_ACTIVE_HIGH>;
Tabbing.
> + };
> +};
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
> b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index 2c3fc512e746..1bf07b20a8af 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -35,6 +35,7 @@ aptina Aptina Imaging
> arasan Arasan Chip Systems
> archermind ArcherMind Technology (Nanjing) Co., Ltd.
> arctic Arctic Sand
> +arcx Arcx/Archronix Inc.
> aries Aries Embedded GmbH
> arm ARM Ltd.
> armadeus ARMadeus Systems SARL
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
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