On 9/29/14 9:52, Greg Kroah-Hartman wrote:
> On Wed, Sep 24, 2014 at 11:41:55AM -0400, Alan Stern wrote:
>> On Mon, 22 Sep 2014, Michal Simek wrote:
>>
>>> Alan: Can you please add this patch to your queue?
>>> Greg: If Alan is not maintaining this part of kernel, is this patch in your
>>> queue?
Tanya,
On Mon, Sep 29, 2014 at 07:46:34AM +0300, Tanya Brokhman wrote:
> Hi Jeremiah,
>
> On 9/28/2014 9:13 PM, Jeremiah Mahler wrote:
> >Tanya,
> >
> >On Sun, Sep 28, 2014 at 09:37:00AM +0300, Tanya Brokhman wrote:
> >>The need for performing read disturb is determined according to new
> >>stati
Hi Mark,
thanks for your comments. Now it looks to me, that i try to reinvent the
wheel.
I'm searching for a good regulator implementation example.
Does it apply to ti-abb-regulator.c and twl-regulator.c?
Am 28.09.2014 um 12:16 schrieb Mark Brown:
> On Sat, Sep 27, 2014 at 12:59:48AM +, Ste
Hi, this is David Wu from Shanghai, China.
We are a printing company, we can print color box, corrugated box,
label, hang tag etc.
Please let me know if you need these.
I will send you the website then.
Best regards,
David Wu
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Hi Beniamino,
You have my Acked-by or Signbed-off-by on this one.
I believe this goes via the mfd tree.
Kind regards,
Wim.
> This adds a driver for the watchdog timer available in Ricoh RN5T618
> PMIC. The device supports a programmable expiration time of 1, 8, 32
> or 128 seconds.
>
> Signed-o
There are two SPI controllers exported by PCI subsystem for Intel Quark X1000.
The SPI memory mapped I/O registers supported by Quark are different from
the current implementation, and Quark only supports the registers of 'SSCR0',
'SSCR1', 'SSSR', 'SSDR', and 'DDS_RATE'. This patch is to enable the
Introduce helper functions to access the 'SSCR0' and 'SSCR1'.
Signed-off-by: Weike Chen
---
drivers/spi/spi-pxa2xx.c | 108 --
1 file changed, 85 insertions(+), 23 deletions(-)
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index 25
Hi,
Intel Quark X1000 consists of two SPI controllers which can be PCI enumerated.
SPI-PXA2XX PCI layer doesn't support it. Thus, we add support for Intel Quark
X1000 SPI as well.
---
v2:
Split into two patches: one is for helper functions,
and another is for quark supporting.
[PATCH 1/2]
* A
On Thursday 25 September 2014 12:30 PM, Heikki Krogerus wrote:
> Assume you have 2 phys in your system..
> static struct phy_lookup usb_lookup = {
> .phy_name = "phy-usb.0",
> .dev_id = "usb.0",
> .con_id = "usb",
>>>
Now that we have completely moved from older USB-PHY drivers
to newer GENERIC-PHY drivers for PHYs available with USB controllers
on Exynos series of SoCs, we can remove the support for the same
in our host drivers too.
We also defer the probe for our host in case we end up getting
EPROBE_DEFER er
On Mon, Sep 29, 2014 at 7:21 AM, Greg KH wrote:
> On Thu, Sep 25, 2014 at 10:50:22AM +0530, Vivek Gautam wrote:
>> Hi Greg,
>>
>>
>> On Mon, Sep 22, 2014 at 11:15 AM, Vivek Gautam
>> wrote:
>> > Now that we have completely moved from older USB-PHY drivers
>> > to newer GENERIC-PHY drivers for PH
Hi Konrad,
We are glad to find that your patch increases the aim9 test
performance by up to +24.6%!
e0fc17a936334c08b2729fff87168c03fdecf5b6 ("xen/spinlock: Don't enable them
unconditionally.")
test case: brickland3/aim9/5s-all
brickland3 is an Ivy Bridge-EX with 512G memory.
c0914e61660fa7d
On Sun, Sep 28, 2014 at 12:14:56PM +0100, Mike Roocroft wrote:
> Fixed a coding style issue
>
> Signed-off-by: Mike Roocroft
> ---
> drivers/staging/android/sw_sync.c | 2 ++
> 1 file changed, 2 insertions(+)
This patch was done already by someone else, please always use the
latest version of m
On Fri, Sep 26, 2014 at 12:08:22AM +0100, Mike Roocroft wrote:
> Signed-off-by: Mike Roocroft
What coding style issues?
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On Thu, Sep 25, 2014 at 10:50:22AM +0530, Vivek Gautam wrote:
> Hi Greg,
>
>
> On Mon, Sep 22, 2014 at 11:15 AM, Vivek Gautam
> wrote:
> > Now that we have completely moved from older USB-PHY drivers
> > to newer GENERIC-PHY drivers for PHYs available with USB controllers
> > on Exynos series o
On Wed, Sep 24, 2014 at 11:41:55AM -0400, Alan Stern wrote:
> On Mon, 22 Sep 2014, Michal Simek wrote:
>
> > Hi Alan and Greg,
> >
> > On 09/20/2014 06:19 AM, Chen Gang wrote:
> > > Hello Maintainers:
> > >
> > > Please help check this patch, when you have time.
> > >
> > > Thanks.
> > >
> > >
Hi Mark,
Am 28.09.2014 um 12:22 schrieb Mark Brown:
> On Sat, Sep 27, 2014 at 12:59:47AM +, Stefan Wahren wrote:
>> This patch adds the Device tree bindings for the Freescale MXS
>> on-chip regulators.
> Use subject lines matching the style for the subsystem.
sorry i'm not sure what's wrong w
On Sun, Sep 28, 2014 at 08:44:47PM +0200, Fabian Frederick wrote:
> Adding parentheses around expression to avoid:
> drivers/acpi/sbs.c:444:28: warning: dubious: !x & y
>
> Signed-off-by: Fabian Frederick
> ---
> drivers/acpi/sbs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> dif
On Fri, Sep 26, 2014 at 08:45:57AM -0600, Stephen Warren wrote:
> On 09/26/2014 01:11 AM, Thierry Reding wrote:
> >On Thu, Sep 04, 2014 at 09:06:48AM -0600, Stephen Warren wrote:
[...]
> >>Oh dear. It sounds like we need at least some form of clock driver for the
> >>platform then. I still don't th
Adds support for AmScope MU800 / ToupTek UCMOS08000KPB USB microscope camera.
Signed-off-by: John McMaster
---
drivers/media/usb/gspca/Kconfig | 10 +
drivers/media/usb/gspca/Makefile |2 +
drivers/media/usb/gspca/touptek.c | 829 +
3 files changed,
From: Pankaj Dubey
Exynos7 has a similar serial controller to that present in older Samsung
SoCs. To re-use the existing serial driver on Exynos7 we need to have
SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not
possible because these symbols are dependent on PLAT_SAMSUNG whic
On Thu, 25 Sep 2014, Cong Wang wrote:
> On Wed, Sep 24, 2014 at 9:59 PM, Vince Weaver
> wrote:
> > Now that just might mean the patch pushed the code around enough so my
> > test doesn't trigger, but there is hope that maybe this fixes things.
>
> I read this as it fixes your crash as well?
I
On 09/26/2014 06:36 PM, Chen Gang wrote:
When xenbus_switch_state() fails, it will call xenbus_switch_fatal()
internally, so need not return any status value, then use 'void' instead
of 'int' for xenbus_switch_state() and __xenbus_switch_state().
Also need be sure that all callers which check th
The unw_addr_space_t in libunwind represents an address space to be
used for stack unwinding. It doesn't need to be create/destory
everytime to unwind callchain (as in get_entries) and can have a same
lifetime as thread (unless exec called).
So move the address space construction/destruction logi
The libunwind provides two caching policy which are global and
per-thread. As perf unwinds callchains in a single thread, it'd
sufficient to use global caching.
This speeds up my perf report from 14s to 7s on a ~260MB data file.
Although the output sometimes contains a slight difference (~0.01% i
If CONFIG_XEN_DOM0 is enabled, the ehci-dbgp driver notifies Xen of
controller reset events via xen_dbgp_reset_prep() and
xen_dbgp_external_startup() (via calls to xen_dbgp_op().) Otherwise
defines them as no-ops to disable this logic.
The fusbh200 driver copies much of the dbgp code from ehci_d
Now that ehci-dbgp has its own header, use it rather than duplicating
the declarations, etc.
Signed-off-by: Chris Rorvick
---
drivers/usb/host/fusbh200.h | 40 ++--
1 file changed, 2 insertions(+), 38 deletions(-)
diff --git a/drivers/usb/host/fusbh200.h b/dr
If CONFIG_XEN_DOM0 is enabled, the ehci-dbgp driver notifies Xen of
controller reset events via xen_dbgp_reset_prep() and
xen_dbgp_external_startup() (via calls to xen_dbgp_op().) Otherwise
defines them as no-ops to disable this logic.
The fotg210 driver copies much of the dbgp code from ehci_de
The FUSBH200 debug port has a EHCI-compatible register layout so there
is no need to define a custom struct.
Signed-off-by: Chris Rorvick
---
drivers/usb/host/fusbh200.h | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/usb/host/fusbh200.h b/drivers/usb/ho
The FUSBH200 and FOTG210 controllers implement sufficiently EHCI-
compatible debug ports to leverage ehci-dbgp from their respective
drivers. Rather than including header, though,
they replicate the necessary declarations in their own headers. Move
the ehci-dbgp stuff into its own header as a fi
The fotg210_dbg_port struct is a copy of the ehci_dbg_port definition
in the header. Embedded in this definition are
a number of macros which came along for the ride. These macros are not
used in the fotg210 driver and will conflict those in the new
header.
Signed-off-by: Chris Rorvick
---
d
The fusbh200_dbg_port struct is a copy of the ehci_dbg_port definition
in the header. Embedded in this definition are
a number of macros which came along for the ride. These macros are not
used in the fusbh200 driver and will conflict those in the new
header.
Signed-off-by: Chris Rorvick
---
Specifying these attributes in both the prototype and the function
definition is unnecessary and could cause confusion or bugs if they are
inconsistent. As such, __init should only be specified at the function
definition.
Keith Owens suggested this as a janitorial task on LKML several years
ago:
The FUSBH200 debug port has a EHCI-compatible register layout so there
is no need to define a custom struct.
Signed-off-by: Chris Rorvick
---
drivers/usb/host/fotg210.h | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/usb/host/fotg210.h b/drivers/usb/host
Now that ehci-dbgp has its own header, use it rather than duplicating
the declarations, etc.
Signed-off-by: Chris Rorvick
---
drivers/usb/host/fotg210.h | 40 ++--
1 file changed, 2 insertions(+), 38 deletions(-)
diff --git a/drivers/usb/host/fotg210.h b/driv
Is there any interest in something like this?
Original:
The FUSBH200 and FOTG210 are not EHCI-compatible and require standalone
drivers. See discussion at:
http://comments.gmane.org/gmane.linux.usb.general/84169
But these controllers do implement an EHCI-compatible debug port and
therefore l
Hi Jeremiah,
On 9/28/2014 9:13 PM, Jeremiah Mahler wrote:
Tanya,
On Sun, Sep 28, 2014 at 09:37:00AM +0300, Tanya Brokhman wrote:
The need for performing read disturb is determined according to new
statistics collected per eraseblock:
- read counter: incremented at each read operation
Hi Ingo and Arnaldo,
On Wed, 24 Sep 2014 09:33:56 +0200, Ingo Molnar wrote:
> * Namhyung Kim wrote:
>> @@ -1062,8 +1063,26 @@ static int machine__process_kernel_mmap_event(struct
>> machine *machine,
>> * Should be there already, from the build-id table in
>> * the he
Addy,
On Sat, Sep 27, 2014 at 12:11 AM, Addy Ke wrote:
> From: Addy
>
> As show in I2C specification:
> - Standard-mode: the minimum HIGH period of the scl clock is 4.0us
> the minimum LOW period of the scl clock is 4.7us
> - Fast-mode: the minimum HIGH period of the scl clock i
We currently have register offset information only for BAM IPs with revision
1.4.0. We add register offset table entries for the legacy (v1.3.0) version
of BAM IPs found on SoCs like APQ8064 and MSM8960.
The register offset table pointers are stored in DT data corresponding to the
BAM IP version s
Add compatible string for BAM v1.3.0 in the DT bindings documentation. Mentioned
a few more SoCs which have BAM v1.4.0 in them.
Reviewed-by: Kumar Gala
Reviewed-by: Andy Gross
Signed-off-by: Archit Taneja
---
Update in v2: Added IPQ8064 to the v1.3.0 list
Documentation/devicetree/bindings/dma
The BAM DMA IP comes in different versions. The register offset layout varies
among these versions. The layouts depend on which generation/family of SoCs they
belong to.
The current SoCs(like 8084, 8074) have a layout where the Top level registers
come in the beginning of the address range, follow
On 09/26/2014 06:38 PM, Chen Gang wrote:
When failure occurs, after xenbus_dev_error(), need go to fail to let
upper caller know about it.
Signed-off-by: Chen Gang
---
drivers/xen/xen-scsiback.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/xen/xen-scsiback.c
>
> Kernel built with extcon and charger-manager.
>
> After connecting the USB cable sleeping function was called from atomic
> context:
> [ 63.328648] BUG: sleeping function called from invalid context at
> kernel/locking/mutex.c:586
[]
> [ 63.388743] Workqueue: events max14577_muic_irq_
Hi Frederic,
On Sat, 27 Sep 2014 16:29:13 +0200, Frederic Weisbecker wrote:
> Hi Namhyung,
>
> 2014-09-27 9:26 GMT+02:00 tip-bot for Namhyung Kim :
>> Commit-ID: f7f084f4d3c29b0f9877a32fc6e2feacd47695b9
>> Gitweb:
>> http://git.kernel.org/tip/f7f084f4d3c29b0f9877a32fc6e2feacd47695b9
>> Autho
After the packet is successfully sent, we should not touch the skb
as it may have been freed. This patch is based on the work done by
Long Li .
In this version of the patch I have fixed issues pointed out by David.
David, please queue this up for stable.
Signed-off-by: K. Y. Srinivasan
Tested-
On Fri, 26 Sep 2014 11:22:34 -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 24, 2014 at 11:45:40AM -0400, Waiman Long escreveu:
>> +/*
>> + * Find node with the matching name
>> + */
>> +while (*p) {
>> +struct dso *this = rb_entry(*p, struct dso, rb_node);
>> +
Hi Mark,
More review comments inline... (sorry for the delay)
On Fri, Sep 26, 2014 at 6:55 PM, Mark Yao wrote:
> From: Mark yao
>
> This patch adds the basic structure of a DRM Driver for Rockchip Socs.
>
> Signed-off-by: Mark Yao
> Signed-off-by: Daniel Kurtz
> Acked-by: Daniel Vetter
> Re
Hi Arnaldo and Waiman,
On Fri, 26 Sep 2014 11:06:25 -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 24, 2014 at 11:45:39AM -0400, Waiman Long escreveu:
>> This is a precursor patch to enable long name searching of DSOs
>> using the rbtree. In this patch, a new dsos structure is created
>> whi
> -Original Message-
> From: David Miller [mailto:da...@davemloft.net]
> Sent: Sunday, September 28, 2014 8:17 PM
> To: KY Srinivasan
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> de...@linuxdriverproject.org; o...@aepfle.de; a...@canonical.com;
> jasow...@redhat.com; sta.
Setting 'flags' to zero will be certainly a misleading way to avoid
warning of 'flags' may be used uninitialized. uninitialized_var is
a correct way because the warning is a false possitive.
Signed-off-by: Xiubo Li
---
mm/compaction.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
di
From: "K. Y. Srinivasan"
Date: Sun, 28 Sep 2014 19:49:51 -0700
> After the packet is successfully sent, we should not touch the skb as it may
> have been freed. This patch is based on the work done by
> Long Li .
>
> Signed-off-by: K. Y. Srinivasan
> Tested-by: Long Li
> Cc:
You hyperv guys
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On Sat, Sep 27, 2014 at 11:21 AM, Daniel Mack wrote:
> On 09/25/2014 07:24 AM, Matt Ranostay wrote:
>> cap1106 driver can support much more one device make the driver
>> generic for support of similiar parts.
>>
>> Signed-off-by: Matt Ranostay
>> ---
>> .../devicetree/bindings/input/cap1106.txt
If a user puts init=/whatever on the command line and /whatever
can't be run, then the kernel will try a few default options before
giving up. If init=/whatever came from a bootloader prompt, then
this is unexpected but probably harmless. On the other hand, if it
comes from a script (e.g. a tool
If a user puts init=/whatever on the command line and /whatever
can't be run, then the kernel will try a few default options before
giving up. If init=/whatever came from a bootloader prompt, then
this is unexpected but probably harmless. On the other hand, if it
comes from a script (e.g. a tool
Hi Jean,
On Fri, 26 Sep 2014 09:14:41 +0200, Jean Pihet wrote:
> Hi,
>
> On 26 September 2014 07:50, Namhyung Kim wrote:
>> Hi Jean,
>>
>> On Wed, 24 Sep 2014 15:45:57 +0200, Jean Pihet wrote:
>>> Hi!
>>>
>>> Here are the test results on ARMv7 for the 2 patches. The speedup is
>>> about x2.1 for
Hi Tong,
On Thu, 25 Sep 2014 22:53:22 -0700, Tong Shen wrote:
>> +/**
>> + * is_non_relocatable_dyn - check if ELF file is ET_DYN, but not
>> relocatable
>> + * @ehdr: ELF header of the ELF file
>> + * @shdr: a section header in the ELF file
>> + *
>> + * For ELF files
Quark X1000 lacks cpuid(4). It has cpuid(2) but returns no cache
descriptors we can work with i.e. cpuid(2) returns
eax=0x0001 ebx=0x ecx=0x edx=0x
Quark X1000 contains a 16k 4-way set associative unified L1 cache
with 256 sets
This patch emulates cpuid(4) in a similar
Quark X1000 lacks cpuid(4). It has cpuid(2) but returns no cache
descriptors we can work with i.e. cpuid(2) returns
eax=0x0001 ebx=0x ecx=0x edx=0x
Quark X1000 contains a 16k 4-way set associative unified L1 cache
with 256 sets
This patch emulates cpuid(4) in a similar
> -Original Message-
> From: Christoph Hellwig [mailto:h...@infradead.org]
> Sent: Thursday, September 25, 2014 6:47 AM
> To: KY Srinivasan
> Cc: h...@suse.de; linux-kernel@vger.kernel.org;
> de...@linuxdriverproject.org; oher...@suse.com;
> jbottom...@parallels.com; linux-s...@vger.kerne
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On 2014/9/28 19:21, Liviu Dudau wrote:
> On Sun, Sep 28, 2014 at 10:16:12AM +0800, Yijing Wang wrote:
>> What I would like to see is a way of creating the pci_host_bridge
>> structure outside
>> the pci_create_root_bus(). That would then allow us to pass this sort of
>> platform
>
After the packet is successfully sent, we should not touch the skb as it may
have been freed. This patch is based on the work done by
Long Li .
Signed-off-by: K. Y. Srinivasan
Tested-by: Long Li
Cc:
---
drivers/net/hyperv/netvsc_drv.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(
On Thu, 11 Sep 2014 22:36:16 +1000
Boris BREZILLON wrote:
>
> Well, I don't know about freescale specific tools, but at least I have
> an example with mtd_nandbiterrs module.
> This module is assuming it can write only the data part of a NAND page
> without modifying the OOB area (see [1]), which
On Tue, Sep 23, 2014 at 12:11:55PM +0200, Antoine Tenart wrote:
> Patches can also be found at:
> git://git.free-electrons.com:users/antoine-tenart/linux.git usb-phy
>
> The series applies on top of Sergei generic PHY support in HCD[1]
> and on top of Peter Chen's ci-for-usb-next branch[2].
>
> T
On Sun, Sep 28, 2014 at 10:51:38PM +0100, Al Viro wrote:
> Hmm... OK, dentry_cmp() is doing something similar to open-coded
> rcu_dereference(). prepend_name() does not, and I really wonder if
> that's correct...
>
> I'm afraid that the answer is "should've been more careful when switching
> d_p
> > - Remove mailing lists that no longer exist,
> > as the ml.linux-m32r.org subdomain no longer exists.
Sorry for the inconvenience, the mailing list service has been stopped.
> > - Removing Hirokazu Takata as maintainer
> > (last commit merged: Nov. 2009)
Acked-by: Hirokazu Takata
From:
On Wed, 10 Sep 2014, Isamu Mogi wrote:
> Virtual page number of R3000 in entryhi is 20 bit from MSB. But in
> dump_tlb(), the bit mask to read it from entryhi is 19 bit (0xe000).
> The patch fixes that to 0xf000.
>
> Signed-off-by: Isamu Mogi
Acked-by: Maciej W. Rozycki
It would be g
Suppose I have a TCP connection to a remote machine and have configured TCP
keep-alive and the new TCP_USER_TIMEOUT so that the connection should close
after a few minutes of not being able to contact the server.
Suppose further that I change my local IP address and then write to the TCP
connecti
On Mon, 29 Sep 2014 00:12:40 +0100
Al Viro wrote:
> On Sun, Sep 28, 2014 at 11:09:50PM +, Steven Stewart-Gallus wrote:
> > Hello,
> >
> > I can't seem to get inotify to work with special files such as
> > /proc//task//children? I just need to get a simple yes/no
> > answer on whether it work
Dear Mark,
On 09/05/2014 07:49 AM, Mark Brown wrote:
> On Mon, Aug 18, 2014 at 03:27:02PM +0900, Chanwoo Choi wrote:
>
>> +suspend_uV = of_get_property(suspend_np, "regulator-volt",
>> +NULL);
>> +if (suspend_uV) {
>> +
>> For Micron spi norflash,you can enable Quad spi transfer by clear
>> EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit.
>
>OK, this information is nice and all, but what does this patch do? I can't
>learn this information from the commit message as it is, can I ?
>And , the
From: Simon Horman
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. F
From: Sudeep Holla
Currently we wait until both cp15 and mem timers are probed if we
have both timer device nodes present in the device tree without
checking if the device is actually available. If one of the timer
device node present is disabled, the system locks up on the boot
as no timer gets
From: Carlo Caione
Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B,
TIMER_C, TIMER_D and TIMER_E.
The driver is providing clocksource support for the 32-bit counter using
TIMER_E. Clockevents are also supported using TIMER_A.
Acked-by: Arnd Bergmann
Signed-off-by: Carlo
From: Carlo Caione
Acked-by: Arnd Bergmann
Signed-off-by: Carlo Caione
Signed-off-by: Daniel Lezcano
---
.../devicetree/bindings/timer/amlogic,meson6-timer.txt| 15 +++
1 file changed, 15 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/amlogic,meson6
From: Gael Portay
The clock is not unprepared in case of the request IRQ fails.
Also update to request_irq.
Signed-off-by: Gaël PORTAY
Acked-by: Daniel Lezcano
Acked-by: Boris Brezillon
Signed-off-by: Daniel Lezcano
---
drivers/clocksource/tcb_clksrc.c | 13 -
1 file changed, 4
From: Stefan Agner
In order to avoid waking up the system in a low power mode, the
clocksource should not generate interrupts anymore. Disable the PIT
timer interrupt when changing into the CLOCK_EVT_MODE_SHUTDOWN mode.
[dlezcano] : remove superfluous empty line
Signed-off-by: Stefan Agner
Sig
From: Michal Simek
New TTCs support 32bit mode. Older versions support
only 16bit modes. Keep 16bit mode as default
and 32bit optional.
Signed-off-by: Michal Simek
Signed-off-by: Daniel Lezcano
---
drivers/clocksource/cadence_ttc_timer.c | 15 ++-
1 file changed, 10 insertions(+),
From: Nathan Lynch
The only difference between arm and arm64's implementations of
arch_counter_set_user_access is that 32-bit ARM does not enable user
access to the virtual counter. We want to enable this access for the
32-bit ARM VDSO, so copy the arm64 version to the driver itself, and
remove
From: Nathan Lynch
The arm and arm64 VDSOs need CP15 access to the architected counter.
If this is unavailable (which is allowed by ARM v7), indicate this by
changing the clocksource name to "arch_mem_counter" before registering
the clocksource.
Suggested by Stephen Boyd.
Signed-off-by: Nathan
From: Hao Liu
According to HW spec, we have to disable the counter before setting
it, if we don't this, in pressure test, sometimes the timer might
not generate interrupt any more.
And this patch also fixes a typo for register set by changing 0x7
to 0x3. 0x7 is loop mode in HW, but here we are u
From: Nathan Lynch
The arch_timer_evtstrm_enable hooks in arm and arm64 are substantially
similar, the only difference being a CONFIG_COMPAT-conditional section
which is relevant only for arm64. Copy the arm64 version to the
driver, removing the arch-specific hooks.
Signed-off-by: Nathan Lynch
From: Simon Horman
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. F
From: Simon Horman
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. F
Hi Thomas, Ingo,
sorry for sending my PR so late but I have been very busy.
This PR contains the following changes:
* Simon Horman provided the DT soc bindings for the sh_cmt, sh_mtu2
and sh_tmu
* Carlo Caione implemented the driver for the Meson6 with its
documentation
* Gael Portay
Hi Paul,
On 27/09/14 03:40, Paul Bolle wrote:
> Signed-off-by: Paul Bolle
> ---
> Untested!
Thanks. I have applied this to the m68knommu git tree (since
that is where we tend to keep all ColdFire fixes).
> Geert, PASR is obviously unused. Is it needed?
Not at the moment. It will be if/when we
On Sun, Sep 28, 2014 at 09:26:32PM +0200, Fabian Frederick wrote:
> fs/jffs2/summary.c:846:5: warning: context imbalance in
> 'jffs2_sum_write_sumnode' - unexpected unlock
>
> Suggested-by: Brian Norris
> Suggested-by: Josh Triplett
> Signed-off-by: Fabian Frederick
Reviewed-by: Josh Triplett
When building with CONFIG_DEBUG_STRICT_USER_COPY_CHECKS, this copy_to_user
wasn't provably correct (the length was in a variable but the structure
wasn't). The compiler wasn't able to check that the length was being
statically assigned, so include a BUG_ON to notice if this ever changes.
Signed-of
I think I stepped in it over my head. I'm going to let someone else
handle this one and see if I can find something less odd.
On Sun, 2014-09-28 at 16:27 -0700, Joe Perches wrote:
> On Sun, 2014-09-28 at 18:53 -0400, Jason Cooper wrote:
> > On Sun, Sep 28, 2014 at 06:01:01PM -0400, Greg KH wrote:
This makes the size argument a const, since it is always populated by
the caller. Additionally double-checks to make sure the copy_from_user
can never overflow, keeping CONFIG_DEBUG_STRICT_USER_COPY_CHECKS happy:
In function 'copy_from_user',
inlined from '__tun_chr_ioctl' at drivers/net
On Sun, 2014-09-28 at 18:53 -0400, Jason Cooper wrote:
> On Sun, Sep 28, 2014 at 06:01:01PM -0400, Greg KH wrote:
> > On Sun, Sep 28, 2014 at 04:54:26PM -0500, Eric Rost wrote:
> > > My first patch, resent to appropriate multiple addresses!
> >
> > That's great, but it doesn't belong here in the b
On Sun, Sep 28, 2014 at 11:09:50PM +, Steven Stewart-Gallus wrote:
> Hello,
>
> I can't seem to get inotify to work with special files such as
> /proc//task//children? I just need to get a simple yes/no
> answer on whether it works for special files or whether I have to try
> a different appro
Hello,
I can't seem to get inotify to work with special files such as
/proc//task//children? I just need to get a simple yes/no
answer on whether it works for special files or whether I have to try
a different approach.
Thank you,
Steven Stewart-Gallus
--
To unsubscribe from this list: send the l
On Sun, Sep 28, 2014 at 06:14:45PM -0400, Greg KH wrote:
> How about working on getting rid of the #if crap in this driver, that
> will fix up this { } mess automatically.
Yes, I commented on that earlier, it's a rather big job and may not be
appropriate for a beginner.
Eric, if you'd like to tac
On Friday 26 September 2014 08:57 PM, Guenter Roeck wrote:
> Register with kernel restart handler instead of setting arm_pm_restart
> directly.
>
> Move notifier registration to the end of the probe function to avoid having to
> implement error handling.
>
> Cc: Ivan Khoronzhuk
> Cc: Santosh Sh
On Sun, Sep 28, 2014 at 06:01:01PM -0400, Greg KH wrote:
> On Sun, Sep 28, 2014 at 04:54:26PM -0500, Eric Rost wrote:
> > My first patch, resent to appropriate multiple addresses!
>
> That's great, but it doesn't belong here in the body of the changelog :)
>
> > This patch fixes the following che
On Sun, Sep 28, 2014 at 10:36:46PM +0200, Wim Van Sebroeck wrote:
> Hi Lee,
>
> > Still waiting on a Watchdog Ack, so I can take this set in.
> >
> > > This adds a driver for the watchdog timer available in Ricoh RN5T618
> > > PMIC. The device supports a programmable expiration time of 1, 8, 32
>
On Sunday, September 28, 2014 at 03:59:42 AM, bpqw wrote:
> For Micron spi norflash,you can enable
> Quad spi transfer by clear EVCR(Enhanced
> Volatile Configuration Register) Quad I/O
> protocol bit.
OK, this information is nice and all, but what does this patch do? I can't
learn
this informat
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