Introduce and allow DPLL subsystem users to get/set capabilities of
Embedded SYNC on a dpll's pin.
Signed-off-by: Arkadiusz Kubalewski
Arkadiusz Kubalewski (2):
dpll: add Embedded SYNC feature for a pin
ice: add callbacks for Embedded SYNC enablement on dpll pins
Documentation/drive
Implement and document new pin attributes for providing Embedded SYNC
capabilities to the DPLL subsystem users through a netlink pin-get
do/dump messages. Allow the user to set Embedded SYNC frequency with
pin-set do netlink message.
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz
Allow the user to get and set configuration of Embedded SYNC feature
on the ice driver dpll pins.
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 241 +-
drivers/net/ethernet/intel/ice/ice_dpll.h | 1
Introduce and allow DPLL subsystem users to get/set capabilities of
Embedded SYNC on a dpll's pin.
Signed-off-by: Arkadiusz Kubalewski
Arkadiusz Kubalewski (2):
dpll: add Embedded SYNC feature for a pin
ice: add callbacks for Embedded SYNC enablement on dpll pins
Documentation/drive
Implement and document new pin attributes for providing Embedded SYNC
capabilities to the DPLL subsystem users through a netlink pin-get
do/dump messages. Allow the user to set Embedded SYNC frequency with
pin-set do netlink message.
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz
Allow the user to get and set configuration of Embedded SYNC feature
on the ice driver dpll pins.
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
v2:
- align to v2 changes of "dpll: add Embedded SYNC feature for a pin"
drivers/net/ethernet/intel/ice/ice_dp
Introduce and allow DPLL subsystem users to get/set capabilities of
Embedded SYNC on a dpll's pin.
Signed-off-by: Arkadiusz Kubalewski
Arkadiusz Kubalewski (2):
dpll: add Embedded SYNC feature for a pin
ice: add callbacks for Embedded SYNC enablement on dpll pins
Documentation/drive
Implement and document new pin attributes for providing Embedded SYNC
capabilities to the DPLL subsystem users through a netlink pin-get
do/dump messages. Allow the user to set Embedded SYNC frequency with
pin-set do netlink message.
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz
Allow the user to get and set configuration of Embedded SYNC feature
on the ice driver dpll pins.
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
v3:
- remove redundant extack error
- rename esync_freq -> freq
drivers/net/ethernet/intel/ice/ice_dpll.c |
: 8a3a565ff210 ("ice: add admin commands to access cgu configuration")
Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks")
Reviewed-by: Aleksandr Loktionov
Reviewed-by: Przemek Kitszel
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_
'prio': 9,
'state': 'connected'},
{'direction': 'input',
'parent-id': 7,
'phase-offset': -42,
'prio': 8,
Do not allow to acquire data or alter configuration of dpll and pins if PF
reset is in progress.
Arkadiusz Kubalewski (3):
ice: fix dpll and dpll_pin data access on PF reset
ice: fix dpll periodic work data updates on PF reset
ice: fix pin phase adjust updates on PF reset
drivers/net
net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \
--dump pin-get
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Aleksandr Loktionov
Reviewed-by: Przemek Kitszel
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/i
:
- perform PF reset
$ echo 1 > /sys/class/net//device/reset
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Igor Bagnucki
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 5 -
1 file changed, 4 insertions(+), 1 dele
id":0, "phase-adjust":1000}'
Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks")
Reviewed-by: Igor Bagnucki
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/d
se related callbacks")
Reviewed-by: Alan Brady
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c
b/drivers/net/ethernet/intel/ice/ice_dpll.c
ind
Do not allow to acquire data or alter configuration of dpll and pins if PF
reset is in progress.
Arkadiusz Kubalewski (3):
ice: fix dpll and dpll_pin data access on PF reset
ice: fix dpll periodic work data updates on PF reset
ice: fix pin phase adjust updates on PF reset
drivers/net
net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \
--dump pin-get
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Aleksandr Loktionov
Reviewed-by: Przemek Kitszel
Signed-off-by: Arkadiusz Kubalewski
---
v2:
- remove newline from
:
- perform PF reset
$ echo 1 > /sys/class/net//device/reset
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Igor Bagnucki
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 5 -
1 file changed, 4 insertions(+), 1 dele
id":0, "phase-adjust":1000}'
Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks")
Reviewed-by: Igor Bagnucki
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/d
r the output pin only CONNECTED/DISCONNECTED are expected.
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 2 ++
1 file changed, 2 insertions(+)
diff
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index 3a33e6b9b313..496bd588525b 100644
--
r the output pin only CONNECTED/DISCONNECTED are expected.
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Aleksandr Loktionov
Reviewed-by: Paul Menzel
Signed-off-by: Arkadiusz Kubalewski
---
v2:
- use more explicit commit title
- add empty line between
Improve monitoring and control over dpll devices.
Allow user to receive measurement of phase difference between signals on
pin and dpll (phase-offset).
Allow user to receive and control adjustable value of pin's signal
phase (phase-adjust).
Arkadiusz Kubalewski (4):
dpll: docs: add suppor
Add dpll documentation on new pin's attributes:
- phase-offset - measured difference between phase of signals on pin
and dpll
- phase-adjust - adjustable value of pin's signal phase
- phase-adjust-min / phase-adjust-max - values for determining limits
for phase-adjust
Signed-off-by:
Add new pin's attributes to dpll netlink spec:
- phase-offset - measured difference between phase of signals on pin
and dpll
- phase-adjust - adjustable value of pin's signal phase
- phase-adjust-min / phase-adjust-max - values for determining limits
for phase-adjust
Signed-off-by:
-adjust set callback when phase-adjust value is provided for
pin-set request.
Signed-off-by: Arkadiusz Kubalewski
---
drivers/dpll/dpll_netlink.c | 99 -
include/linux/dpll.h| 18 +++
2 files changed, 116 insertions(+), 1 deletion(-)
diff --git a
n pin-properties structure.
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 224 +-
drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +-
2 files changed, 230 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_dpll
questing the phase adjust set
- align handling for error case of frequency set request with the
approach introduced for phase adjust
Arkadiusz Kubalewski (5):
dpll: docs: add support for pin signal phase offset/adjust
dpll: spec: add support for pin-dpll signal phase offset/adjust
dpll: netl
Add documentation on:
- measurment of phase of signal between pin and dpll
- adjustment of pin signal phase
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/driver-api/dpll.rst | 53 ++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/Documentation
Add attributes for providing the user with:
- measurement of signals phase offset between pin and dpll
- ability to adjust the phase of pin signal
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/netlink/specs/dpll.yaml | 33 ++-
drivers/dpll/dpll_nl.c
Add callback ops for pin-dpll phase measurment.
Add callback for pin signal phase adjustment.
Add min and max phase adjustment values to pin proprties.
Invoke callbacks in dpll_netlink.c when filling the pin details to
provide user with phase related attribute values.
Signed-off-by: Arkadiusz
Implement new callback ops related to measurment and adjustment of
signal phase for pin-dpll in ice driver.
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 224 +-
drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +-
2 files changed, 230
ff-by: Arkadiusz Kubalewski
---
drivers/dpll/dpll_netlink.c | 50 +
1 file changed, 40 insertions(+), 10 deletions(-)
diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
index 97319a9e4667..8e5fea74aec1 100644
--- a/drivers/dpll/dpll_netlink.c
eader as it is not needed
v1->v2:
- improve handling for error case of requesting the phase adjust set
- align handling for error case of frequency set request with the
approach introduced for phase adjust
Arkadiusz Kubalewski (5):
dpll: docs: add support for pin signal phase offset/adjust
Add documentation on:
- measurment of phase of signal between pin and dpll
- adjustment of pin signal phase
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/driver-api/dpll.rst | 53 ++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/Documentation
Add attributes for providing the user with:
- measurement of signals phase offset between pin and dpll
- ability to adjust the phase of pin signal
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/netlink/specs/dpll.yaml | 33 ++-
drivers/dpll/dpll_nl.c
Add callback ops for pin-dpll phase measurment.
Add callback for pin signal phase adjustment.
Add min and max phase adjustment values to pin proprties.
Invoke callbacks in dpll_netlink.c when filling the pin details to
provide user with phase related attribute values.
Signed-off-by: Arkadiusz
Implement new callback ops related to measurment and adjustment of
signal phase for pin-dpll in ice driver.
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 224 +-
drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +-
2 files changed, 230
ff-by: Arkadiusz Kubalewski
---
drivers/dpll/dpll_netlink.c | 50 +
1 file changed, 40 insertions(+), 10 deletions(-)
diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
index 97319a9e4667..8e5fea74aec1 100644
--- a/drivers/dpll/dpll_netlink.c
ubsystem
v2->v3:
- do not increase do version of uAPI header as it is not needed
v1->v2:
- improve handling for error case of requesting the phase adjust set
- align handling for error case of frequency set request with the
approach introduced for phase adjust
Arkadiusz Kubalewski (5):
d
Add attributes for providing the user with:
- measurement of signals phase offset between pin and dpll
- ability to adjust the phase of pin signal
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/netlink/specs/dpll.yaml | 31 +++
drivers/dpll/dpll_nl.c
Add documentation on:
- measurement of phase of signal between pin and dpll
- adjustment of pin signal phase
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/driver-api/dpll.rst | 53 ++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a
Implement new callback ops related to measurement and adjustment of
signal phase for pin-dpll in ice driver.
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 220 +-
drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +-
2 files changed, 226
Add callback ops for pin-dpll phase measurement.
Add callback for pin signal phase adjustment.
Add min and max phase adjustment values to pin proprties.
Invoke callbacks in dpll_netlink.c when filling the pin details to
provide user with phase related attribute values.
Signed-off-by: Arkadiusz
ff-by: Arkadiusz Kubalewski
---
drivers/dpll/dpll_netlink.c | 50 +++--
1 file changed, 42 insertions(+), 8 deletions(-)
diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
index 09a6c2a1ea92..a6dc3997bf5c 100644
--- a/drivers/dpll/dpll_netlink.c
- align handling for error case of frequency set request with the
approach introduced for phase adjust
Arkadiusz Kubalewski (5):
dpll: docs: add support for pin signal phase offset/adjust
dpll: spec: add support for pin-dpll signal phase offset/adjust
dpll: netlink/core: add support for pin-
Add documentation on:
- measurement of phase of signal between pin and dpll
- adjustment of pin signal phase
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/driver-api/dpll.rst | 53 ++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a
Add attributes for providing the user with:
- measurement of signals phase offset between pin and dpll
- ability to adjust the phase of pin signal
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/netlink/specs/dpll.yaml | 30 +++
drivers/dpll/dpll_nl.c
Add callback ops for pin-dpll phase measurement.
Add callback for pin signal phase adjustment.
Add min and max phase adjustment values to pin proprties.
Invoke callbacks in dpll_netlink.c when filling the pin details to
provide user with phase related attribute values.
Signed-off-by: Arkadiusz
Implement new callback ops related to measurement and adjustment of
signal phase for pin-dpll in ice driver.
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 220 +-
drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +-
2 files changed, 226
ff-by: Arkadiusz Kubalewski
---
drivers/dpll/dpll_netlink.c | 50 +++--
1 file changed, 42 insertions(+), 8 deletions(-)
diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
index 09a6c2a1ea92..a6dc3997bf5c 100644
--- a/drivers/dpll/dpll_netlink.c
: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/ne
supported
values from the running firmware, let firmware decide if given value is
correct and return extack error if the value is not supported.
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Przemek Kitszel
Signed-off-by: Arkadiusz Kubalewski
---
d
viewed-by: Andrii Staikov
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 12 +++--
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 54 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 +
3 files changed, 64 insertions(+), 4 deletions(-)
shall be known for debugging purposes.
Test (on NIC board with CGU)
$ devlink dev info / | grep cgu
cgu.id 36
fw.cgu 8032.16973825.6021
Test (on NIC board without CGU)
$ devlink dev info / | grep cgu -c
0
Reviewed-by: Larysa Zaremba
Signed-off-by: Arkadiusz Kubalewski
] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf
Arkadiusz Kubalewski (2):
ptp: add control over HW timestamp latch point
ice: ptp: add control over HW timestamp latch point
Documentation/ABI/testing/sysfs-ptp | 12 +
drivers/net/ethernet/intel/ice/ice_ptp.c| 46
latch point with ptp sysfs ABI.
[1] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
Documentation/ABI/testing/sysfs-ptp | 12
drivers/ptp/ptp_sysfs.c | 44
Allow user to control the latch point of ptp HW timestamps in E825
devices.
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_ptp.c| 46 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 57
d from the firmware and is already in progress, planned for
next-tree only.
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Karol Kolacinski
Signed-off-by: Arkadiusz Kubalewski
---
v3:
- use ARRAY_SIZE()/sizeof() and remove length define
- initialize also
either in the beginning or after the Start of Frame Delimiter (SFD) [1].
Allow ptp device drivers to provide user with control over the timestamp
latch point.
[1] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf
Signed-off-by: Arkadiusz Kubalewski
---
drivers/ptp/ptp_sysfs.c
Implement ptp HW timestamp latch points callbacks, allow user to control
the latch point of ptp timestamps in E825 devices.
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_ptp.c| 48 +++
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 52
.
Arkadiusz Kubalewski (2):
ptp: add control over HW timestamp latch point
ice: ptp: add control over HW timestamp latch point
drivers/net/ethernet/intel/ice/ice_ptp.c| 48 +++
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 52 +
drivers/net/ethernet/intel/ice
_point
[1] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
v2:
- improve commit message, describe the new sysfs file and add usage
examples,
- improve alignment in documentation of enum ptp_ts_point,
- us
Signed-off-by: Arkadiusz Kubalewski
---
v2:
- add kernel doc return description on ice_get_ts_point(..),
- use enum ptp_ts_point directly, instead of additional bool to pass tx
timestamp latch point from userspace callback up to ptp_hw
configuration,
- fix bit logic.
---
drivers/net/ethernet/int
] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf
Arkadiusz Kubalewski (2):
ptp: add control over HW timestamp latch point
ice: ptp: add control over HW timestamp latch point
Documentation/ABI/testing/sysfs-ptp | 12 +
drivers/net/ethernet/intel/ice/ice_ptp.c| 44
_point
[1] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
v3:
- max value of enum ptp_ts_point is also enumerated,
- move enum ptp_ts_point to uapi,
- add NONE value to enum ptp_ts_point, to make clear that
Signed-off-by: Arkadiusz Kubalewski
---
v3:
- improve readability, for "nothing to do" logic
- /s/PTP/ptp
- remove 'tx' from docs description
---
drivers/net/ethernet/intel/ice/ice_ptp.c| 44 +++
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 60 +
] https://www.ieee802.org/3/cx/public/april20/tse_3cx_01_0420.pdf
v3:
- move new enum ptp_ts_point to uapi ptp_clock.h and add NONE value to
indicate that the timestamp latch point was not provided by the HW,
allow further changes to ethtool netlink interface exstensions.
Arkadiusz Kubalewski (2
d').
[1] https://cdrdv2.intel.com/v1/dl/getContent/613875?explicitVersion=true
Fixes: 91e43ca0090b ("ice: fix linking when CONFIG_PTP_1588_CLOCK=n")
Reviewed-by: Aleksandr Loktionov
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_common.c | 25 +++
y
acquired from the firmware and is already in progress, planned for
next-tree only.
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Karol Kolacinski
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 44 ++
y
acquired from the firmware and is already in progress, planned for
next-tree only.
Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu")
Reviewed-by: Karol Kolacinski
Signed-off-by: Arkadiusz Kubalewski
---
v2:
- put define on top of the file
- fix smatch 'ret
#x27;: 0,
'phase-adjust-max': 2147466925,
'phase-adjust-min': -2147466925,
[1] https://cdrdv2.intel.com/v1/dl/getContent/613875?explicitVersion=true
Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks")
Reviewed-by: Przemek Kitszel
Signed-off-by: Ar
Previously control of the dpll SMA/U.FL pins was partially done through
ptp API, decouple pins control from both interfaces (dpll and ptp).
Allow the SMA/U.FL pins control over a dpll subsystem, and leave ptp
related SDP pins control over a ptp subsystem.
Arkadiusz Kubalewski (1):
ice: redesign
From: Karol Kolacinski
Add a description of PTP pins support by the adapters to ice driver
documentation.
Reviewed-by: Milena Olech
Signed-off-by: Karol Kolacinski
Signed-off-by: Arkadiusz Kubalewski
---
.../device_drivers/ethernet/intel/ice.rst | 13 +
1 file changed
nding hardware
pins according to the runtime configuration,
- ability to control SMA pins direction.
Reviewed-by: Przemek Kitszel
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 952 +-
drivers/net/ethernet/intel/ice/ice_dpll.h | 23 +-
2
error for all E810 on absent NVM pin section or other errors to
allow proper initialization on SMA E810 with NVM section.
Use ARRAY_SIZE for pin array instead of internal definition.
Reviewed-by: Milena Olech
Signed-off-by: Karol Kolacinski
Signed-off-by: Arkadiusz Kubalewski
---
drivers/net
From: Karol Kolacinski
Add a description of PTP pins support by the adapters to ice driver
documentation.
Signed-off-by: Karol Kolacinski
---
v2:
- no change, updated series
---
.../device_drivers/ethernet/intel/ice.rst | 13 +
1 file changed, 13 insertions(+)
diff --git
nding hardware
pins according to the runtime configuration,
- ability to control SMA pins direction.
Reviewed-by: Przemek Kitszel
Signed-off-by: Arkadiusz Kubalewski
---
v2:
- fix cocci/smatch warnings
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 950 +-
drivers/net/ethernet/
From: Karol Kolacinski
This change aligns E810 PTP pin control to all other products.
Currently, SMA/U.FL port expanders are controlled together with SDP pins
connected to 1588 clock. To align this, separate this control by
exposing only SDP20..23 pins in PTP API on adapters with DPLL.
Clear er
Previously control of the dpll SMA/U.FL pins was partially done through
ptp API, decouple pins control from both interfaces (dpll and ptp).
Allow the SMA/U.FL pins control over a dpll subsystem, and leave ptp
related SDP pins control over a ptp subsystem.
Arkadiusz Kubalewski (1):
ice: redesign
From: Karol Kolacinski
Add a description of PTP pins support by the adapters to ice driver
documentation.
Reviewed-by: Milena Olech
Signed-off-by: Karol Kolacinski
Signed-off-by: Arkadiusz Kubalewski
---
v3:
- add missing reviewed-by and signed-off-by
---
.../device_drivers/ethernet/intel
nding hardware
pins according to the runtime configuration,
- ability to control SMA pins direction.
Reviewed-by: Przemek Kitszel
Signed-off-by: Arkadiusz Kubalewski
---
v3:
- no change
---
drivers/net/ethernet/intel/ice/ice_dpll.c | 950 +-
drivers/net/ethernet/intel/ice/ice_d
error for all E810 on absent NVM pin section or other errors to
allow proper initialization on SMA E810 with NVM section.
Use ARRAY_SIZE for pin array instead of internal definition.
Reviewed-by: Milena Olech
Signed-off-by: Karol Kolacinski
Signed-off-by: Arkadiusz Kubalewski
---
v3:
- add
Previously control of the dpll SMA/U.FL pins was partially done through
ptp API, decouple pins control from both interfaces (dpll and ptp).
Allow the SMA/U.FL pins control over a dpll subsystem, and leave ptp
related SDP pins control over a ptp subsystem.
Arkadiusz Kubalewski (1):
ice: redesign
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