Allow user to control the latch point of ptp HW timestamps in E825
devices.
Reviewed-by: Aleksandr Loktionov <aleksandr.loktio...@intel.com>
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalew...@intel.com>
---
drivers/net/ethernet/intel/ice/ice_ptp.c | 46 +++++++++++++++++
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 57 +++++++++++++++++++++
drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 +
3 files changed, 105 insertions(+)
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c
b/drivers/net/ethernet/intel/ice/ice_ptp.c
index a999fface272..47444412ed9a 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c
@@ -2509,6 +2509,50 @@ static int ice_ptp_parse_sdp_entries(struct ice_pf *pf,
__le16 *entries,
return 0;
}
+/**
+ * ice_get_ts_point - get the tx timestamp latch point
+ * @info: the driver's PTP info structure
+ * @point: return the configured tx timestamp latch point
+ *
+ * Return: 0 on success, negative on failure.
+ */
+static int
+ice_get_ts_point(struct ptp_clock_info *info, enum ptp_ts_point *point)
+{
+ struct ice_pf *pf = ptp_info_to_pf(info);
+ struct ice_hw *hw = &pf->hw;
+ bool sfd_ena;
+ int ret;
+
+ ice_ptp_lock(hw);
+ ret = ice_ptp_hw_ts_point_get(hw, &sfd_ena);
+ ice_ptp_unlock(hw);
+ if (!ret)
+ *point = sfd_ena ? PTP_TS_POINT_SFD : PTP_TS_POINT_POST_SFD;
+
+ return ret;
+}
+
+/**
+ * ice_set_ts_point - set the tx timestamp latch point
+ * @info: the driver's PTP info structure
+ * @point: requested tx timestamp latch point
+ */
+static int
+ice_set_ts_point(struct ptp_clock_info *info, enum ptp_ts_point point)
+{
+ bool sfd_ena = point == PTP_TS_POINT_SFD ? true : false;
+ struct ice_pf *pf = ptp_info_to_pf(info);
+ struct ice_hw *hw = &pf->hw;
+ int ret;
+
+ ice_ptp_lock(hw);
+ ret = ice_ptp_hw_ts_point_set(hw, sfd_ena);
+ ice_ptp_unlock(hw);
+
+ return ret;
+}
+
/**
* ice_ptp_set_funcs_e82x - Set specialized functions for E82X support
* @pf: Board private structure
@@ -2529,6 +2573,8 @@ static void ice_ptp_set_funcs_e82x(struct ice_pf *pf)
if (ice_is_e825c(&pf->hw)) {
pf->ptp.ice_pin_desc = ice_pin_desc_e825c;
pf->ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e825c);
+ pf->ptp.info.set_ts_point = ice_set_ts_point;
+ pf->ptp.info.get_ts_point = ice_get_ts_point;
} else {
pf->ptp.ice_pin_desc = ice_pin_desc_e82x;
pf->ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e82x);
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index da88c6ccfaeb..d81525bc8a16 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -6303,3 +6303,60 @@ int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw,
u8 pin_id,
return 0;
}
+
+/**
+ * ice_ptp_hw_ts_point_get - check if tx timestamping is latched on/post SFD
+ * @hw: pointer to the HW struct
+ * @sfd_ena: on success true if tx timestamping latched at beginning of SFD,
+ * false if post sfd
+ *
+ * Verify if HW timestamping point is configured to measure at the beginning or
+ * post of SFD (Start of Frame Delimiter)
+ *
+ * Return: 0 on success, negative on error
+ */
+int ice_ptp_hw_ts_point_get(struct ice_hw *hw, bool *sfd_ena)
+{
+ u8 port = hw->port_info->lport;
+ u32 val;
+ int err;
+
+ err = ice_read_mac_reg_eth56g(hw, port, PHY_MAC_XIF_MODE, &val);
+ if (err)
+ return err;
+ if (val | PHY_MAC_XIF_TS_SFD_ENA_M)
+ *sfd_ena = true;
+ else
+ *sfd_ena = false;
+
+ return err;
+}
+
+/**
+ * ice_ptp_hw_ts_point_set - configure timestamping on/post SFD
+ * @hw: pointer to the HW struct
+ * @sfd_ena: true to enable timestamping at beginning of SFD, false post sfd
+ *
+ * Configure timestamping to measure at the beginning/post SFD (Start of Frame
+ * Delimiter)
+ *
+ * Return: 0 on success, negative on error
+ */
+int ice_ptp_hw_ts_point_set(struct ice_hw *hw, bool sfd_ena)
+{
+ u8 port = hw->port_info->lport;
+ int err, val;
+
+ err = ice_read_mac_reg_eth56g(hw, port, PHY_MAC_XIF_MODE, &val);
+ if (err)
+ return err;
+ if ((val | PHY_MAC_XIF_TS_SFD_ENA_M && sfd_ena) ||
+ (!(val | PHY_MAC_XIF_TS_SFD_ENA_M) && !sfd_ena))
+ return -EINVAL;
+ if (sfd_ena)
+ val |= PHY_MAC_XIF_TS_SFD_ENA_M;
+ else
+ val &= ~PHY_MAC_XIF_TS_SFD_ENA_M;
+
+ return ice_write_mac_reg_eth56g(hw, port, PHY_MAC_XIF_MODE, val);
+}
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
index 656daff3447e..cefedd01479a 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
@@ -348,6 +348,8 @@ void ice_ptp_init_hw(struct ice_hw *hw);
int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64
*tstamp_ready);
int ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port,
enum ice_ptp_tmr_cmd configured_cmd);
+int ice_ptp_hw_ts_point_get(struct ice_hw *hw, bool *sfd_ena);
+int ice_ptp_hw_ts_point_set(struct ice_hw *hw, bool sfd_ena);
/* E822 family functions */
int ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val);
--
2.38.1
