[Intel-gfx] [PATCH] drm/i915/mtl: Disable SF round to nearest even

Workaround for disabling round to nearest even in the SF unit. BSpec: 45818 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH] drm/i915/dg2: Remove Wa_15010599737

Since this Wa is specific to DirectX, this is not required on Linux. Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 --- 2 files changed, 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h

[Intel-gfx] [PATCH] drm/i915: Add Wa_14015150844

Disables Atomic-chaining of Typed Writes. BSpec: 54040 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 ++ drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b

[Intel-gfx] [PATCH] drm/i915: Add Wa_14015150844

Disables Atomic-chaining of Typed Writes. BSpec: 54040 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 ++ drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b

[Intel-gfx] [PATCH] drm/i915: Add Wa_14015150844

Disables Atomic-chaining of Typed Writes. BSpec: 54040 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 ++ drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b

[Intel-gfx] [PATCH] drm/i915: Add Wa_18028616096

Drop UGM per set fragment threshold to 3 BSpec: 54833 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu

[Intel-gfx] [PATCH] drm/i915: Add Wa_18028616096

Drop UGM per set fragment threshold to 3 BSpec: 54833 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu

[Intel-gfx] [PATCH] drm/i915: Add Wa_18028616096

Drop UGM per set fragment threshold to 3 BSpec: 54833 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu

[Intel-gfx] [PATCH] drm/i915: Add Wa_18028616096

Drop UGM per set fragment threshold to 3 BSpec: 54833 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu

[Intel-gfx] [PATCH v5] drm/i915: Add Wa_18028616096

Drop UGM per set fragment threshold to 3 BSpec: 54833 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 + 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers

[Intel-gfx] [PATCH] drm/i915: Add new DG2 PCI IDs

Add new PCI IDs which are recently added. BSpec: 44477 Signed-off-by: Shekhar Chauhan --- include/drm/i915_pciids.h | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 1256770d3827..deb2eb0b4979 100644 --- a

[Intel-gfx] [PATCH v2] drm/i915: Add new DG2 PCI IDs

Add recently added PCI IDs for DG2 BSpec: 44477 Signed-off-by: Shekhar Chauhan --- include/drm/i915_pciids.h | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 1256770d3827..1c9ea6ab3eb9 100644 --- a/include/drm

[Intel-gfx] [PATCH] drm/i915/mtl: Fix Wa_22016670082

Wa_22016670082 is applicable on GT and Media. For GT, an MCR register is required instead of MMIO. Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff

[Intel-gfx] [PATCH v2 0/1] drm/i915/mtl: Fix Wa_22016670082

Wa_22016670082 is applicable on GT and Media. For GT, an MCR register is required instead of MMIO. v1: Introduce the fix v2: Minor cosmetic change for naming convention of the register and adding a Todo for later changes in the code. Shekhar Chauhan (1): drm/i915/mtl: Fix

[Intel-gfx] [PATCH v2 1/1] drm/i915/mtl: Fix Wa_22016670082

Wa_22016670082 is applicable on GT and Media. For GT, an MCR register is required instead of MMIO. Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 ++ drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff

[Intel-gfx] [PATCH v3] drm/i915/mtl: Fix Wa_22016670082

Wa_22016670082 is applicable on GT and Media. For GT, an MCR register is required instead of MMIO. v1: Introduce the fix. v2: Minor naming convention change and adding a TODO v3: Enhancing the TODO Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 ++ drivers

[PATCH] drm/i915/lnl: Modeset sequence change for DP on LNL

Currently, the driver is only waiting for 1ms for idle patterns. But starting from LNL and beyond, the MST wants the driver to wait for 1640us before timing out (which we round up to 2ms). BSpec: 68849 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- 1 file

[PATCH v2] drm/i915/dp: Increase idle pattern wait timeout to 2ms

LNL. BSpec: 68849 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/display/intel_ddi.c | 12 ++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index bea441590204..b72bcad60cdc 100644 -

[PATCH v3] drm/i915/dp: Increase idle pattern wait timeout to 2ms

. v3: Fixed 2 cosmetic changes. BSpec: 68849 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/display/intel_ddi.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c i

[PATCH v4] drm/i915/dp: Increase idle pattern wait timeout to 2ms

timeout. v2: Segregated the wait timeout for platforms before & after LNL. v3: Fixed 2 cosmetic changes. v4: Revert to v2 design with commit message enhancements. BSpec: 68849 Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+

[PATCH v5] drm/i915/dp: Increase idle pattern wait timeout to 2ms

. v1: Introduced the 2ms wait timeout. v2: Segregated the wait timeout for platforms before & after LNL. v3: Fixed 2 cosmetic changes. v4: Revert to v2 design with commit message enhancements. v5: Minor cosmetic changes to the commit message. BSpec: 68849 Signed-off-by: Shekhar Chauhan --- dri

[PATCH] drm/i915/display: Avoid touching interlace mode registers

those registers/fields. Signed-off-by: Shekhar Chauhan --- drivers/gpu/drm/i915/display/intel_display.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3afb85fe85